Module 2. Basic Digital Building Blocks. Binary Arithmetic & Arithmetic Circuits Comparators, Decoders, Encoders, Multiplexors Flip-Flops

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1 Module 2 asic Digital uilding locks Lecturer: Dr. Yongsheng Gao Office: Tech Web: Structure: Textbook: yongsheng.gao@griffith.edu.au maxwell.me.gu.edu.au 6 lecturers 1 tutorial 1 laboratory (5%) 1 test (20%) Floyd, "Digital Fundamentals 8 ed" Chapters: Chapter 6 Chapter 7 Covers: inary rithmetic & rithmetic Circuits Comparators, Decoders, Encoders, Multiplexors Flip-Flops INRY RITHMETIC ND RITHMETIC CIRCUITS 1.1 im In the previous lectures you have been shown the logic functions and how to minimise the logic functions. In this section you will learn how to perform addition and subtraction in binary, and how to combine the logic gates to make adders and subtractors, how to represent positive and negative numbers in binary, and how to perform arithmetic on these positive and negative numbers. 1

2 1.2 Decimal rithmetic ddition Truth Table + \ signifies a carry e.g = 3 with carry = 1 To add Decimal numbers 1. set carry = 0 2. start at right column 3. add all the digits in the column including the carry 4. If (sum > 10) then set carry=1 else set carry=0 5. Move to the next column on the left. 6. Repeat steps 3 to 5 until no more columns Example = Carry 1 Result 2 4 2

3 1.2.2 Subtraction Truth Table for Decimal Subtraction - \ signifies a borrow e.g. 5-6 = 9 with borrow = 1 To subtract Decimal numbers 1. set borrow = 0 2. start at right column 3. subtract all the digits in the column including the borrow 4. If (sub < 0) then add 10 to sub set borrow=1 else set borrow=0 5. Move to the next column on the left. 6. Repeat steps 3 to 5 until no more columns Example = orrow 1 Result 0 5 3

4 1.3 inary rithmetic ddition Truth Table for inary ddition + Σ Carry To add inary numbers 1. set carry = 0 2. start at right column 3. add all the bits in the column including the carry 4. If (sum > 10b) then set carry=1 else set carry=0 5. Move to the next column on the left. 6. Repeat steps 3 to 5 until no more columns Example = 100 (1)+(3)=(4) Carry 1 1 Result

5 1.3.2 Subtraction Truth Table for inary Subtraction - R orrow To subtract inary numbers 1. set borrow = 0 2. start at right column 3. subtract all the bits in the column including the borrow 4. If (sub < 0) then add 10b to sub and set borrow=1 else set borrow=0 5. Move to the next column on the left. 6. Repeat steps 3 to 5 until no more columns Example = 010 (5) - (3) = (2) orrow 1 0 Result

6 1.4 Circuits For inary ddition Half adder To add two binary numbers together you use a half adder circuit. Examining the truth table for the binary addition we note that the Σ column in the truth table is an XOR. The carry can be represented by an ND of inputs, Σ C o Therefore the circuit for the half adder can be drawn: Sum Carry out The symbol for a half adder is H S Co Sum Co 6

7 1.4.2 Full dder To add the higher order columns you also need to add the carry. The truth table for the full adder is shown below C i Σ C o The circuit can be constructed out of 2 half adders H S Co H S Co Sum Ci Cout The complete circuit for the full adder is Carry in Sum Carry out 7

8 The symbol for a full adder is Ci F Sum Cin Cout Sum Co Multibit dders The full adder only adds 2 one bit values together. Multiple bits can be added by using an adder for each bit. Example nibble (4 bit value) can be represented with 4 lines ( 0 to 3 ). Two nibbles can be represented with ( 0 to 3 ) & ( 0 to 3 ). dding + will produce 4 sum bits and a carry Eg Co MS LS (1) Each column in the addition has to be added separately with a separate adder circuit. Each addition is performed in parallel (at the same time) since each column uses its own adder. The 2 0 column does not require a Carry in since it is the first to be added. This column needs a half adder. Columns 2 3 to 2 1 require a Carry in because the calculation of the previous column (bit) could have generated a carry. These columns need a full adder. 8

9 1.4.4 Ripple Carry dder ripple carry adder connects the C out of one adder to the C in of the next adder. This is known as cascading. The circuit for a ripple carry adder to add two 4-bit numbers ( & ) together is: MS LS S3 Cout S2 S1 S0 Cin Cin Cin F F F H Sum Cout Sum Cout Sum Cout S Co Stage 3 Stage 2 Stage 1 Stage 0 Q. re all the sum bits calculated at the same time?. No. It takes the carry a finite time to propagate from the least significant bit (LS) to the most significant bit (MS). Each full adder needs the carry from the previous adder to calculate its sum therefore there is a delay in the calculation of each bit. Q. Is there a way to remove this delay?. Yes. n extra circuit called a look-ahead carry can be connected to input bits of each adder. This circuit uses the input bits to predict the output carry of each stage. Q. Computer use bytes (8 bits) and words (16 or 32 bits). Is there an easier way to add these without all the full and half adder circuits?. Yes. Integrated circuits (IC) can be used. They contain all the adding stages without us have to build them separately. 9

10 1.4.5 Integrated Circuit dders four bit adder is available as integrated circuits in both TTL and CMOS. The four bit adder takes two nibbles and a carry in bit to produce four sum bits and a carry out bit. Number Description 7483 TTL 4 bit adder with fast carry 74LS83 Low Power Schottky TTL 4 bit adder with fast carry 74HC283 High Speed CMOS 4 bit adder with fast carry 74LS283 Low Power Schottky TTL 4 bit adder with fast carry 4008 CMOS 4 bit adder with fast carry Switching Characteristics There will be a finite time for the circuit to perform the addition. This will mean that there is a delay between the changing the inputs and the corresponding change in the output. This delay is known as the progation delay. The switching characteristics on the data sheets show the propogation delays for each of summing stage outputs. The delays for the carrys are also indicated. 10

11 1.4.6 dder Expansion Q. How can I add bytes (8 bit) rather than nibbles (4 bit)?. Simple. Cascade the 74LS283 in the same manner as cascading adders as done previously. Each 74LS283 allows the addition of 4 bits. Therefore two 74LS283 will allow 8 bits for (0-7) and 8 bits for (0-7). The sum will be an 8 bit value (S0-S7). The carry out (C4) of the Least Significant nibble (Stage 1) must be connected to the carry in (C0) of the Most Significant nibble (Stage 2). The carry out of the Most Significant nibble is the carry for 8 bit addition. The carry in of the Least Significant nibble is the 0 since there are no preceeding stages } } } } C LS283 74LS283 S1 S2 S3 S4 C4 C4 S1 S2 S3 S C0 } S0-S3 Stage 1 Stage 2 Exercise: Design a circuit to add 12 bit numbers. Hint: 12 bits = 3 x nibbles. C7 } S4-S7 11

12 1.5 Circuits For inary Subtraction Half subtractor To subtract two binary numbers from each other you use a half subtractor circuit. Examining the truth table for the binary subtraction we note that the R column in the truth table is an XOR. The borrow can be represented by an ND of inputs, / R b o Therefore the circuit for the half subtractor can be drawn: R orrow out The symbol for a half subtractor is HS R bo R bo 12

13 1.5.2 Full Subtractor To subtract the higher order columns you also need to subtract the borrow. The truth table for the full subtractor is shown below b i R b o The circuit can be constructed out of 2 half subtractors HS R bo HS R bo R bi bo 13

14 The complete circuit for the full subtractor is orrow in R orrow out The symbol for a full subtractor is Ci F Sum Cin Cout Sum Co Multibit Subtractors The full subtractor only subtracts 2 one bit values together. Multiple bits can be subtracted by using an subtractor for each bit. Example nibble (4 bit value) can be represented with 4 lines ( 0 to 3 ). Two nibbles can be represented with ( 0 to 3 ) & ( 0 to 3 ). Subtracting - will produce 4 sum bits and a borrow Eg bo MS LS (0) Each column in the subtraction has to be subtracted separately with a separate subtractor circuit. Each subtraction is performed in parallel (at the same time) since each column uses its own subtractor. 14

15 The 2 0 column does not require a orrow in since it is the first to be subtracted. This column needs a half subtractor. Columns 2 3 to 2 1 require a orrow in because the calculation of the previous column (bit) could have generated a borrow. These columns need a full subtractor. MS R3 bout R2 R1 LS R0 bi bi bi FS FS FS HS R bo R bo R bo R bo Stage 3 Stage 2 Stage 1 Stage 0 15

16 1.6 inary Number Systems llowing Negative Values Sign Magnitude Sign magnitude allows the representation of positive and negative numbers The Most Significant bit is used to represent the sign. 0 = positive value 1 = negative value e.g. In an 8 bit value ± Decimal Sign Magnitude The range is (-127) to (+127) The problem is you have 2 zeros (+0) (-0) 16

17 1.6.2 One s Complement Representation The one s complement representation allows both positive and negative numbers. The complement is the inverse or opposite of a number. Eg The complement of +3 is 3 and vice versa positive number is represented by its normal binary value. negative number is represented by inverting all the bits of the corresponding positive number. Example +4 take binary take binary 0100 invert 1011 Note: The most significant bit is equivalent to the sign bit The one s complement representation for 4 to 4 is shown in the table below. Decimal One's complement

18 1.6.3 Two s Complement Representation positive number is represented by its normal binary value. negative number is represented by taking the one s complement value and adding 1. Example +2 take binary 0010 Note: -2 take 1 s complement The most significant bit is equivalent to the sign bit The two s complement representation for 4 to 4 is shown in the table below. Decimal Two's complement quick method to find the 2 s complement is to start at the rightmost bit (least significant) and copy each bit while moving left until the bit is a 1. fter this keep moving to the left but invert all the bits. Eg Find the 2 s complement of invert copy

19 Find the 2 s complement of s comp method 1 s comp = result = 1011 Quick 0101 copy = 1 invert 010 = 101 result = 1011 Find the twos complement of is a positive number 5 = 0101b result = 0101 Find the twos complement of -5-5 is a negative number 5 = 0101b 1 s comp method 1 s comp = result = 1011 Quick 0101 copy = 1 invert 010 = 101 result =

20 1.6.4 Two s Complement rithmetic Two s complement is the most widely used method for performing arithmetic. Computer s perform their integer arithmetic using 2 s complement. The advantage of 2 s complement is that addition and subtraction can be performed using just addition. Thus the same circuitry can be used for additions and subtraction. ddition: + Subtraction: = + - Signed 2 s complement numbers. negative number is the 2 s complement of a positive number. The sign can be determined by examing the MSit. If the MSit is 1, then the number is in 2 s complement form and is therfore negative. Example 0100 = = = = -39 Range of a 2 s complement number The total number of possible values for an n bit number is 2 n. The Most Significant it of a 2 s complement is the sign bit. Therfore there is (1) sign bit and (n-1) magnitude bits. Range: -(2 n-1 ) to (2 n-1 1) Example For an 8 bit number the range is (2 7 ) to (2 7-1) which is 128 to

21 2 s Complement ddition To add + 1. If or negative, convert them to their 2 s complement form. 2. dd and. Ignore the carry. 3. Examine the Most Significant it of the sum. - If it is a 0 then the result is in normal binary form. - If it is a 1 then the result is in 2 s complement form. Therefore take the 2 s complement to get the true magnitude of the sum. Examples There are 4 possible cases for addition 1. oth numbers positive 2. Magnitude of positive number > magnitude of negative number 3. Magnitude of negative number >magnitude of positive number 4. oth numbers negative Case 1 (4 + 7) Sign bit = 0 therefore +ve Result = 11 Case 2 (7 + -4) (2 s comp) Sign bit = 0 therefore +ve Result = 3 21

22 Case 3 (4 + -7) (2 s comp) Sign bit = 1 therefore negative Since negative the result is in 2 s complement form. To convert to decimal: Get magnitude by taking 2 s comp of sum = Result = -3 Case 4 ( ) (2 s comp) (2 s comp) Sign bit = 1 therefore -ve Since negative the result is in 2 s complement form. To convert to decimal: Get magnitude by taking 2 s comp of sum = Result =

23 2 s Complement Subtraction We can perform subtraction by using the following property: - = + (-) 1. Negate by converting it to its 2 s complement form. 2. If negative, convert it to its 2 s complement form. 3. dd and. Ignore the carry. 4. Examine the Most Significant it of the sum. 5. If it is a 0 then the result is in normal binary form. 6. If it is a 1 then the result is in 2 s complement form. Therefore take the 2 s complement to get the true magnitude of the sum. Example (7 4) 7 4 = 7 + (-4) (2 s comp) Sign bit = 0 therefore +ve Result = 3 Example (-25 19) = (-19) (25= & 19= ) (2 s comp) (2 s comp) Sign bit = 1 therefore -ve To convert to decimal: Get magnitude by taking 2 s comp of sum = Result =

24 Overflow Condition n overflow results when + > number of bits in the numbers. i.e the result is larger than the range of and. This is indicated by an incorrect sign bit. This will only occur when and are both positive or both negative. This can be fixed by adding extra bits to the Most Significant end. Example The sign bit is a 1 which indicates a negative result. The result is expected to be positive. Therefore we have an overflow condition. The 2 s complement range of a 8 bit number is (-128 to 127). 183 > 127 This can be fixed by using another bit for each number

25 1.7.1 Putting it all together LU s LU stands for rithmetic Logic Unit. n LU is a multipurpose IC that perform arithmetic functions (add,subtract) and logic functions (nd, OR, NOT etc) on the input data. The function to be performed is selected using the select inputs into the IC. n example is the bit LU. It has 16 different logical functions and 16 different arithmetic functions. The two inputs are 4 bits in size and are labelled and. The selected function is performed on the input and the result (F) is output. If the result is a negative number then it is given in 2 s complement form. Refer to the datasheet for the functions. 25