Chapter 5. Digital Design and Computer Architecture, 2 nd Edition. David Money Harris and Sarah L. Harris. Chapter 5 <1>
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1 Chapter 5 Digital Design and Computer Architecture, 2 nd Edition David Money Harris and Sarah L. Harris Chapter 5 <>
2 Chapter 5 :: Topics Introduction Arithmetic Circuits umber Systems Sequential Building Blocks Memory Arrays Logic Arrays Chapter 5 <2>
3 Introduction Digital building blocks: Gates, multiplexers, decoders, registers, arithmetic circuits, counters, memory arrays, logic arrays Building blocks demonstrate hierarchy, modularity, and regularity: Hierarchy of simpler components Well-defined interfaces and functions Regular structure easily extends to different sizes You can use these building blocks to build a processor (see Chapter 7, CpE 3) Chapter 5 <3>
4 Review: -Bit Adders Half Adder Full Adder A B A B + + C in S S A B S = = S C in A B S S = = Chapter 5 <4>
5 Review: -Bit Adders Half Adder Full Adder A B A B + + C in S S A B S = = S C in A B S S = = Chapter 5 <5>
6 Review: -Bit Adders Half Adder Full Adder A B A B + + C in S S A B S = A B = AB S C in A B S S = A B C in = AB + AC in + BC in Chapter 5 <6>
7 Multibit Adders (CPAs) Types of carry propagate adders (CPAs): Ripple-carry (slow) Carry-lookahead (fast) Prefix (faster) see book Carry-lookahead and prefix adders faster for large adders but require more hardware Symbol A B + S C in Chapter 5 <7>
8 Ripple-Carry Adder Chain -bit adders together Carry ripples through entire chain Disadvantage: slow A 3 B 3 A 3 B 3 A B A B + C + 3 C 29 C + C + C in S 3 S 3 S S Chapter 5 <8>
9 Ripple-Carry Adder Delay t ripple = t FA where t FA is the delay of a -bit full adder Chapter 5 <9>
10 Carry-Lookahead Adder Some definitions: Column i produces a carry out by either generating a carry out or propagating a carry in to the carry out Chapter 5 <>
11 Carry-Lookahead Adder Some definitions: Column i produces a carry out by either generating a carry out or propagating a carry in to the carry out Generate (G i ) and propagate (P i ) signals for each column: Generate: Column i will generate a carry out if A i AD B i are both. G i = A i B i Chapter 5 <>
12 Carry-Lookahead Adder Some definitions: Column i produces a carry out by either generating a carry out or propagating a carry in to the carry out Generate (G i ) and propagate (P i ) signals for each column: Generate: Column i will generate a carry out if A i AD B i are both. G i = A i B i Propagate: Column i will propagate a carry in to the carry out if A i OR B i is. P i = A i + B i Chapter 5 <2>
13 Carry-Lookahead Adder Some definitions: Column i produces a carry out by either generating a carry out or propagating a carry in to the carry out Generate (G i ) and propagate (P i ) signals for each column: Generate: Column i will generate a carry out if A i AD B i are both. G i = A i B i Propagate: Column i will propagate a carry in to the carry out if A i OR B i is. P i = A i + B i Carry out: The carry out of column i (C i ) is: C i = G i + P i C i- Chapter 5 <3>
14 Carry-Lookahead Adder Some definitions: Column i produces a carry out by either generating a carry out or propagating a carry in to the carry out Generate (G i ) and propagate (P i ) signals for each column: Generate: Column i will generate a carry out if A i AD B i are both. G i = A i B i Propagate: Column i will propagate a carry in to the carry out if A i OR B i is. P i = A i + B i Carry out: The carry out of column i (C i ) is: C i = G i + P i C i- = A i B i + (A i + B i )C i- Chapter 5 <4>
15 Carry-Lookahead Adder Compute carry out ( ) for k-bit blocks using generate and propagate signals Chapter 5 <5>
16 Carry-Lookahead Adder Example: 4-bit blocks: Chapter 5 <6>
17 Carry-Lookahead Adder Example: 4-bit blocks: Propagate: P 3: = P 3 P 2 P P All columns must propagate Generate: G 3: = G 3 + P 3 (G 2 + P 2 (G + P G )) Most significant bit generates or lower bit propagates a generated carry Chapter 5 <7>
18 Carry-Lookahead Adder Example: 4-bit blocks: Propagate: P 3: = P 3 P 2 P P All columns must propagate Generate: G 3: = G 3 + P 3 (G 2 + P 2 (G + P G )) Most significant bit generates or lower bit propagates a generated carry Generally, P i:j = P i P i- P i-2 P j G i:j = G i + P i (G i- + P i- (G i-2 + P i-2 G j ) C i = G i:j + P i:j C j- Chapter 5 <8>
19 Carry-Lookahead Addition Step : Compute G i and P i for all columns Step 2: Compute G and P for k-bit blocks Step 3: C in propagates through each k-bit propagate/generate block Chapter 5 <9>
20 Ripple-Carry Adder Chain -bit adders together Carry ripples through entire chain Disadvantage: slow A 3 B 3 A 3 B 3 A B A B + C + 3 C 29 C + C + C in S 3 S 3 S S t ripple = t FA Chapter 5 <2>
21 32-bit CLA with 4-bit Blocks B 3:28 A 3:28 B 27:24 A 27:24 B 7:4 A 7:4 B 3: A 3: 4-bit CLA Block C 27 4-bit CLA Block C 23 C 7 4-bit CLA Block C 3 4-bit CLA Block C in S 3:28 S 27:24 S 7:4 S 3: B 3 A 3 B 2 A 2 B A B A + C 2 + C + C + C in S 3 S 2 S S G 3: G 3 P 3 G 2 P 2 G P G C in P 3: P 3 P 2 P P t CLA = t pg + t pg_block + (/k )t AD_OR + kt FA Chapter 5 <2>
22 Carry-Lookahead Adder Delay For -bit CLA with k-bit blocks: t CLA = t pg + t pg_block + (/k )t AD_OR + kt FA t pg : delay to generate all P i, G i t pg_block : delay to generate all P i:j, G i:j t AD_OR : delay from C in to of final AD/OR gate in k-bit CLA block An -bit carry-lookahead adder is generally much faster than a ripple-carry adder for > 6 Chapter 5 <22>
23 Adder Delay Comparisons Compare delay of 32-bit ripple-carry and carry-lookahead adders CLA has 4-bit blocks 2-input gate delay = ps; full adder delay = 3 ps Ripple t ripple = t FA = 32 3 = 9.6 ns Carry-lookahead t CLA = t pg + t pg_block + /k t AD_OR + k t FA t CLA = = 3.3 ns AD/OR 6 Gates for G 3: 3 Gates for C in Chapter 5 <23>
24 Subtracter Symbol A B - Y Implementation A B + Y Chapter 5 <24>
25 Comparator: Equality Symbol Implementation A 3 B 3 A 4 = B 4 A 2 B 2 A Equal Equal B A B Chapter 5 <25>
26 Counters Increments on each clock edge Used to cycle through numbers. For example,,,,,,,,,, Example uses: Digital clock displays Program counter: keeps track of current instruction executing Symbol Implementation CLK CLK Q Reset + r Reset Q Chapter 5 <26>
27 Counters Increments on each clock edge Used to cycle through numbers. For example,,,,,,,,,, Example uses: Digital clock displays Program counter: keeps track of current instruction executing Symbol Implementation CLK CLK Q Reset + r Reset Q Chapter 5 <27>
28 Shift Registers Shift a new bit in on each clock edge Shift a bit out on each clock edge Serial-to-parallel converter: converts serial input (S in ) to parallel output (Q :- ) Symbol: Q S in S out Chapter 5 <28>
29 Shift Registers Shift a new bit in on each clock edge Shift a bit out on each clock edge Serial-to-parallel converter: converts serial input (S in ) to parallel output (Q :- ) Symbol: Implementation: CLK Q S in S out S in S out Q Q Q 2 Q - Chapter 5 <29>
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