EECS240 Spring Today s Lecture. Lecture 2: CMOS Technology and Passive Devices. Lingkai Kong EECS. EE240 CMOS Technology

Transcription

1 EECS240 Spring 2013 Lecture 2: CMOS Technology and Passive Devices Lingkai Kong EECS Today s Lecture EE240 CMOS Technology Passive devices Motivation Resistors Capacitors (Inductors) Next time: MOS transistor modeling 2 1

2 EE240 Process 45nm 1P9M CMOS Minimum channel length: 50nm 1 level of polysilicon 9 levels of metal (Cu) 1V supply Models for this process not real Other processes you might see Shorter channel length (28nm / 1V, 20nm / 1V) Bipolar, SiGe HBT SOI FinFET 3 Process Options Available for many processes Add features to baseline process E.g. Silicide block option High voltage devices (2.5V & 3.3V, >10V) Low V TH devices Capacitor option (2 level poly, MIM) 4 2

3 CMOS Cross Section Metal Poly p - substrate n - well p + diffusion n + diffusion 5 Dimensions 1.4nm ³ 90nm 50nm 0.6m m 700m m Drawing is not to scale!" 6 3

4 CMOS Process Overview 7 Why Talk About Passives? 8 4

5 Resistors What are the Options in CMOS? Metal p- substrate p+ diffusion Poly n- well n+ diffusion 10 5

6 Resistors: Options Poly resistors Diffusion resistors N-Well resistors Metal resistors Transistor as resistors 11 N-Well Resistor 12 6

7 N-Well Resistor? How much does N-well resistor vary? 13 Silicide Block Option Non-silicided layers have significantly larger sheet resistance Type Silicided Non-Silicided N+ Poly ~5Ω ~100Ω P+ Poly ~5Ω ~180Ω N+ Diffusion ~5Ω ~50Ω P+ Diffusion ~5Ω ~100Ω 14 7

8 Poly Resistor 15 Diffusion Resistor p - substrate p + diffusion n - well n + diffusion V 1 V 2 V B Applied voltage modulates depletion width (cross-section of conductive channel) Well acts as a shield R V1 V2 R = I Ro + T o V1 + V ( T 25 ) + V ( V V ) + B V 2 1 C C 1 2 C 2 16 B 8

9 Temperature and Voltage Coefficient Layer R/ [Ω/ ] T C [ppm/ o T = 25 o C N+ poly P+ poly N+ diffusion P+ diffusion N-well V C [ppm/v] ,000 B C [ppm/v] , Compensation 18 9

10 Resistors: Specs Resistivity sheet resistance Linearity (Voltage Dependency) Temperature Coefficient Parasitic Variability and Matching Stress Electromigration (EM) 19 Systematic Variations from Layout Example: R 2R? Use unit element instead: 2R R 20 10

11 Better Unit Element 21 Common Centroid and Dummies Example: R1 : R2 = 1 : 2" Dummy à " gradient" 0.5 * R2 + ΔR" R1" 0.5 * R2 - ΔR" Dummy à " 22 11

12 Resistor Layout (cont.) Serpentine layout for large values:" Better layout (mitigates offset due to thermoelectric effects):" See Hastings, The art of analog layout, Prentice Hall, 2001." 23 MOSFETs as Resistors Triode region ( square law ): DS I D = µ Cox VGS VTH V DS for VGS VTH > Small signal resistance: 1 I = R V R µ C Voltage coefficient: V C D W L DS ox = µ C 1 W L 1 R = R V ( V V ) GS ox DS W L = V V 2 ( V V V ) TH GS GS TH 1 V TH for V DS V DS GS V TH >> V DS V DS 24 12

13 MOS Resistors Example: R = 1 MΩ V C VDS = 0V 1 R W µ Cox L 1 = µ C R V W L 1 V 1 = = 0.5V 2V ( V V ) ( V ) 1 = = µa 100 1MΩ 2V 2 V = V GS ox TH GS GS 1 TH TH Large R-values realizable in small area Very large voltage coefficient Applications: MOSFET-C filters: (linearization) Ref: Tsividis et al, Continuous-Time MOSFET-C Filters in VLSI, JSSC, pp , Feb Biasing: (>1GΩ) Ref: Geen et al, Single-Chip Surface-Micromachined Integrated Gyroscope with 50 o / hour Root Allen Variance, ISSCC, pp , Feb Resistor Summary No or limited support in standard CMOS Costly: large area (compared to FETs) Nonidealities: Large run-to-run variations Temperature coefficient Voltage coefficients (nonlinear) Avoid them when you can Especially in critical areas, e.g. Amplifier feedback networks Electronic filters A/D converters We will get back to this point 26 13

14 Capacitors Capacitors Simplest capacitor: substrate" What s the problem with this? 28 14

15 Capacitors Improved capacitor: substrate" Is this only 1 capacitor? 29 Capacitor Options 30 15

16 Capacitor Options Type C [af/µm 2 ] V C [ppm/v] T C [ppm/ o C] Gate 10,000 Huge Big Poly-poly (option) Metal-metal Metal-substrate 30 Metal-poly 50 Poly-substrate 120 Junction caps ~ 1000 Big Big 31 MOS Capacitor High non-linearity, temperature coefficient But, still useful in many applications, e.g.: (Miller) compensation capacitor Bypass capacitor (supply, bias) 32 16

17 Capacitor Layout Unit elements" Shields:" Etching" Fringing fields" Common-centroid " Wiring and interconnect parasitics" Ref.: Y. Tsividis, Mixed Analog-Digital VLSI Design and Technology, McGraw-Hill, 1996." 33 MIM Capacitors Some processes have MIM cap as add-on option Separation between metals is much thinner Higher density Used to be fairly popular But not as popular now that have many metal layers anyways 34 17

18 Capacitor Geometries Horizontal parallel plate Vertical parallel plate Combinations Ref: R. Aparicio and A. Hajimiri, Capacity Limits and Matching Properties of Integrated Capacitors, JSSC March 2002, pp MOM Capacitors Metal-Oxide-Metal capacitor. Free with modern CMOS. Use lateral flux (~L min ) and multiple metal layers to realize high capacitance values 36 18

19 MOM Capacitor Cross Section Use a wall of metal and vias to realize high density More layers higher density May want to chop off lower layers to reduce C bot Reasonably good matching and accuracy 37 Distributed Effects Can model IC resistors as distributed RC circuits. Could use transmission line analysis to find equivalent 2-port parameters. Inductance negligible for small IC structures up to ~10GHz

20 Effective Resistance High frequency resistance depends on W, e.g.: W=1µ 10kΩ resistor works fine at 1GHz W=5µ 10kΩ resistor drops to 5kΩ at 1 GHz May need distributed model for accurate freq response 39 Capacitor Q Current density drops as you go farther from contact edge 40 20

21 Double Contact Strucutre If contact on both edges, R drops 4X Can be a good idea even if not hitting distributed effects 41 Inductors 21

22 Passives: Inductors 43 What About Inductors? Mostly not used in analog/mixed-signal design Usually too big More of a pain to model than R s and C s But they do occasionally get used Example inductor app.: shunt peaking Can boost bandwidth by up to 85%! Q not that important (L in series with R) But frequency response may not be flat 44 22

23 Spiral Inductors Used widely in RF circuits for small L (~1-10nH). Use top metal for Q and high self resonance frequencies. Very good matching and accuracy if you model them right 45 23