BSIM-CMG Model. Berkeley Common-Gate Multi-Gate MOSFET Model
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1 BSIM-CMG Model
2 Why BSIM-CMG Model When we reach the end of the technology roadmap for the classical CMOS, multigate (MG) CMOS structures will likely take up the baton. Numerous efforts are underway to enable large scale manufacturing of MG FETs. At the same time, circuit designers are beginning to design and evaluate multi-gate CMOS circuits. A BSIM-CMG compact model is developed at Berkeley University in order to meet the present and future needs of circuit developers (short term) and circuit designers (long term) using MG nano-fet technology BSIM-CMG model provides maximum versatility (regarding multi-gate device geometry and technology) without compromising ease of use and computational efficiency BSIM-CMG has been developed to model the electrical characteristics of Common MG (CMG) structures (all gates are electrically tied together). A separate model, the BSIM-IMG, has been developed to model the Independent MG (IMG) structure, but it is not yet officially released - 2 -
3 Versatility of Multi-Gate FET Structures in BSIM-CMG Users can specify the MG structure of interest via the geometry mode selector (GEOMOD) Double Gate GEOMOD=0 Triple Gate GEOMOD=1 Quadruple Gate GEOMOD=2 Cylindrical Gate GEOMOD=3 SOI Bulk BSIM-CMG is implemented in two versions (modes of operation): three-terminal BSIMCMG-SOI mode (with D, G, S ports) and 4- terminal BSIMCMG-BULK mode (with D, G, S, B ports)
4 BSIM-CMG is a Surface Potential Based Model Physical surface-potential-based formulations are derived for both intrinsic and extrinsic models with finite body doping The surface potentials at the source and drain ends are solved analytically with polydepletion and quantum mechanical effects. If the channel doping concentration is low enough to be neglected computational efficiency can be further improved by setting COREMOD = 1 The effect of the finite body doping is captured through a perturbation approach. The analytic surface potential solution agrees with 3-D device simulation results without fitting parameters Electric Potential (V) Lines: Model Symbol: 3-D simulation Y s Y d Gate Voltage (V) Surface potential in BSIM-CMG in comparison to 3-D simulation - 4 -
5 Treatment of the Corner Effects corner transistor flat transistor Electron concentration in different MG structures operating in saturation (Silvaco Atlas- Device 3D) The corner transistor needs to be modeled separately First order model is a quartercylindrical MOSFET Developed also a quarter-cylinder model including finite doping - 5 -
6 Physical Phenomena Captured by BSIM-CMG Volume inversion is included in the solution of the Poisson s equation Analysis of the electrostatic potential in the body of MG MOSFETs provided the model equation for the short channel effects (SCE). The extra electrostatic control from the end-gates (top/bottom gates) (triple or quadruple-gate) is also captured in the short channel model Hybrid-surface-orientation mobility, corner-induced effective width reduction, and end-channel-enhanced electrostatic control are modeled for different MG structures for efficient computation BSIM-CMG provides the flexibility to model devices with novel materials. This includes parameters for non-silicon channel devices and High-K/ Metal-gate stack Other important effects, such as, mobility degradation, velocity saturation, velocity overshoot, series resistance, channel length modulation, quantum mechanical effects, gate tunneling current, gate-induced-drain-leakage, temperature effects, thermal/flicker/shot noise, and parasitic capacitance, are also incorporated in the model - 6 -
7 Model Verification: Symmetry at Vds=0-7 -
8 Model Verification: Global Fitting for nfets Vds=50mV Lg = 90n Drain Current(A) Transconductance(A/V) Drain Current(A) Drain Current(A) Vgs=1.0V Vgs=0.8V Vgs=0.6V Vgs=0.4V Drain Voltage(V) Drain Current(A) Vds=50mV Transconductance(A/V) Drain Current(A) Output Resistance(Ω) Lg = 90n Vgs=0V Vgs=0.2V Vgs=0.4V Drain Voltage(V) - 8 -
9 BSIM-CMG v103.0 in SmartSpice 17 Stage Ring Oscillator Berkeley Test Example - 9 -
10 Berkeley BSIM-CMG Release History Date Release Version Modifications BSIM-CMG 1.0-alpha Basic core I-V, C-V model, short channel effects, field dependent mobility/velocity saturation, GIDL, gate tunneling current, quantum Effects BSIM-CMG 1.0 Binning equations, output conductance, I gs, I gd BSIM-CMG Bug fixes BSIM-CMG alpha External R ds, Temperature effects, Flicker/thermal/shot noise models, NQS gate resistance, BSIM-CMG (also official release of 1.1.0) Parasitic Resistance/Capacitance Models, Gmin
11 Berkeley Release History Date Release Version Modifications BSIM-CMG Cylindrical gate geometry with an associated short channel scale length and quantum effects model. Polydepletion model. Self-heating with addition of a temperature node. Asymmetry in GIDL/GISL currents. Junction capacitance and junction current equations with source-drain asymmetry. Introduction of SHMOD, RGATEMOD, NQSMOD and RDSMOD flags to control the number of internal nodes for faster simulations
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