Lecture 6: 2D FET Electrostatics

Transcription

1 Lecture 6: 2D FET Electrostatics Lecture 6, High Speed Devices

2 Lecture 6: III-V FET DC I - MESFETs Reading Guide: Liu: (he mainly focuses on the single heterostructure FET) Jena: Lecture 6, High Speed Devices

3 Common Field Effect Transistors +V GS +V DS +V GS +V DS Insulator n ++ n ++ p Traditional Si-MOSFET +V GS +V DS Insulator/WB n ++ QW n ++ Wide Bandgap/insulator Quantum Well HEMT /SOI MOSFET/ Graphene FET +V GS +V DS n ++ Wide Bandgap n ++ Insulator/WB n ++ QW / Nanowire n ++ Small Bandgap (i/p - ) Insulator/WB Old School HEMT +V GS FinFET / Nanowire FET / Carbon Nanotube FET 3

4 2D Field Effect Transistors V GS t ox t w e ox QW, e s Wide Band Gap / Insulator Narrow Band Gap, Quantum Well Wide Band Gap / Insulator Typical Thickness: t ox 2-10 nm Thick enough to prevent tunneling from QW to the gate. Thin to prevent short channel effects. Typical Thickness: t w nm Ground We will demonstrate that the QW charge can be written as: Thick enough to keep surface roughness under control. (µ n ~ 1/L W6 ) Thin to prevent short channel effects. qn s = C G (V GS V T ) Lecture 6, High Speed Devices

5 2D Field Effect Transistors t ox t w QW V GS Gate potential y s : Surface potential E y s V OX On-state (V GS -V T ) C ox = ε oxε 0 t ox C q = q2 m πħ 2 y C c = ε sε 0 0.1t w Ground Potential drop over the QW. V GS below V T : Off V GS above V T : On qn s N 2D e q kt V GS V T 0 qn s = C G (V GS V T ) 1 = C G C ox C q C c Lecture 6, High Speed Devices

6 Quantum / Semiconductor Capacitance C q = q2 m πħ 2 Q = CV E F E F E 1 = qψ s d 2 dx 2 V(x) = qn s ε s ε 0 0 Quantum Well Charge: n s = N 2D F 0 η F qψ S On-state: E F -E 1 >>0 m πħ 2 (E F E 1 ) qn S q2 m πħ 2 ψ s = C q ψ s Quantum / Semiconductor capacitance: q(e F -E 1 ) needs to increase by qn s C q = ψ s. If the induced charge in the quantum well is small: E C remains ~ flat around the well V T =0V 6

7 Oxide Capacitance / qn s qv ox qψ s + V ox - C ox = ε oxε 0 t ox Q = CV E F Q=qn s qv GS Potential drop over the oxide: V ox = qn s C ox Total Potential drop: Total Gate Capacitance: V GS = V ox + ψ s = qn s C ox + qn s C q 1 = C G C ox C q = qn s C G qn s = C G (V GS ) V T =0V 7

8 Charge Centriod Capacitance There is charge qn s inside the quantum well ρ y qn s t w ε t W = 0 All charge inside the QW ε x = qn S ε s ε 0 (1 y t w ) ΔV x = qn S ε s ε 0 ( y2 2t w y) C c = ε oxε t w Q = CV Also gives C ox ε 0 + = qn S ε s ε 0 D 0 + = D(0 ) y This leads to a upward shift of E 1 From first order perturbation theory: t w ΔE Ψ 1 qv x Ψ 1 = q2 n s 2 sin 2 ε s ε 0 t w 0 yπ y 2 y dy = = t w 2t w ε 0 = qn S ε ox ε 0 V ox = ε 0 t ox = qn s t ox ε ox ε 0 ΔE = 2q 2 n s (?) t w 1 ε s ε π 2 To obtain the same n s : we need to add an extra Δψ s! Δψ s = qn s 1 C c V T =0V

9 n s : Above / Below V T V GS = V ox + ψ s + Δψ s V GS = qn S C ox + qn S C q + qn S C c 1 C G = 1 C ox + 1 C q + 1 C c Sub threshold: E F < E 1. n s becomes small. V ox 0V Δψ s 0V ψ S V GS y s On-state (V GS -V T ) C ox = ε oxε 0 t ox C q = q2 m πħ 2 C c = ε sε t w n s = N 2D F 0 η F N 2D e E F E 1 kt = N 2D e V GS kt Below V T exponentially decreasing n s The effect of C q and C C can be modeled as an effective thicker t ox. CG = ε oxε 0 t ox + Δt ox V T =0V 9

10 Ideal MOS : Threshold Voltage : V T Thermal Equlibrium φ m χ φ m χ E 1 qv T V T = φ m χ + E 1 q V T can be controlled through the choice of gate metal. Si-SiO 2 follow this model well. For III-V MOSFETs : interface defects complicates V T adjustment. 10

11 Ideal HEMT : Threshold Voltage : V T t b Wide bandgap semiconductor QW Schottky Barrier mainly set by the WG semiconductor: φ b DE c E 1 V T = φ b ΔE c + E 1 q An High Electron Mobility Transistor uses wide bandgap semiconductors instead of an oxide. Excellent quality of the quantum well! 11

12 HEMT : Threshold Voltage Adjustment t b QW d Doping N D φ 00 = qn D 2 t b δ 2 Positive (empty ) donors inside the barrier induces a band bending φ 00 φ b DE c E F,m E 1 V T = φ b ΔE C + E 1 q φ 00 This can be used to tune V T towards negative values. 12

13 2D MOSFET : Analytic / 1D Schrödinger/Possion Comparison n s = C G (V GS V T ) Numerical Model Analytic Model φ b = 5eV ΔE C = 4.7eV E 1 = 0.16 ev V T = 0.46 V t ox =5 nm t w =10 nm m * =0.023m 0 +The model accurately predicts n s (V GS ) above V T! -Not accurate below V T -Only using the EMA 13

14 2D MOSFET : Analytic / 1D Schrödinger/Possion Comparison Analytic model below V T Analytic Model (above V T ) Numerical Model Model below V T n s = N 2D e V GS V T kt We get two very simple, physically correct and easy to use models accurate below and above V T. t ox =5 nm t w =10 nm m * =0.023m 0 14

15 Single Heterostructure HEMT n(y) causes band bending! E C E C Approximately Triangular Quantum Well Thermal Equlibrium 15

16 Single Heterostructure HEMT Triangular Well: E n depends strongly on the charge in well. E 2 e i,2 qns e V ~ qe i, 2x s Electric field at interface Potential variation at interface E 1 E 1 is only strongly defined for a finite value of n s E n 2 h 8 2m * 3 qe 2 i,2 2/3 n 1 4 2/ ( qn s / e ) s 2/3 (In (ev)) This contributes a C C type capacitance n s DkT ln 1 exp E f k n 1 kt 2/3 s This contributes a C q type capacitance 16

17 Single Heterostructure HEMT φ 00 ε i = qn s ε s E c E F V T = φ b ΔE c q C G = ε rε 0 t b + Δt b + E f0 q φ 00 n s = C G (V GS V T ) E f0 and Dt b is from a numerical fit taking C q and C c into account. For GaAs: Dt b ~ 74Å. Single Heterstructure HEMT Triangular Quantum Well due to electrons in the NG semiconductor Doping in the barrier can be used to tune V T Typically smaller C c (which is not good!) as compared with a QW FET. 17