CHAPTER 2 AN OVERVIEW OF TCAD SIMULATOR AND SIMULATION METHODOLOGY

Transcription

1 15 CHAPTER 2 AN OVERVIEW OF TCAD SIMULATOR AND SIMULATION METHODOLOGY In this chapter TCAD and the various modules available in the TCAD simulator have been discussed. The simulation methodologies to extract DC parameters, V T, I ON, I OFF and R o and AC parameters, f t, NQS delay, intrinsic gain and NF have also been discussed. Sensitivity analysis and screening experiment method which are used to rank the parameters are discussed in detail. 2.1 INTRODUCTION Technology CAD (TCAD) refers to using computer simulations to develop and optimize semiconductor processing technologies and devices. TCAD simulation tools solve fundamental, physical partial differential equations, such as diffusion and transport equations for discretized geometries, representing the silicon wafer or the layer system in a semiconductor device. This deep physical approach gives TCAD simulation predictive accuracy. It is therefore, possible to substitute TCAD simulations for costly and time-consuming test wafer runs when developing and characterizing a new semiconductor device or technology. TCAD simulations are widely used throughout the semiconductor industry. As technologies become more complex, the semiconductor industry relies increasingly more on TCAD to cut costs and speeds up the research and development process. In addition, semiconductor manufacturers use TCAD

2 16 for yield analysis, which is, monitoring, analyzing, and optimizing their IC process flows, as well as analyzing the impact of IC process variation. 2.2 SENTAURUS TCAD Sentaurus TCAD from (Synopsys ) is used in this study. There are various modules in Sentaurus TCAD and we have used the following modules. Sentaurus Structure Editor (SDE) Sentaurus Device (SDEVICE) Inspect Tecplot Sentaurus Workbench These modules are discussed as follows Sentaurus Structure Editor Sentaurus Structure Editor is a structure editor, which can be used to build 2D and 3D device structures. The contact sets are defined and the contact placement is done in SDE. It has built-in, analytical profiles allowing user to define doping and algorithms for meshing the device. The grid and doping file (TDR format) contains two kinds of information: One is the device geometry, including the regions and materials of the device, the locations of the contacts, and the mesh points, including the location of all the discrete points, also called nodes or vertices. The other is the field values in the device, for example, the doping profiles. The structure file can be 1D, 2D, or 3D. They are typically generated by the mesh engine Mesh.

3 17 In addition, it can emulate semiconductor process steps. It has three distinct operational modes: 2D structure editing, 3D structure editing, and 3D process emulation. From the graphical user interface, 2D and 3D device models are created geometrically, using 2D or 3D primitives, such as rectangles, polygons, cuboids, cylinders, and spheres. Apart from these, there are some options like filleting, 3D edge blending, and chamfering are also available. The main types of input and output file supported by Sentaurus Structure Editor are explained. Input file - This is a user-defined script file that contains scheme script commands describing the steps to be executed by Sentaurus Structure Editor in creating a device structure. This file can be edited to change its content. Output file - This is an output file to view the structure of the device and it is given as input to the SDEVICE file. The other file formats that are supported by SDE are *.sab, *.sat. *.bnd, *.tdr,*.cmd,*.lyt,*.grd,*.scm and *.tcl Sentaurus Device Sentaurus Device is a comprehensive, semiconductor, device simulator framework capable of simulating the electrical, thermal, and optical characteristics of silicon-based and compound semiconductor devices. It simulates 1D, 2D, and 3D geometries over a wide range of operating conditions, including mixed-mode circuit simulation, combining numeric devices with compact models. It incorporates advanced physical models and robust numeric methods for the simulation of most types of semiconductor device ranging from very deep submicron silicon MOSFETs to large bipolar power structures.

4 18 and SDEVICE. Figure 2.1 shows the flow diagram of input and output files in SDE Figure 2.1: Flow of input and output files in SDE and SDEVICE Input Command File A typical input command file of Sentaurus Device consists of several command sections (or statement blocks) with each section executing a relatively independent function. The input command file typically contains the following sections: File The File section defines the input and output files of the simulation. Sentaurus Device expects one essential file of input to define the device structure. A Sentaurus Device simulation produces several output files: The Current file contains the electrical output data, such as currents, voltages, and charges at each of the contacts. The Output file contains all the informative texts that Sentaurus Device has downloaded during a run, including the physical models that have been activated and the parameter values that have been used.

5 19 Electrode The electrical (or thermal) contacts of the device, together with their initial bias conditions, are defined in the Electrode section. If there is a special boundary condition for a contact, it can be defined here. Each electrode defined here must match exactly (case sensitive) an existing contact name in the structure file and only the contacts that are named in the Electrode block are included in the simulation. If the ideal gate contact is used, then Barrier is the parameter to be used. Physics In the Physics section, physical models to be used in the simulation are declared. Example models include the carrier mobility model, the bandgap narrowing model, the carrier generation and recombination model, the impact ionization model, and the gate leakage model. Options are available to specify a particular region in a device using Material= material name or Region= region name. In the Physics section, the models are only declared or activated. The models for velocity saturation and mobility degradation are also available. Depending on the device under investigation and the level of modeling accuracy required, Drift-Diffusion simulation mode is chosen in this study. This is an isothermal simulation, described by basic semiconductor equations and is suitable for low power density devices with long active regions. Math Sentaurus Device solves the device equations (which are essentially a set of partial differential equations) self-consistently, on the discrete mesh, in an iterative fashion. For each iteration, an error is calculated and Sentaurus Device attempts to converge on a solution that has an acceptably small error.

6 20 The Math section is used to control the numeric solver in the simulation. The Math parameters to the solution algorithms are device independent and must only appear in the base Math section. These can be grouped by solver type. The control parameters for the linear solvers are Method and SubMethod. The keyword Method selects the linear solver to be used, and the keyword SubMethod selects the inner method for blockdecomposition methods. The two linear solvers PARDISO and ILS support the option MultipleRHS to solve linear systems with multiple right-hand sides. This option is only appropriate for AC analysis. Solve To get an initial solution, equilibrium condition is first reached with the Poisson equation. The initial bias conditions are taken from those specified in the Electrode section. The Poisson equation and carrier continuity equations are solved self consistently in a single Newton solver. Plot The Plot section is used to specify the solution variables that are to be saved in the Plot file (named in the File section), which is performed at the end of the simulation or saved in a file using the Plot command within the Solve section, which can be performed at any specified bias point. The variables like doping and carrier concentrations, current densities and electric field distributions can be viewed in plot section using Tecplot Tecplot Tecplot SV is a part of Sentaurus Workbench Visualization. It is a plotting software with extensive 2D and 3D capabilities for visualizing data from simulations and experiments. The.tdr file is used to describe a device structure, its meshing and the values of field quantities existing in the corresponding device.

7 Inspect Inspect is a plotting and analysis tool for xy data, such as doping profiles and electrical characteristics of semiconductor devices. Inspect is a tool that is used to display and analyze curves. It features a convenient graphical user interface, a script language and an interactive language for computations with curves Sentaurus Workbench Sentaurus Workbench is the framework designed to make the use of TCAD tools easier. It frees from typing system commands for the handling of data files or starting applications. Sentaurus Workbench is the primary graphical front end that integrates Sentaurus simulation programs into one environment. Sentaurus Workbench automatically manages the information flow from one tool to another. This includes preprocessing user input files, parameterizing projects, setting up and executing tool instances, and visualizing the results. Its intuitive graphical user interface (GUI) is used to design, organize, and run simulations for semiconductor research and manufacturing. Simulations are comprehensively organized into projects. A simulation flow typically consists of several tools, such as the process simulator Sentaurus Process, the meshing tool Mesh, the device simulator Sentaurus Device and the plotting and analysis tool Inspect. Sentaurus Workbench allows defining parameters and variables to run comprehensive parametric analyses. The use of mathematical and logical expressions serves to preprocess the simulation input dynamically. The resulting data can be used with statistical and spreadsheet software.

8 SIMULATION METHODOLOGY In this work, we have used the tools, structure editor, sdevice, tecplot and inspect to investigate the performance of FinFETs, Junctionless FETs and GAA devices. The transistor at different technology nodes are generated using SDE. From the output structure of the SDE structure editor, suitable mesh for device simulation is generated. SDEVICE device simulator is used to extract the device related parameters. The physics section of SDEVICE includes the appropriate models for band to band tunneling, quantization of inversion layer charge, doping dependency of mobility, effect of high and normal electric fields on mobility, and velocity saturation Extraction of V T, I ON, I OFF and R o From the saturation I D -V G characteristics, I ON, I OFF and V T are extracted. I OFF is extracted when drain voltage is maximum and the gate voltage is zero. I ON is extracted when both the gate and drain voltages are maximum. V T is extracted by constant current method with value of 10-7 A. This is the method wherein the gate voltage is extracted at which the drain current exceeds a given current level. From the I D -V D characteristics, R o is extracted at different gate bias Extraction of f t In a small-signal analysis simulation, Sentaurus Device computes the Y-matrix. The Y-matrix describes how the currents in a circuit would react if the applied voltages at different contact nodes of the circuit change. For any two-port network, the current and voltage can be represented in matrix form as follows

9 23 i Y Y V i Y Y V (2.1) The output of the SDEVICE has the following form ( a, c ) ( a, c ) ( a, c ) ( a, c ) (2.2) This can be interpreted in the following way i ( a j c ) ( a j c ) V i ( a j c ) ( a j c ) V (2.3) The complex Y-matrix can be split into two parts: The real part a is called conductance matrix, which measures the in-phase response of the current with the voltage, the imaginary part c is called the capacitance matrix, which measures the out-phase response. The symbol j = -1 specify the imaginary part of a complex variable and denotes the frequency of the small-signal change. Standard AC simulations are done in SDEVICE and AC Y simulations yield Y parameter matrix. f t is the frequency at which Y ( f ) ( f ) equals one, and it strongly depends on the gate bias. At various gate biases f t is calculated and the maximum of them is taken as f t. Figure 2.2 depicts the graph of the variation of f t with respect to gate bias.

10 24 Figure 2.2: Typical graph of f t versus gate bias Non-Quasi Static Delay When a small time varying ac signal (V g ) is applied to a gate of the transistor, kept in strong inversion and saturation, the inversion charge takes some time to respond to the gate signal i.e. there is a phase difference( ) between the signal (gate voltage V G ) and the inversion charge response (drain current I D ). When the signal frequency increases, also increases. According to the accuracy needed, may be fixed, and the delay corresponding to this is known as Non-Quasi Static delay ( ). Figure 2.3 shows a typical circuit to study NQS delay. To calculate NQS delay, a transient simulation is performed by plotting V g and I d. i.e. a small time varying AC signal along with a DC bias (0.5V) is applied to the gate. The delay ( ) between the applied gate signal and the drain current is measured to get the NQS delay.

11 25 Figure 2.3: A typical circuit to study NQS delay Figure 2.4 shows a waveform of NQS delay. Here one complete cycle of the wave is associated with an angular displacement of 2 radians. A (t) = A. sin (2 ft + ) = A. sin ( t+ ) (2.4) where f is the frequency and is the angular frequency, A is the amplitude of the signal. Here A=1. The phase is the angle of a signal portion; it is specified in angular degrees and provides a reference to the reference value of the entire signal. It can be calculated as Phase angle (deg) = 360.f. (2.5)

12 26 Figure 2.4: A waveform showing NQS delay Intrinsic Gain The intrinsic gain can be defined as the product of transconductance (g m ) and output resistance (R o ). It is given by Intrinsic gain= g m.r o (2.6) From the saturation I D -V G characteristics, g m is extracted by taking the derivative of the I D -V G curve. From the I D -V D characteristics, R o is extracted. The bias points at which both g m and R o are extracted are taken as V DD /2.

13 Noise Figure The noise figure (NF) is a figure of merit for the high frequency noise of two port devices. Considering the two port model of the MOSFET, the spectrum of the noise power P =v O. i O at the output of the device can be measured and the noise figure is then defined as follows (Schmitusen et al 2000; Schenk et al 2003) NF O, noisy P O, noiseless P (2.7) Figure 2.5: Equivalent network showing noise measurement circuitry Figure 2.5 shows an equivalent network representing the principal noise measurement circuitry neglecting the dc biasing circuit and other parasitic parts. NF depends on the frequency and the admittance of the input noise source Y S. Here P O,noisy is the output noise power if the device under test (DUT) is noisy while P O,noiseless is the output noise power for noiseless DUT. In the noise measurement circuit of Fig. 2.5 the noisy two-port is represented by its Y-parameters and equivalent voltage noise sources e 1 and e 2 at the input and output of the device. These voltage noise sources e 1 and e 2 with the noise voltage auto-correlation spectra S 1 V and S 2 V are correlated through the noise voltage cross-correlation spectrum S 21 V. The voltage noise sources e1 and e2

14 28 could be replaced by current noise sources i 1 =Y 11 e 1 and i 2 =Y 22 e 2 inserted in parallel to the admittances Y 11 and Y 22 respectively. Noise simulation in SDEVICE is a standard AC simulation with noise models included in the physics section. The results from the noise simulation are used to extract the noise figure which is given by NF 1 gg 2 dd gd 1 + SI S I 2 Re ( SI ) s (2.8) S I with Where Y s (2.9) Y11 Y21 admittance and is given by S S I is the current noise spectrum of the noisy source S S k T Re( Y ) (2.10) I 4 B S gg S I and terminals respectively, dd S I are the noise current spectrums, at the gate and drain dg S I is the cross-correlation noise spectra between the drain and gate terminals, Y 11 (i.e. Y gg ) and Y 21 (i.e. Y dg )are the respective admittance parameters. 2.4 SENSITIVITY ANALYSIS Sensitivity analysis is done by varying one parameter at a time, keeping all other parameters as a constant quantity and observing the output quantity of interest (Wong et al 1989). Considering a generalized model with a set of independent variables, X={X 1, X 2, X 3...X n } and a dependent variable (also known as response) Y=f(X), the simplest method of sensitivity analysis

15 29 is to vary one parameter at a time by a given percentage while holding the other parameters fixed (Hamby 1994). Sensitivity coefficient ( i) is defined as i % % Y X i (2.11) where Y is the change in the output parameter and X i is the change in the input parameter considered. A sensitivity ranking can be obtained by looking at the various sensitivity coefficients. For more than one dependent variable response vector (Y) is obtained. The independent vector X, in this study, consists of the structural and doping parameters. The dependent vector, Y consists of f t, NQS delay, intrinsic gain and noise figure. The sensitivity of Y with respect to X can be calculated as YX Y S (2.12) X 2.5 PLACKETT-BURMAN SCREENING METHODOLOGY The statistical design of experiments is an efficient procedure for planning experiments so that the data obtained can be analyzed to yield valid and objective conclusions. DOE is useful at the start of a response surface study where screening experiments should be performed to identify the important system or process parameters. Response Surface Methodology (RSM) involves exploration of a large parameters space, for studying the statistical significance of each one of them through 2 nd order response surface modeling. However performing RSM for a large set of input variables becomes computationally inefficient. Hence it is typically preceded by a step wherein, the relatively insignificant input variables are eliminated from RSM study (screening experiment). This procedure can be visualized as a block

16 30 diagram with multiple, inputs and multiple outputs, as depicted in Fig. 2.6, with the box indicating the system or a process for k process parameters and m responses. Each response is a function of all the input variables. Figure 2.6: Block diagram with input and output variables The successful use of fractional factorial designs are based on a key idea called sparsity of effects (Myers and Montgomery 2002). According to this, if there are several variables, the system or process is likely to be driven by some of the main effects and low order interactions. According to two level Plackett-Burman (PB) DOE, k = N-1 factors can be studied in just N runs of experiments, for N divisible by 4. Through suitable DOE, it can be shown that the j th observation of an actual experiment, y j for j = 1, 2 N, in terms of x i s which vary from -1 to +1, can be expressed as, y j 0 x j1 1 x j x jk k j (2.13) where the constant 0, and the coefficients 1, 2,... k, can be calculated from experimental data, and j is the total effect of all the higher order interactions, which is assumed to be small for most of the practical purposes.

17 31 The purpose of the experiment is to estimate s in Equation 2.13, from a set of measurements m 1, m 2... m N. For this we must solve a set of N linear equations. These equations always involve 0, and therefore to estimate k number of s it is necessary to make at least N = k + 1 measurements. Normally the value of N, the number of runs in an experiment is much less than the complete factorial 2k designs, for k factors. The greater the N, greater will be the precision with which factor effects may be estimated. The estimation of error variance of is minimized when N = 4I, where I is an integer as in a 2 level PB DOE. In the PB designs with factors at 2 levels, all the main effects may be estimated with maximum precision. The parameters that are listed in Fig. 2.6 are assigned to each column of a standard PB, Design Matrix (DM) of Fig. 2.7 (transposed) with 12 runs for 11 factors (NIST 2006). This DM contains vectors of +/- sign, corresponding to ±1 which in turn corresponds to ±10% (=3 ) deviation from the nominal values. Factors Exp. No X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X Figure 2.7: Plackett-Burman (transposed) design matrix

18 32 Four experiments have been performed, each time arbitrarily assigning parameters to the columns of DM. First order models were built for f t, NQS delay, intrinsic gain and NF which are also called as responses, in a single regression from the results that are obtained from all the 4 experiments. This was done for better estimation of model coefficients and hence effective screening. The first order model building involves the estimation of the model coefficient vector for each of the responses from 48(12 X4) runs, using least square error (LSE) technique to compute the model coefficients as, T 1 T X X X Y (2.14) where = [ ft, NQS delay, intrinsic gain, NF ] is a 13x4 coefficient matrix, corresponding to 4 responses, X is the 48x13 matrix (of -1s and +1s for 2 level designs, implying the involved process variable x i s are normalized), which is the DM resulting from 4 experiments, augmented with a first column of +1s, and Y = [y ft, y NQS delay, y intrinsic gain, y NF ] is the 48x4, response matrix, with each column corresponding to their subscripted response parameter, extracted from all the 4 experiments (48 runs). The functional form of each response is in the form of Equation As each variable have the same range from -1 to +1 in a regression model for a particular response, the magnitude of the model coefficients will indicate the significance of the corresponding variable for that response. The model coefficients are generated with the help of SPSS, a statistical tool (SPSS 2011). For the elements of each column of the percentage scale. matrix, a rank can be assigned on a

19 CONCLUSION Since this thesis work is based on TCAD simulation, usage of various modules in this study and their capabilities have been discussed in this chapter. Various parameters, both DC (V T, I ON, I OFF and R o ) and AC (f t, NQS delay, intrinsic gain and noise figure) are used throughout all the chapters. The extraction strategies of these parameters are also discussed. Throughout the chapters the sensitivity analysis is used to rank the parameters and a general procedure to do the sensitivity analysis is also discussed in this chapter.