Carbon Nanotube Electronics

Transcription

1 Carbon Nanotube Electronics Jeorg Appenzeller, Phaedon Avouris, Vincent Derycke, Stefan Heinz, Richard Martel, Marko Radosavljevic, Jerry Tersoff, Shalom Wind H.-S. Philip Wong IBM T.J. Watson Research Center Yorktown Heights, New York Outline Carbon nanotube - a three-minute introduction Nanotube transistor summary of key results What needs to be done going forward? 10/23/2002 1

2 H.-S. Philip Wong The Nanotube Family e.g.: (4,4) Tube Chiral tube a1 Structure (n,m): (5,2) Tube a2 Families and Structure n,m=(10,10) metallic n,m=(10,10) ----metallic STM Image n,m=(10, semiconducting n,m=(10, 0) 0) ----semiconducting Diameter: ~1 nm Length: several µm Bundle of SWNTs 20 nm Multi-wall Carbon Nanotubes (MWNTs) B.I.Yakobson and R.E.Smalley, S.Iijima, Nature 354 (1991) 56 MixtureScientist of semiconducting American 85 (1997) 324 and metallic CNTs [2:1] 10/23/2002 2

3 H.-S. Philip Wong Electronic Structure of SWNT Eg 1998 Carbon Nanotube FETs Tans et al. Delft University Nature 393, 49 (1998) à P-type, high contact resistance Martel et al. IBM App. Phys. Lett. 73, 2447 (1998) à P-type, high contact resistance 10/23/2002 3

4 H.-S. Philip Wong Contacts to Carbon Nanotubes Ti-carbide end-bonded contact In-situ x-ray diffraction with temperature R. Martel et al., Phy. Rev. Lett, p , Ti + carbon nanotube TiC-nanotube Y. Zhang S. Iijima, Science, vol. 285, p. 1719, Improved TiC and Co Contacts Source Nanotube Drain R. Martel, H.-S. P. Wong, K. Chan, Ph. Avouris, IEDM, p. 159, /23/2002 4

5 Improved Turn-Off Characteristics Drain Current (I D ) [A] 1E-6 1E-7 1E-8 1E-9 1E-10 1E-11 Top gate Vd = V (0.2 V steps) 1E Gate Voltage (Vg) [V] Gate oxide = 20 nm S=130 mv/dec DIBL < 100 mv/v S. Wind et al., Appl. Phys. Lett., p. 3817, 2002 CNFET vs Si FET Carbon nanotube array 4r Drain V g =-0.9, -0.7, -0.5, -0.3V Solid Line=CNFET Dashed line = Si FET Source Drain Current I d [ma/mm] V g =-1.2, -1.0, -0.8, -0.6, -0.4, -0.2V V g =1.2, 1.0, 0.8, 0.6, 0.4, 0.2V Drain Voltage V d [V] S. Huang et al, IEDM, p. 237, S. Rosenblatt et al., Nano Letters, vol. 2, p.869, /23/2002 5

6 CNFET vs Si FET Saturation current (Idsat) (ma/µm) Transconductance (ms/µm) Subthreshold slope (mv/dec) Gate geometry Equivalent gate oxide (nm) p-cnfet [e] 1030 nm p-cnfet [f] 260 nm 1.05 (Vdd=1.2V) p-cnfet [g] 1400 nm 1.25 (Vdd=0.8V) 100 nm MOSFET 1.04 (nfet) [a] 0.46 (pfet) [a] (Vdd=1.5V) 50 nm MOSFET [d] 0.95 (nfet) 0.41 (pfet) (Vdd=1.2V) (nfet) [a] 0.46 (pfet) [a] 1.10 (nfet) (pfet) > Planar, single gate 150 (k=3.9) Planar, single gate 15 (k=3.9) Coaxial 1 (k=80) Planar, single gate 2.0 (Tinv=3.0 nm) Inversion capacitance 0.23 pf/cm 0.57 pf/cm 4 pf/cm (density of states capacitance) Gmsat / C (cm/s) 1.5 % % % % 10 6 (nfet) 4.0 % 10 6 (pfet) CV/I (ps) (nfet) 3.78 (pfet) Charge density at Vg=Vd=Vdd (e/cm 2 ) Planar, single gate 1.4 (Tinv=2.3 nm) 25 nm MOSFET (nfet) [b] (pfet) [b] (Vdd=0.85V) 1.2 (nfet) [b] 0.64 (pfet) [b] Planar, single gate 0.8 (Tinv=1.8 nm) 1.15 µf/cm µf/cm µf/cm % 10 6 (nfet) 2.8 % 10 6 (pfet) 0.95 (nfet) 2.63 (pfet) 6.3 % 10 6 (nfet) 3.4 % 10 6 (pfet) 1.0 (nfet) 1.7 (pfet) 8.1 % % % % ~1 % H.-S. P. Wong et al., ISSCC, Carbon Nanotube Inverter Intra-molecular logic gate Complementary (p- and n-channel) operation CMOS 2 1 Gain>1 V OUT (V) V IN (V) V. Derycke, R. Martel, J. Appenzeller, A. Avouris, Nano Letters, 1 (9), p. 453, /23/2002 6

7 Carbon Nanotube FET is Promising... Because Carrier transport is one-dimensional All bonds are satisfied, stable, and covalent Chemical synthesis controls a key dimension Device is not wed to a particular substrate But much remains to be done: Scalability (ballistic, contact-dominated transport?) Contacts Doping Device stability (charge trapping) High yield, selective growth of nanotubes What Limits Device Performance? Electrostatics Turn-off characteristics Induced charge density Carrier transport in a carbon nanotube transistor Scattering within the tube? Contact-dominated? What makes a carbon nanotube transistor p-type or n-type? 10/23/2002 7

8 Contact-Dominated Device Interchanging source/drain terminals: Vgs : +0.5V to -1.5V steps: -0.2V 400 I d [na] V ds [V] J. Appenzeller et al., Phys. Rev. Lett., Vol. 89, p , 2002 Ambipolar FET Outgassing changes p-type into ambipolar A Schottky barrier model of the contact region may explain the results TiC Ti 1. Low temperature oxide 2. Outgasing at 800 C R. Martel et al., Phys. Rev. Lett., Vol. 87, No. 205, p , /23/2002 8

9 H.-S. Philip Wong Schottky Barrier Nanotube FET J. Appenzeller et al., Phys. Rev. Lett., Vol. 89, p , 2002 Nanotube Technology? How do you get from here to there? 100µm Au CNT 10/23/2002 9

10 The Horowitz Filter Sphere of successful influence: +/- one layer device «materials «physics/chemistry circuit «device «materials system «circuit «device architecture «system «circuit application «architecture «system Hide imperfections Black-box representation to layer above, e.g. BSIM device models for circuit design VHDL for system design M. Horowitz, in Focus Center Research Program (MARCO) MSD-C2S2 Topical Workshop, Nov. 12, 2001 The Fun Ahead Science: Electrostatics, electrodynamics Plenty of room for improvement! No new architecture! Scalability (ballistic? contact-dominated transport?) Contacts, doping Gate insulator, interface traps? High yield, selective growth/synthesis of nanotubes with correct electrical properties... Engineering: Device structure with minimized parasitic resistance and capacitance Fabrication processes leading to high device density (e.g. size of contacts commensurate with gate length, means to connect one device to another) Demonstrate device/circuits which satisfies ALL performance metrics (not just some metrics) Reliability Manufacturing tools and infrastructure, integration with silicon... 10/23/