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1 Supporting Information Monolithically Integrated Flexible Black Phosphorus Complementary Inverter Circuits Yuanda Liu, and Kah-Wee Ang* Department of Electrical and Computer Engineering National University of Singapore 4 Engineering Drive 3, , Singapore eleakw@nus.edu.sg Centre for Advanced 2D Materials National University of Singapore 6 Science Drive 2, , Singapore KEYWORDS: flexible, black phosphorus, monolithic integrated, complementary, inverter. Figure and Table S1. The comparison of the 2DLMs based inverters. S2. AFM spectra of the n-bp transistor on SiO 2 /Si to obtain the thickness information. S3. AFM spectra of the channel of the transistor using Ni and Ti as the contacts. S4. The output characteristics of the undoped FETs using both Ti and Ni electrodes on rigid SiO 2 /Si. S5. Simulation of the contact resistance for Ti and Ni electrodes of undoped BP. S6. Transconductance of the flexible p- and n-transistors. S7. Switching current as a function of the input voltage V IN of the flexible inverter. S8. Electrical characterization of the complementary inverter on rigid SiO 2 /Si. 1
2 S1. The comparison of the 2DLMs based inverters. Table S1. The comparison of the 2DLMs based inverters. Structural Description Substrate Operating Mode References MoS 2 SiO 2 /Si depletion-load type Nano Lett. 212, 12, 4674 p-channel: Bi 2 Sr 2 Co 2 O 8 n-channel: MoS 2 SiO 2 /Si complementary Nat. Mater. 213, 12, 246 MoS 2 Quartz depletion-load polyimide type Nat. Commun. 214, 5, 5143 Electrostatic gated BP SiO 2 /Si complementary ACS Nano 214, 8, 1173 Electrostatic gated Appl. Phys. Lett. 214, 15, SiO WSe 2 /Si complementary Ambipolar MoTe 2 SiO 2 /Si Adv. Mater. 214, 26, 3263 p-channel: BP n-channel: MoS 2 SiO 2 /Si complementary ACS Nano 214, 8, 433 p-channel: WSe 2 n-channel: WSe 2 : K SiO 2 /Si complementary ACS Nano 214, 8, 4948 p-channel: WSe 2 SiO 2 /Si ACS Appl. Mat. Interfaces 215, complementary n-channel: MoS 2 glass 7, Dual-gated BP glass depletion-load Nano Lett. 215, 15, 5778 p-channel: MoTe 2 n-channel: MoS 2 glass complementary ACS Nano 215, 1, 1118 p-channel: WSe 2 doped with F 4 TCNQ - PMMA n-channel: WSe 2 SiO 2 complementary Nano Lett. 215, 15, 4928 p-channel: WSe 2 n-channel: MoS 2 n-channel: BP:Cu p-channel: BP p-channel: MoS 2 : AuCl 3 n-channel: MoS 2 Ambipolar WSe 2 p-channel: WSe 2 n-channel: MoS 2 p-channel: BP n-channel: MoS 2 p-channel: BP n-channel: BP: Al SiO 2 /Si complementary Adv. Mater. 216, 28, 3742 SiO 2 /Si complementary Nano Lett. 216, 16, 2145 SiO 2 /Si complementary Adv. Mater. 216, 28, 2345 SiO 2 /Si polyimide polyimide SiO 2 /Si Quazicomplementary Quazicomplementary complementary Adv. Mater. 216, 28, 4111 complementary 2D Mater. 216, 3, 116 polyimide complementary This Work 2
3 2DLMs based inverters operate either in complementary conductivity type or in the depletionload type. A comparison of the 2DLMs inverter in the literatures is summarized in Table S1. A complementary inverter circuit consists of one p- and one n-type transistor is superior over depletion-load type with respect to power dissipation and voltage gain. We can see that most of the previous efforts to fabricate the complementary inverter circuits typically focus on hybrid combining two discrete 2DLMs semiconductor with different conducting types together due to the lack of reliable dopants doping technique. Such heterogeneous complementary inverter is readily formed via dry transfer process or external wiring. These conceptual circuits can be used to analyze the physical performance of the emerging material and verify the predictive technology, but it will be rather complicated and expensive to handle two kinds of materials for the industrial large scale high-density device integration. Complementary-like inverters based on TMDCs 1, 2 have been reported using the same kind of material as both n- and p- channel depending upon chemical doping in the channel, but the polarity transition is unstable and the devices cannot be exposed to air ambient. The alternative technique of homogeneous complementary inverter employs additional gate biases to adjust channel polarities and threshold voltages, which makes the device structure and the fabrication process complicated. Furthermore, it is observed that these inverters are mainly fabricated on rigid substrates, such as SiO 2 /Si and glass. The only one previous flexible homogeneous complementary inverter was demonstrated using WSe 2 on flexible polyimide substrates. 3 However, complementary inverter based on elemental 2D materials such as black phosphorus has not been demonstrated on flexible substrate before. Furthermore, the two WSe 2 transistors used to assemble the inverter are two discrete transistors exhibiting similar ambipolar transfer characteristics (as shown in Figure below), and the inverter was named to be quasi-cmos inverter, or in other word, their device 3
4 structure is unable to result in a real complementary inverter. Therefore, we can conclude that the flexible homogeneous complementary inverter based on 2DLMS is still elusive, and our studies clearly take the functionality and complexity of the van der Waals layered materials to the next level. REFERENCES: (1) Tosun, M.; Chuang, S.; Fang, H.; Sachid, A. B.; Hettick, M.; Lin, Y.; Zeng, Y.; Javey, A., High-Gain Inverters Based on WSe 2 Complementary Field-effect Transistors. ACS Nano 214, 8, (2) Liu, X.; Qu, D.; Ryu, J.; Ahmed, F.; Yang, Z.; Lee, D.; Yoo, W. J., P-type Polar Transition of Chemically Doped Multilayer MoS 2 Transistor. Adv. Mater. 216, 28, (3) Pu, J.; Funahashi, K.; Chen, C. H.; Li, M. Y.; Li, L. J.; Takenobu, T., Highly Flexible and High-Performance Complementary Inverters of Large-Area Transition Metal Dichalcogenide Monolayers. Adv. Mater. 216, 28,
5 S2. AFM spectra of the n-bp transistor on SiO 2 /Si to obtain the thickness information. a Height (nm) c Height (nm) nm Al ~ 6 nm Distance (nm) nm Al Distance (nm) 5.6 nm b Height (nm) d Height (nm) nm Al ~ 6.1 nm Distance (nm) nm Al ~ 9.7 nm Distance (nm) Figure S1. Topological line profile of the BP channel doped by (a), (b).3, (c).6, and (d).9 nm Al, presenting their thicknesses to be ~6 nm, ~6.1 nm, 5.6 nm, and ~9.7 nm, respectively. 5
6 S3. AFM spectra of the channel of the transistor using Ni and Ti as the contacts. Height (nm) ~11. 3 nm Distance (nm) Figure S2. The thickness of the BP sheet using Ni and Ti as the contacts is measured to be ~11.3 nm. 6
7 S4. The output characteristics of the undoped FETs using both Ti and Ni electrodes on rigid SiO 2 /Si. a = - 1 V - 2 V - 3 V V SD Titanium b = - 1 V - 2 V - 3 V Nickel V SD Figure S3. The output characteristics of the undoped FETs using (a) Ti and (b) Ni electrodes, respectively. It is observed that Schottky barrier exists at the Ti/undoped-BP interface, while Ni is an excellent Ohmic contact. 7
8 S5. Simulation of the contact resistance for Ti and Ni electrodes of undoped BP. The total resistance (R T ) of the transistor can be written as: = + where R C is the contact resistance and R CH is the channel resistance. At low V SD and infinitely large, R CH diminishes asymptotically and R T becomes equal to R C. The resistivity of the channel can be expressed as 1 = where µ CH is the hole mobility, C OX is the oxide capacitance, is the gate voltage. We can see that when becomes infinitely large, the resistivity of the channel would diminish to a negligible small value. The total channel resistance R T at V SD =.1 V has been extracted as a function of for the - curves shown in Figure 1b. A first-order curves exponential curve fitting on the experimental data generates the asymptotic part of the curve. It can be observed that for high values, R T becomes constant, and is taken as R C. When becomes infinitely large, the R C for Ti and Ni electrodes can be extracted to be ~37,8 Ω and ~3,133 Ω from the simulated - curve, and the contact resistance for undoped BP is reduced by ~34 kω by employing Ni contacts as compared to that of Ti contacts, which is in the same order with the experimental value of 28 kω. 8
9 Figure S3a and S3b show the V SD curves of the undoped BP using Ti and Ni electrodes, respectively. It is observed that Schottky barrier exists at the Ti/undoped-BP interface, while Ni is an excellent Ohmic contact, which is in agreement with the relatively larger contact resistance for Ti electrodes. As shown in the band diagram in the inset of Figure 1b, the work function of Ni is lower than the valence-band maximum of BP. Furthermore, the undoped BP shows p-type conductivity, leading to low contact resistance for Ni electrodes, but high Schottky barrier for Ti electrodes as the work function of Ti is inside the conduction band of undoped BP. In summary, Ni is an Ohmic contact for undoped BP, and Ti forms low contact resistance for n-bp doped with Al. Figure S4. Total resistance as a function of gate voltage for the transistors with Ti and Ni as the contacts, respectively. The inset shows the enlarged view of the section highlighted by the grey rectangle. Scatters show experimental measurements on two transistors, and the lines have been fitted to the measurements. 9
10 S6. Transconductance of the flexible p- and n-transistors. a g m (µs) -2-4 p-fet b g m (µs) 1 5 n-fet Figure S5. Transconductance of the (a) p-fet and (b) n-fet, showing high peak transconductance of 7.7 µs for p-fet and 13.2 µs for n-fet, respectively. V SD =.2 V 1
11 S7. Switching current as a function of the input voltage V IN of the flexible inverter. 8 VDD = V 2 V 3 V V IN Figure S6. Switching current as a function of the input voltage V IN. We can see the current peaks for all voltage ranges, confirming the complementary nature of the circuit operation. 11
12 S8. Electrical characterization of the complementary inverter on rigid SiO 2 /Si. a = -.2 V -.4 V -.6 V -.8 V - 1 V b =.2 V.4 V.6 V.8 V 1 V c 1 1 V SD V SD = -.1 V -.2 V -.3 V d 1 1 V SD =.1 V.2 V.3 V V SD e V OUT V DD = 1 V 2 V 3 V f Gain V DD = 1 V 2 V 3 V V IN V IN Figure S7. Black phosphorus complementary inverter on the rigid SiO 2 /Si substrate. Output characteristics ( - V SD ) in terms of for the (a) p-type and (b) n-type BP FET. Transfer curves ( ) of the (c) p-type and (d) n-type BP FET. V SD =.1 V,.2 V and.3 V. (e) V OUT 12
13 - V IN characteristics of the inverter. (f) Voltage gain (-dv OUT /dv IN ) as a function of input voltage V IN. The maximum gain is ~ 2.5 with a threshold voltage of 3 V at V DD = 3 V. 13
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