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1 lock enerator I9LR9KLFT X.Mhz RIII 0/ RIII 0/ lot 0 0 lot RII hannel R II hannel P P/N : 9.NI0.00 REVIION : 0- FIx Intel PU rrandale,,..,9,0 MIx PI EXPRE RPHI X X0 Mhz NP- NP-V Nvida 0,.., iscreet/um/px o-lay R 00MHz VRM //M,9,90,9 Project code: 9.NI0.00(JE-P) PU / IL INPUT OUTPUT TOUT V_ORE YTEM / RT09E 0 INPUT OUTPUT TOUT 0V_VTT 0V_0 YTEM / 9 INPUTRTOUTPUT V_ TOUT V_ RJ ONN IM Mini-ard WLN Mini-ard iga LN R PIE(Port) U.0(Port) PIE(Port) U.0(Port) 0 X Mhz Port PIE X Mhz INTEL PH U.0/. ports ETHERNET (0/00/000Mb) High efinition udio T ports PIE ports PI. LP I/F PI/PI RIE Level shifter Port Port HMI WEM LUETOOTH U.0 Port & Port9 U x LV(ingle hannel) 9 R RT RT HMI L YTEM / RT09E 0 INPUT OUTPUT V_ TOUT 0V_0 R_VREF_ YTEM / IL INPUT OUTPUT TOUT V_FXORE_PWR V RT0 INPUT OUTPUT TOUT V_ORE TI HRER Q INPUT OUTPUT INT MI H UIO OE L ZLI Port ardreader RT /MM M/M Pro/x TOUT T+ YTEM / RT90 INPUT OUTPUT MI IN HP U_ up000 PIE*(Port) U.0*(Port0) U_ up000 YTEM / RT90 INPUT OUTPUT V_0 V_0 T Port0 T H V_V_0 V_V_0 H PEKER X.Khz,,...,,9 PI Port T O witches INPUT OUTPUT V_ V_V_0 V_0 V_V_0 0V_VTT V_V_0 LP us LP debug PI K ENE 90 0 X.Khz Flash ROM M TOP N P TKUP ardreader--> udio---->x PU FN Flash ROM K Thermal ensor 9 Touch P Int. K 0 Power_ N OTTOM Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. lock iagram ize ocument Number Rev JE-P - Wednesday, November, 00 ate: heet of 9

2 E PH trapping Processor trapping Name PKR INIT_V# chematics Notes Reboot option at power-up efault Mode: Internal weak Pull-down. No Reboot Mode with TO isabled: onnect to Vcc_ with.-k - 0-k weak pull-up resistor. Weak internal pull-down. o not pull high. NT#/ PIO INTVRMEN NT0#, NT# NT#/ PIO efault Mode: Internal pull-up. Low (0) = Top lock wap Mode (onnect to ground with.-k weak pull-down resistor). High () = Integrated VRM is enabled Low (0) = Integrated VRM is disabled efault (PI): Left both NT0# and NT# floating. No pull up required. oot from PI: onnect NT# to ground with -k pull-down resistor. Leave NT0# Floating. oot from LP: onnect both NT0# and NT# to ground with -k pull-down resistor. efault - Internal pull-up. Low (0) = onfigures MI for EI compatible operation (for servers only. Not for mobile/desktops). Pin Name F[0] F[] trap escription onfiguration (efault value for each bit is unless specified otherwise) F[] Embedded isplayport : isabled - No Physical isplay Port attached to Embedded isplayport. Presence 0: Enabled - n external isplay Port device is connected to the Embedded isplay Port. F[] PI-Express tatic : Normal Operation. Lane Reversal 0: Lane Numbers Reversed -> 0, ->,... PI-Express onfiguration elect Reserved - Temporarily used for early larksfield samples. : ingle PI-Express raphics 0: ifurcation enabled larksfield (only for early samples pre-e) - onnect to N with.0k Ohm/% resistor Note: Only temporary for early F samples (rp/) [For details please refer to the WW MoW and sighting report]. For a common motherboard design (for U and F), the pull-down resistor should be used. oes not impact U functionality. efault Value 0 PIO efault: o not pull low. isable ME in Manufacturing Mode: onnect to ground with -k pull-down resistor. PI_MOI isable itpm: Left floating, no pull-down required. NV_LE N_LE H_OK_EN# /PIO[] H_O H_YN PIO PIO PIO Enable itpm: onnect to Vcc_ with.-k weak pull-up resistor. Enable anbury: onnect to Vcc_ with.-k weak pull-up resistor. isable anbury: onnect to ground with.-k weak pull-down resistor. Weak internal pull-up. o not pull low. Low (0): Flash escriptor ecurity will be overridden. High () : Flash escriptor ecurity will be in effect. Weak internal pull-down. o not pull high. Weak internal pull-down. o not pull high. Weak internal pull-down. o not pull high. Weak internal pull-up. o not pull low. PIE Routing LNE LNE LNE efault = o not connect (floating) High() = Enables the internal VccVRM to have a clean supply for analog rails. No need to use on-board filter circuit. Low (0) = isables the VccVRM. Need to use on-board filter circuits for analog rails. LN Miniard Miniard U Table Pair 0 0 U U WEM Touch Panel 9 N evice MINIR U(H) Hynix 00M NPV KU lue Tooth Wistron orporation U N N Finger Print MINI ardreader F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Table of ontent JE-P - ize ocument Number Rev ate: Wednesday, November, 00 heet of 9

3 E V_0 V_ V_0_LKEN 0V_VTT R V_K0 V_K0_IO R R 0 R 9 0UVMX-P UVZY-P R 0UVMX-P V_0_LKEN UVZY-P UVZY-P UVZY-P 0UVMX-P V_0 V_XIN_L O_PRE_L E E 0 EMI V_0_LKEN V_K0 V_K0_IO LK_PIE_T_R R LK_PIE_T#_R R LK_PU_LK_R V_XIN_L PUT_LR0 R0 LK_PU_LK LK_PU_LK#_R O_PRE RN LK_PU_LK# O_PRE_L FIX PU_LR0 o Not tuff R V_XIN PUT_LR 0 PU_LR 9 LK_IH,0, PH_MLK,0, PH_MT R RJ--P EN_XTL_IN EN_XTL_OUT LK_EN F PU_TOP# V9 V VPIEX_IO_LV VPIEX VPU_IO_LV VPU 9 VREF LK T X X VTTPWR/P# 0 REF/FL U N# 9LV9KLFT-P.99.0 N = TT_LR 0 T_LR OT9T_LR OT9_LR PIEXT_LR PIEX_LR N9 N NT 9 NPIEX NPU NREF N REFLK_R REFLK#_R LKIN_MI_R LKIN_MI#_R R o Not tuff R9 R R LK_PIE_T LK_PIE_T# REFLK REFLK# LKIN_MI LKIN_MI# V_0 RN RN0KJ--P PH_MT ET PH_MLK ET 09 RF PU_TOP# P0VJN-P EN_XTL_IN 0V_VTT F 0 PEE MHz (efault) 00MHz LK_EN Q 0 X X-M-0P P0VJN-P EN_XTL_OUT_R R EN_XTL_OUT RJ-L-P N = rd =.000. L = 0pF Freq tolertance :+/- 0 ppm R R F R KRJ--P... N00E--P.N0. N =.N0.E VR_LKEN# Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. lock enerator ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9 E

4 0 FI_TXN0 FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXP0 FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_FYN0 FI_FYN FI_INT FI_LYN0 FI_LYN MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP RN FI_LYN FI_FYN FI_FYN0 FI_LYN0 I I For raphics isable, Pull-down to N via -k ± % resistor R MI_RX0# MI_RX# MI_RX# MI_RX# MI_RX0 MI_RX MI_RX MI_RX MI_TX0# MI_TX# F MI_TX# H MI_TX# MI_TX0 F MI_TX E MI_TX MI_TX E FI_TX0# FI_TX# 9 FI_TX# FI_TX# FI_TX# E9 FI_TX# F FI_TX# FI_TX# FI_TX0 FI_TX 0 FI_TX FI_TX FI_TX E0 FI_TX F0 FI_TX 9 FI_TX F FI_FYN0 E FI_FYN PU_P FI_INT F FI_LYN0 FI_LYN UURNLE UURNF,LRKUNF PI EXPRE -- RPHI OF 9 PE_IOMPI PE_IOMPO PE_ROMPO PE_RI PE_RX0# K PE_RX# J PE_RX# J PE_RX# PE_RX# PE_RX# F PE_RX# F PE_RX# PE_RX# E PE_RX9# PE_RX0# PE_RX# PE_RX# PE_RX# PE_RX# 0 PE_RX# MI PE_RX0 J PE_RX H PE_RX H PE_RX F PE_RX PE_RX E PE_RX F PE_RX PE_RX F PE_RX9 PE_RX0 PE_RX PE_RX 0 PE_RX PE_RX 9 PE_RX 0 Intel(R) FI PE_TX0# L PE_TX# M PE_TX# M PE_TX# M0 PE_TX# L PE_TX# K PE_TX# M9 PE_TX# J PE_TX# K9 PE_TX9# H0 PE_TX0# H9 PE_TX# F9 PE_TX# E PE_TX# 9 PE_TX# PE_TX# PE_TX0 L PE_TX M PE_TX M PE_TX L0 PE_TX M PE_TX K PE_TX M PE_TX H PE_TX K PE_TX9 0 PE_TX0 9 PE_TX F PE_TX E PE_TX PE_TX PE_TX PE_IROMP_R EXP_RI PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN0 PE_RXN9 PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN PE_RXN0 PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP0 PE_RXP9 PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP PE_RXP0 R9 99RF-P R0 0RF-P PE_RXN[0..] 0 PE_RXP[0..] 0 PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN0_L 9 U0VKX-P PE_TXN0 PE_TXN9_L 0 U0VKX-P PE_TXN9 PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN_L U0VKX-P PE_TXN PE_TXN0_L 9 U0VKX-P PE_TXN0 PE_TXP_L 0 U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP0_L U0VKX-P PE_TXP0 PE_TXP9_L U0VKX-P PE_TXP9 PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L 9 U0VKX-P PE_TXP PE_TXP_L 0 U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP_L U0VKX-P PE_TXP PE_TXP0_L U0VKX-P PE_TXP0 PE_TXN[0..] 0 PE_TXP[0..] R =.00. th =.000. N =.00. el rd.00. and th.00. rd and th have been purged E will confrim QM if it can add OM E will release E to add to OM lab stuff nd,rd and th in OM Eng add st source(.000.) Eng do not stuff th in OM becasue th have been purge,so stuff st in OM but E said, th need stuff in P if not any concern Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU (/) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

5 0V_VTT R R H_TERR# 99RF-P PROHOT# R-P,9 H_PEI H_PROHOT#, PM_THRMTRIP-# H_PWR H_PM_YN PM_RM_PWR H_VTTPWR R R 0RF-P R 0RF-P R 99RF-P R 99RF-P TP R TP R R TP H_OMP H_OMP H_OMP H_OMP0 KTO#_R H_TERR# PROHOT# H_PURT# VPWROO_ VPWROO_0 RMPWROK H_PWR_XP PU_P T OMP T T H K T N K P L N N K M M OMP OMP OMP0 KTO# TERR# PEI PROHOT# THERMTRIP# REET_O# PM_YN VPWROO_ VPWROO_0 M_RMPWROK VTTPWROO TPPWROO UURNLE MI THERML PWR MNEMENT LOK R MI JT & PM OF 9 LK LK# LK_ITP LK_ITP# PE_LK PE_LK# PLL_REF_LK PLL_REF_LK# M_RMRT# M_ROMP0 M_ROMP M_ROMP PM_EXT_T0# PM_EXT_T# PR# PREQ# TK TM TRT# TI TO TI_M TO_M R# PM0# PM# PM# PM# PM# PM# PM# PM# R0 T0 E F L M N N P T P N P T T9 R R9 P9 N J K K J J H K H LK_PU_P LK_PU_N PE_LK_R PE_LK#_R PLL_REF_LK PLL_REF_LK# M_RMRT# RN 0V_VTT M_ROMP_0 RN0KJ--P M_ROMP_ M_ROMP_ XP_PR# XP_PREQ# XP_TLK XP_TM XP_TRT# XP_TI XP_TO XP_TI_M XP_TO_M XP_REET# LK_PU_P LK_PU_N PE_LK_R PE_LK#_R TP PLL_REF_LK PLL_REF_LK# PLL_REF_LK PLL_REF_LK# M_ROMP_0 R M_ROMP_ R9 M_ROMP_ R0 PM_EXTT#0_R 0 PM_EXTT#_R R R 00RF-L-P-U 9RF-L-P 0RF--P,0,,,0,,,9 PLT_RT# R9 R KRF--P PLT_RT#_R R 0RF-P L RTIN# UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. PM_RM_PWR PM_RM_PWR_ KRF--P NON- RMPWROK NON- V_0_R R0 R PM_RM_PWR PreMp 0 ER: R009 V_0_R R R 0RF-P V_ XP_TM XP_TI XP_PREQ# XP_TLK R R R R0 0V_VTT PU JT XP_TO_M XP_TI_M R9 XP_REET# R KRJ--P V_0,0 V_0_PWR R V_0_PWR_ KRF--P UVZY-P U V PM_RM_PWR_ Y N LV0W--P.00.L0 N =.Z0.H XP_TO XP_TRT# RN RNJ--P 0V_VTT Hynix 00M NPV KU PU (/) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

6 PU_P OF 9 PU_P OF 9 0 M Q[..0] 0 M 0 0 M 0 M 0 M # 0 M R# 0 M WE# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q E0 F0 E F E9 E H0 K J 0 J J0 L M M L9 L K N P9 H F K K F J J J0 J9 L0 K K L K L N M0 R L M9 N9 T P M N M T T L R P U E E9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _0 _# _R# _WE# UURNLE R YTEM MEMORY _K0 _K0# _KE0 _K _K# _KE _0# _# _OT0 _OT _M0 _M _M _M _M _M _M _M _Q0# _Q# _Q# _Q# _Q# _Q# _Q# _Q# _Q0 _Q _Q _Q _Q _Q _Q _Q _M0 _M _M _M _M _M _M _M _M _M9 _M0 _M _M _M _M _M P Y Y P E E F9 9 H M M N0 N 9 F J9 N9 H K9 P T F9 H9 M9 H K0 N R Y W V 9 V T Y9 U T U T V9 M M0 M M M M M M M M M M M M M M M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M Q0 M Q M Q M Q M Q M Q M Q M Q M 0 M M M M M M M M M 9 M 0 M M M M M M_LK_R0 0 M_LK_R#0 0 M_KE0 0 M_LK_R 0 M_LK_R# 0 M_KE 0 M_#0 0 M_# 0 M_OT0 0 M_OT 0 M M[..0] 0 M Q#[..0] 0 M Q[..0] 0 M [..0] 0 M Q[..0] M 0 M M M # M R# M WE# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q E F F F F H J J J J J K L M K K M N F J K J H K K M N K K M M P N T N N N T T N P P T9 T P9 R0 T0 W R Y _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _Q _Q _Q _Q _Q _Q9 _Q0 _Q _Q _Q _0 _# _R# _WE# UURNLE R YTEM MEMORY - _K0 _K0# _KE0 _K _K# _KE _0# _# _OT0 _OT _M0 _M _M _M _M _M _M _M _Q0# _Q# _Q# _Q# _Q# _Q# _Q# _Q# _Q0 _Q _Q _Q _Q _Q _Q _Q _M0 _M _M _M _M _M _M _M _M _M9 _M0 _M _M _M _M _M W W9 M V V M E H K H L R T F J L H L R R E H M L P R U V T V R T R R R R P R F P N M M0 M M M M M M M M M M M M M M M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M Q0 M Q M Q M Q M Q M Q M Q M Q M 0 M M M M M M M M M 9 M 0 M M M M M M_LK_R M_LK_R# M_KE M_LK_R M_LK_R# M_KE M_# M_# M_OT M_OT M M[..0] M Q#[..0] M Q[..0] M [..0] UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU (/) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

7 PU_PF OF 9 V_ORE V_ORE PROEOR ORE POWER UVMX-P 0UVMX-P 00 0UVMX-P 0UVMX-P UVMX-P 0UVMX-P 0 0UVMX-P 0UVMX-P 0UVMX-P 9 0 0UVMX-P 0UVMX-P 00 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P 0UVMX-P UVMX-P 0 9 F F F F F F0 F9 F F F Y Y Y Y Y Y0 Y9 Y Y Y V V V V V V0 V9 V V V U U U U U U0 U9 U U U R R R R R R0 R9 R R R P P P P P P0 P9 P P P V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V V UURNLE POWER ENE LINE PU ORE UPPLY PU VI.V RIL POWER PI# VI0 VI VI VI VI VI VI PRO_PRLPVR VTT_ELET IENE V_ENE _ENE VTT_ENE _ENE_VTT H H H H0 J J H H F F F F E E F0 E0 0 0 Y0 W0 U0 T0 J J J J N K H_VI0 K H_VI K H_VI L H_VI L H_VI M H_VI M H_VI M TP ENE_VTT PI# +VTT_ +VTT_ H_VI[..0] PM_PRLPVR H_VTTVI TP larksfield H_VTTVI = Low, VTT =.V rrandale H_VTTVI = High, VTT =.0V N J J 0UVMX-P IMVP_IMON 0UVMX-P VTT_ENE TP 0UVMX-P 9 V_ORE 0V_VTT R R 0UVMX-P 0 0UVMX-P R 00RF-L-P-U R 00RF-L-P-U 0UVMX-P 0V_VTT The decoupling capacitors, filter recommendations and sense resistors on the PU/PH Rails are specific to the R Implementation. ustomers need to follow the recommendations in the alpella Platform esign uide. V_ENE _ENE 0V_VTT Please note that the VTT Rail Values are uburndale VTT=.0V; larksfield VTT=.V Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. PU (/) ize ocument Number Rev ustom JE-P - ate: Wednesday, November, 00 heet of 9

8 V_FXORE V_FXORE Please note that the VTT Rail Values are uburndale VTT=.0V; larksfield VTT=.V 0 T R I 0V_VTT R I 0 0UVMX-P UM_Muxless and I_ UM_Muxless and I_ UM_Muxless and I_ UM_Muxless and I_ R I 0V_VTT 9 0UVMX-P 0UVMX-P R I 9 0UVMX-P 0UVMX-P 9 0UVMX-P 9 0UVMX-P 9 99 UVKX-P PU_P OF 9 T VX T9 VX T VX T VX R VX R9 VX R VX R VX P VX9 P9 VX0 P VX P VX N VX N9 VX N VX N VX M VX M9 VX M VX9 M VX0 L VX L9 VX L VX L VX K VX K9 VX K VX K VX J VX9 J9 VX0 J VX J VX H VX H9 VX H VX H VX J VTT J VTT H VTT K VTT J VTT J VTT J VTT H VTT VTT VTT VTT F VTT E VTT E VTT RPHI UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. UURNLE POWER FI PE & MI ENE LINE RPHI VIs R -.V RIL.V.V VX_ENE X_ENE FX_VI0 FX_VI FX_VI FX_VI FX_VI FX_VI FX_VI FX_VR_EN FX_PRLPVR FX_IMON VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VQ VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT R T M P N P M P N R T M J F E E Y W W U T T P N N L H P0 N0 L0 K0 J J0 J H H0 H9 L L M FX_VI0 FX_VI FX_VI FX_VI FX_VI FX_VI FX_VI R I V_X_ENE _X_ENE FX_VR_EN FX_PRLPVR FX_IMON VQ for uburndale VQ for larksfield 9 UVKX-P 0 UVKX-P 00 UVKX-P 0V_VTT +V._VFR V_VTT FX_VI[..0],0 PM_LP TL oringal reservation 0uF 0 - RF UVKX-P UVKX-P 9 0 UVKX-P UVKX-P 0. 0UVMX-P 9 0UVMX-P 90 0UVMX-P R 0 Not tuff Ro NON- 9 0UVMX-P V_0 V_ R NON- Q... R0 NON- NON- V_0_R R 0RF-P R9 N00E--P.N0. N =.N0.E PM_LP TL_ Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU (/) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

9 PU_PH T0 T R R R R R R0 R R R R9 R R P0 P P P0 P P P N N N N0 N M9 M M M0 M M M M M M L L L L0 L L L9 L L K9 K K K0 K J J J0 J J J J J J H H H H H H0 H9 H H H H0 H H H9 H H 0 F F F E UURNLE OF 9 E E E E E0 E9 E E E E Y Y Y W W W W W W0 W9 W W W W V0 U U U T T T T T T0 T9 T T T T R0 P P P N N N N N N0 N9 N N N N M0 L L L9 L L L K K K0 PU_PI K K9 K K J J0 J J9 H H H H H H H H H H H H H 0 9 F0 F F F F9 F E E E9 E E E E E E E E NTF TET PIN:,T,T,,,,,P,P, R,R,T,T,T,T,,, UURNLE 9 OF 9 _NTF#R _NTF# _NTF# _NTF# _NTF# _NTF#T _NTF#T RV_NTF#T RV_NTF#T RV_NTF#P RV_NTF#R RV_NTF#T RV_NTF#R RV_NTF#P RV_NTF#T RV_NTF# RV_NTF# RV_NTF# RV_NTF# RV_NTF# RV_NTF# R T T T T P R T R P T TP_MP NTF TP_MP NTF TP_MP NTF TP_MP NTF TP9 TP0 TP TP UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU (/) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet 9 of 9

10 PU_PE OF 9 Processor trapping O-IMM VREFQ (M) ircuit for larksfield Processor 0 M_VREF_Q_IMM0 M_VREF_Q_IMM RN 000 H_RV9_R H_RV0_R P L L L J 9 M L J H E E0 RV#P RV#L RV#L RV#L RV#J RV#9 RV#M RV#L _IMM_VREF# _IMM_VREF# RV# RV# RV#E RV#E0 UURNLE RV#J RV#J RV#H RV#K RV#L RV_NTF#R RV#J RV#J J J H K L R J J F0 F R 0 R9 KRF-P PI-Express onfiguration elect F0 :ingle PE(efault) 0:ifurcation enabled F - PI-Express tatic Lane Reversal F :Normal Operation(efault) 0 :Lane Numbers Reversed -> 0, ->,... TP TP TP TP TP TP TP9 TP0 TP TP TP TP TP TP R R F0 F F F F F F F F F9 F0 F F F F F F F H_RV_R H_RV_R M0 M P L L0 M N9 M K K K J N0 N J J9 J0 K0 H U9 T9 9 9 F0 F F F F F F F F F9 F0 F F F F F F F RV_TP#H RV#9 RV#9 RV#0 RV#0 RV#U9 RV#T9 RV#9 RV#9 REERVE RV#L RV#L9 RV#P0 RV#P RV#L RV#T RV#T RV#P RV#R RV#R RV_TP#E RV_TP#F KEY RV# RV# RV#J RV#H RV_TP# RV_TP# RV_TP#R RV_TP# RV_TP# RV_TP# RV_TP# RV_TP#R9 RV_TP# RV_TP#E L L9 P0 P L T T P R R E F J H R R9 E RV_R RV_R R R 0 - F F R0 R F - isplay Port Presence F :isabled; No Physical isplay Port attached to Embedded isplay Port (efault) 0:Enabled; n external isplay Port device is connected to the Embedded isplay Port F(Reserved) - Temporarily used for early larksfield samples. F larksfield (only for early samples pre-e) - onnect to N with.0k Ohm/% resistor. Note: Only temporary for early F sample (rp/) [For details please refer to the WW MoW and sighting report]. For a common M/ design (for U and F), the pull-down resistor shouble be used. oes not impact U functionality. J9 J RV#J9 RV#J RV_TP#V RV_TP#V RV_TP#N RV_TP# RV_TP# RV_TP#W RV_TP#W RV_TP#N RV_TP#E RV_TP#9 V V N W W N E 9 (P) can be left N is R implementation; E/ recommendation to N. R P RV_ UURNF,LRKUNF.00. N =.00. rd =.00. th =.000. Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU (/) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet 0 of 9

11 P0VN-P H_OE_RT# H_OE_YN H_OE_ITLK H_OE_OUT V_0 PH_JT_TM PH_JT_TO PH_JT_TI PH_JT_TM PH_JT_TO PH_JT_TI 0 X X-KHZ-PU R 0MRJ-L-P NO REOOT TRP H_PKR No Reboot trap R Low = efault H_PKR High = No Reboot When unused all JT pins may be N IH_RTX IH_RTX L = pf Freq tolertance :+/- 0 ppm R R0 R R R For after PH stepping,have to, R R9 R90 R9 R9 R9 PH_JT_TK R99 RF--P.000. nd =.000. PH_JT_RT# R9 PH_JT_RT# R9 09 P0VN-P V_ RT_UX_ Z_RT# ET Z_YN ET ET Z_IT_LK Z_TOUT 0P0VJN-P ET 0RJ--P 0RJ--P 0RJ--P RJ--P 009 V_0 RN 09 RF Z_RT# Z_YN Z_IT_LK Z_TOUT RN0KJ-P-U PI_MOO_R PI_MOI_R R9 0 ME_UNLOK# PH_PI_#0 PH_PI_MOI PH_PI_LK 0 H_PKR H_IN0 PH_PI_#0 PH_PI_MOI PH_PI_LK PI_MOI Enable itpm: onnect to Vcc_ with.-k weak pull-up resistor. isable itpm: Left floating, no pull-down required UVKX-P RT_UX_ RT_UX_ RTRT# new signal Pin PI_0#, PI_MIO, PI_MOI, PI_LK: No series resistor required if routing length is."-." PH trapping 0 UVKX-P TP TP9 R R MRJ--P R9 0KRF-L-P RN RNJ--P RT_PWR_L M_INTRUER# IH_INTVRMEN IH_RTX IH_RTX IH_RTRT# RTRT# M_INTRUER# IH_INTVRMEN Z_IT_LK Z_YN Z_RT# Z_TIN H_IN Z_TOUT R R9 H_OK_EN# PH_JT_TK PH_JT_TM PH_JT_TI PH_JT_TO PH_JT_RT# PI_LK_R PI_#0_R PI_MOI_R PI_MOO_R INTVRMEN- Integrated U.V VRM Enable High - Enable internal VRs RTX RTX F0 E F 9 H J0 V Y Y V RTRT# RTRT# INTRUER# INTVRMEN H_LK H_YN H_RT# H_IN0 H_IN H_IN H_IN H_O H_OK_EN#/PIO H_OK_RT#/PIO JT_TK PI_LK PI_0# PI_# PI_MOI PI_MIO V_UX_ RT_PWR.0000.Q is ROH parts.0000.r is Halogens free Part arrange qual in Eng KU P M K K J J 0W-P.0000.E nd =.0000.M rd =.0000.R PH_P PKR JT_TM JT_TI JT_TO TRT# IEXPEK-M-P-NF RT IH PI JT RT_T integrated Vccus_0,Vccus_,VccL_ INTVRMEN High=Enable Low=isable integrated VccLan_0VccL_0 LN00_LP High=Enable Low=isable PH_PIO INT_ERIRQ T_LE# TIOMP R RF-P T_ET#0_R T_ET#_R PH stuff.0iex.0u R9 KRJ--P LP T OF 0 FWH0/L0 FWH/L FWH/L FWH/L FWH/LFRME# LRQ0# LRQ#/PIO F ERIRQ TLE# T0RXN K T0RXP K T0TXN K T0TXP K9 TRXN H TRXP H TTXN H9 TTXP H TRXN F TRXP F9 TTXN F TTXP F TRXN H TRXP H TTXN F TTXP F TRXN 9 TRXP TTXN TTXP TRXN TRXP TTXN TTXP TIOMPO TIOMPI T0P/PIO TP/PIO9 9 F F T Y9 V RT NP NP NP NP N PWR T-00P00E-P LP_L0 0, LP_L 0, LP_L 0, LP_L 0, LP_LFRME# 0, T_RXN0 T_RXP0 T_TXN0 T_TXP0 T_RXN T_RXP T_TXN T_TXP Hynix 00M NPV KU TP H 0V_VTT T_ET#0_R T_ET#_R INT_ERIRQ,0 O T_LE#, RN RN0KJ--P ate: Wednesday, November, 00 heet of 9 V_0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PH (/9) JE-P - ize ocument Number Rev

12 V_ LN MINIR MINIR U LK_PIE_MINI# LK_PIE_MINI MINI_LKREQ# LK_PIE_MINI# LK_PIE_MINI MIN_LKREQ# PIE_RXN PIE_RXP PIE_TXN PIE_TXP PIE_RXN PIE_RXP PIE_TXN PIE_TXP PIE_RXN PIE_RXP PIE_TXN PIE_TXP PIE_RXN PIE_RXP PIE_TXN PIE_TXP.R0.R.R the three resistors should be moated PIE_RXN PIE_RXP U0VKX-P U0VKX-P PIE_RXN PIE_RXP U0VKX-P U0VKX-P PIE_LK_RQ0# R0 R R0 R0 R09 R0 U.0 U.09 TXN TXP TXN TXP TXN TXP TXN TXP PIE_LK_RQ0# LK_PH_R_N LK_PH_R_P PIE_LK_RQ# LK_PH_R_N LK_PH_R_P PIE_LK_RQ# PH_P OF 0 0 PERN J0 PERP F9 PETN H9 PETP W0 PERN 0 PERP 0 PETN 0 PETP U0 PERN T0 PERP U PETN V PETP PERN PERP PETN E PETP F PERN H PERP PETN J PETP PERN W PERP PETN PETP T PERN U PERP U PETN V PETP PERN J PERP PETN J PETP K LKOUT_PIE0N K LKOUT_PIE0P PI-E* P9 PIELKRQ0#/PIO M LKOUT_PIEN M LKOUT_PIEP U PIELKRQ#/PIO M LKOUT_PIEN M LKOUT_PIEP N PIELKRQ#/PIO0 Mus From LK UFFER ontroller PE Link MLERT#/PIO MLK MT ML0LERT#/PIO0 ML0LK ML0T MLLERT#/PIO MLLK/PIO MLT/PIO L_LK L_T L_RT# PE LKRQ#/PIO LKOUT_PE N LKOUT_PE P LKOUT_MI_N LKOUT_MI_P LKOUT_P_N/LKOUT_LK_N LKOUT_P_P/LKOUT_LK_P LKIN_MI_N LKIN_MI_P LKIN_LK_N LKIN_LK_P LKIN_OT_9N LKIN_OT_9P LKIN_T_N/K_N LKIN_T_P/K_P 9 H J M E0 T T T9 H N N T T W P P F E H H PH_PIO PH_PIO0 ML0_LK ML0_T PH_PIO K_L K_ L_LK L_T L_RT# PE_LKREQ# R00 LK_PH_PE_N LK_PH_PE_P LK_EXP_N LK_EXP_P LKOUT_P_N LKOUT_P_P LKIN_MI# LKIN_MI LK_PU_LK# LK_PU_LK REFLK# REFLK LK_PIE_T# LK_PIE_T PH_PIO M_LK M_T PH_PIO0 if use ENE K stuff.k-ohm thermal I will be abnormal PH_PIO TP0 TP TP R0 R0 R0 R0 RN0 LKIN_MI# LKIN_MI LK_PU_LK# LK_PU_LK REFLK# REFLK LK_PIE_T# LK_PIE_T K_L 0 K_ 0 PE_LKREQ# V_ M_LK M_T,0, PH_MT LK_PIE_V# 0 LK_PIE_V 0 PE_LK#_R PE_LK_R PLL_REF_LK# PLL_REF_LK RN0KJ-P RN ML0_LK ML0_T V_0 RN9 RNKJ--P N00KW-P M_LK Q.N0.F nd =.M0.0F R0 PE_LKREQ# 0KRJ--P K_ K_L V_0 M_T PH_MLK,0, 0 LK_PIE_LN# 0 LK_PIE_LN 0 PIE_LK_LN_RQ# LK_PIE_U# LK_PIE_U R R R R R U_PE_LKREQ# LK_PH_R_N LK_PH_R_P PIE_LK_RQ# LK_PH_R_N LK_PH_R_P U_PE_LKREQ# H H M M M9 LKOUT_PIEN LKOUT_PIEP PIELKRQ#/PIO LKOUT_PIEN LKOUT_PIEP PIELKRQ#/PIO REFLKIN LKIN_PILOOPK XTL_IN XTL_OUT XLK_ROMP P J H H F LK_IH LK_PI_F XTL_IN XTL_OUT XLK_ROMP LK_IH LK_PI_F R 909RF--P 0V_VTT L = pf Freq tolertance :+/- 0 ppm 0 PIELKRQ{0,,,,,}# should have a 0K pull-up to +VLW. PIELKRQ{,} should have a 0K pull-up to +.0V (ut R is pull-up to +V). V_ R 0KRJ--P PIE_LK_RQ# R V_0 R 0KRJ--P PIE_LK_RQ# R V_0 R 0KRJ--P PIE_LK_RQ# R PIE_LK_RQ# PE LKRQ# J0 LKOUT_PIEN J LKOUT_PIEP H P PIELKRQ#/PIO K LKOUT_PE N K LKOUT_PE P PE LKRQ#/PIO IEXPEK-M-P-NF V_ lock Flex RN RN0KJ-P LKOUTFLEX0/PIO LKOUTFLEX/PIO LKOUTFLEX/PIO LKOUTFLEX/PIO PE LKRQ# T P T N0 U_PE_LKREQ# PIE_LK_RQ# LK RJ--P R9 LK_ardreader XTL_IN I R UM_Muxless 0 XTL_IN X R XTL-MHZ-0-P P0VJN-P UM_Muxless MRJ--P.000. nd = XTL_OUT R XTL_OUT_R UM_Muxless rd =.000. P0VJN-P UM_Muxless Hynix 00M NPV KU PH (/9) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

13 MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP PH_P MI0RXN J MIRXN W0 MIRXN J0 MIRXN MI0RXP MIRXP 0 MIRXP 0 MIRXP E MI0TXN F MITXN 0 MITXN E MITXN MI0TXP H MITXP 0 MITXP MITXP OF 0 FI_RXN0 FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXP0 FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_INT H J E F W J FI_TXN0 FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXN FI_TXP0 FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_TXP FI_INT 0V_VTT MI_IROMP_R R9 99RF-P V_0 H F MI_ZOMP MI_IROMP MI FI FI_FYN0 FI_FYN FI_LYN0 FI_LYN F H J FI_FYN0 FI_FYN FI_LYN0 FI_LYN 00.cause of thermal sensor.solution by JM-P R 0KRJ--P PM_PWROK R0 PM_YRT#_R T M Y_REET# Y_PWROK WKE# LKRUN#/PIO J Y PIE_WKE# PM_LKRUN# PIE_WKE# 0,, PM_LKRUN# 0, ORE_PWR R PM_PWROK_ R R 0KRJ--P,,0,, LL_PWR LL_PWR R R PM_RM_PWR PM_RM_PWR 0 U_PWR_N_K R9 0,9 PM_PWRTN# R 0 _PREENT R LN_RT# 0KRJ--P ME_PWROK PM_RMRT# U_PWR_N_K_R PM_PWRTN#_R _PREENT_R K 0 9 M P P PWROK MEPWROK LN_RT# RMPWROK RMRT# U_PWR_N_K/PIO0 PWRTN# PREENT/PIO U_TT#/PIO ULK/PIO LP_#/PIO LP_# LP_# LP_M# TP P F E H P K N PM_U_TT# PM_U_LK PM_LP_# PM_LP_#_R PM_LP_#_R PM_LP_M#_R PM_LP_W# PM_LP_# 0,0 PM_LP_# 0,,0,,,, PM_LP_M# 0 V_UX_ PH_PIO TLOW#/PIO PMYNH J0 H_PM_YN H_PM_YN PM_RI# F RI# LP_LN#/PIO9 F PM_LP_LN# TP V POO_ PM_RMRT# N00KW-P.N0.F N =.M0.0F V_ R9 _POO 9 PIE_LK_RQ0# _PREENT_R PIE_LK_RQ0# PM_RI# RN RN0KJ-P PH_PIO PH_PIO V_ 0 PH_PIO PH_PIO PM_PWRTN#_R U_PWR_N_K_R PH_PIO PIE_WKE# RN RN0KJ-P R KRJ--P V_ V_ PM_LP_# R 0KRJ--P PM_LP TL,0 0 RMRT#_K N =.T. rd =.000. ystem Power Management TP PM_U_LK 0 TP R R0 R TP R 0KRJ--P Q R 00KRJ--P IEXPEK-M-P-NF R KRF--P R0 0KRJ--P. Q... N00E--P.N0. N =.N0.E PM_RMRT# R 00KRJ--P V_0 change pull up K to 0K for Intel suggestion PM_LKRUN# R KRJ--P Hynix 00M NPV KU PH (/9) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

14 V_0 RN RN0KJ--P UM_Muxless R KRF-P UM_Muxless LTL_LK LTL_T LV_VREF PH_LUE PH_REEN PH_RE LI Muxless->..L,UM-.K R 0RJ--P UM_Muxless RN RN0F--P UM_Muxless PH_L_ON PH_LV_ON L_KLTTL LK EI T EI TP PH_TXOUT0- PH_TXOUT- PH_TXOUT- PH_TXLK- PH_TXLK+ PH_TXOUT0+ PH_TXOUT+ PH_TXOUT+ PH_LUE PH_REEN PH_RE LK EI T EI LTL_LK LTL_T LI L_LV LV_VREF PH_P T L_KLTEN T L_V_EN Y L_KLTTL L LK Y L T L_TRL_LK V L_TRL_T P9 LV_I P LV_V T LV_VREFH T LV_VREFL V LV_LK# V LV_LK LV LV_T#0 LV_T# Y LV_T# V LV_T# LV_T0 0 LV_T Y9 LV_T V LV_T P LV_LK# P LV_LK Y LV_T#0 T9 LV_T# U LV_T# T LV_T# Y LV_T0 T LV_T U0 LV_T T LV_T RT_LUE RT_REEN RT_RE igital isplay Interface OF 0 VO_TVLKINN VO_TVLKINP VO_TLLN VO_TLLP VO_INTN VO_INTP VO_TRLLK VO_TRLT P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT J J F H T T J U PH_HMI_T-_L PH_HMI_T+_L J PH_HMI_T-_L PH_HMI_T+_L 0 PH_HMI_T0-_L 0 PH_HMI_T0+_L W PH_HMI_LK-_L PH_HMI_LK+_L Y9 9 E V0 E0 0 F H U0 U PH_HMI_LK PH_HMI_T PH_HMI_ETET U0VKX-P U0VKX-P U0VKX-P U0VKX-P U0VKX-P 9 U0VKX-P 0 U0VKX-P U0VKX-P UM_Muxless_HMI HMI_T- HMI_T+ HMI_T- HMI_T+ HMI_T0- HMI_T0+ HMI_LK- HMI_LK+ PH_LK PH_T V V RT LK RT T P_UXN P_UXP P_HP T PH_HYN PH_VYN R KR--P K 0.% ohm RT_IREF Y RT_HYN Y RT_VYN _IREF RT_IRTN RT IEXPEK-M-P-NF P_0N P_0P P_N P_P P_N P_P P_N P_P J0 0 J F H E Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PH (/9) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

15 V_0 V_0 V_0 V_0 PI_NT0# R PI_NT# R OOT IO trap NT#0 NT# floating 0 floating floating PI_NT# 0 RN PI_TOP# PI_IR# INT_PIRQ# INT_PIRQ# PI_REQ# R KRJ--P INT_PIRQH# R KRJ--P PI_PERR# R KRJ--P RN INT_PIRQ# INT_PIRQE# INT_PIRQ# PI_ERR# RNKJ--P PH strapping 0 0 LP RNKJ--P-U PI_PLTRT# V_0 PI_EVEL# PI_FRME# PI_TR# PI_PLOK# V_0 UE PI OOT IO Location 0 Reserved efault (internal pull up) onfigures MI for EI compatible operation (Not for Mobile platform) PI 0 9 PI(efault) PLK_FWH LK_PI_F 0 LK_PI_K TP TP9 U0_MI# U0_MI# V_0 PLT_RT# These pins are left as N, because the function is disable. PI_REQ# INT_PIRQF# INT_PIRQ# PI_REQ0# dpu_elet# dpu_pwm_elet# V_ R 0KRJ--P TP0 R RJ--P R RJ--P R RJ--P TP TP R RN RNKJ--P U V Y N N =.Z0.H R9 INT_PIRQ# INT_PIRQ# INT_PIRQ# INT_PIRQ# PI_REQ0# PI_REQ# PI_REQ# PI_NT0# PI_NT# PI_NT# INT_PIRQE# INT_PIRQF# INT_PIRQ# INT_PIRQH# PI_ERR# PI_PERR# PI_IR# PI_EVEL# PI_FRME# PI_PLOK# PI_TOP# PI_TR# IH_PME# PI_PLTRT# LK_PI_IO_R LK_PI_F_R LK_PI_K_R LK_PI_ LK_PI_ PLK_FWH R PH_PE H0 0 N J 0 E H 9 E0 0 0 M M F M0 M J K F0 9 0 K M J K L F J0 F 9 M 0 H J0 /E0# /E# H /E# /E# PIRQ# H PIRQ# PIRQ# PIRQ# F REQ0# REQ#/PIO0 REQ#/PIO M REQ#/PIO F NT0# K NT#/PIO F NT#/PIO H NT#/PIO PIRQE#/PIO K PIRQF#/PIO PIRQ#/PIO PIRQH#/PIO K PIRT# E ERR# E0 PERR# IR# H PR F EVEL# FRME# 9 M PLOK# TOP# TR# PME# PLTRT# N LKOUT_PI0 P LKOUT_PI P LKOUT_PI P LKOUT_PI P LKOUT_PI IEXPEK-M-P-NF Near R9 PI E PLT_RT#,0,,,0,,,9 NVRM U OF 0 NV_E#0 Y9 NV_E# NV_E# P NV_E# NV_Q0 V9 NV_Q NV_Q0/NV_IO0 P NV_Q/NV_IO P NV_Q/NV_IO T NV_Q/NV_IO T9 NV_Q/NV_IO NV_Q/NV_IO V NV_Q/NV_IO NV_Q/NV_IO NV_Q/NV_IO E NV_Q9/NV_IO9 NV_Q0/NV_IO0 NV_Q/NV_IO NV_Q/NV_IO NV_Q/NV_IO J NV_Q/NV_IO J NV_Q/NV_IO NV_LE NV_LE NV_ROMP R U_RI_PN PI_NT# R PH strapping U_O#0 U_O# U_O# U_O# U_O# U_O# U_O# U_O# swap override trap/top-lock wap Override jumper PI_NT# NV_LE NV_LE Y NV_ROMP NV_R# U V NV_WR#0_RE# Y NV_WR#_RE# Y NV_WE#_K0 V NV_WE#_K F UP0N H UP0P J UPN UPP UPN N0 UPP P0 UPN J0 UPP L0 UPN F0 UPP 0 UPN 0 UPP 0 UPN M UPP N UPN UPP UPN H UPP J UP9N E UP9P F UP0N UP0P UPN UPP H UPN L UPP M UPN UPP URI# URI O0#/PIO9 N O#/PIO0 J O#/PIO F O#/PIO L O#/PIO E O#/PIO9 O#/PIO0 F O#/PIO T These pins are left as N, because the function is disable. Low = swap override/top-lock wap Override enabled High = efault R0 RF-L-P UPN0 UPP0 UPN 9 UPP 9 UPN UPP UPN UPP UPN UPP UPN9 9 UPP9 9 UPN UPP UPN UPP UPN UPP NV_LE NV_LE PH strapping floating floating MI Termination Voltage NV_LE et to Vss when low. et to Vcc when high. MI termination voltage internal pull-up Enable nti-theft Tech isable (internal pull-down) Pair 0 0 U_O# U_O# U_O#0 U_O# 0 U_O# U_O# U_O# U_O# U U.0 N evice WEM N 9 I/O U.0 U.0 Hynix 00M NPV KU MINIR(WLN) N N IM ard N lue Tooth MINI() ardreader RN RN9 RN0KJ--P RN0KJ--P V_ V_ NV_LE NV_LE +V_NVRM_VQ +V_NVRM_VQ 00 for PIO_table Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PH (/9) JE-P - ize ocument Number Rev ate: Wednesday, November, 00 heet of 9 R R

16 PIO has a weak[0k] internal pull up. No need to have external pull down/up. PIO pin set to high at reset. PH_PF OF 0 PIO has a weak[0k] internal pull down. No need to have external pull up/down. PIO pin is set to low at reset. Low : ME rypto TL with no confidentiality High : ME rypto TL with confidentiality PIO has a weak[0k] internal pull up. To enable on-die PLL Voltage regurator, should not place external pull down. PH_PIO PH_PIO0, T_LE#,0 INT_ERIRQ V_0 TP_PI# PH_PIO0 dpu_ei R PU_PWR_EN# R9 0KRJ--P PH_PIO E_WI# PH_PIO0 PH_PIO PH_PIO PH_PIO R0 KRJ--P PW_LR# V_0 T_LE# PH_PIO9 INT_ERIRQ PW_LR# RP 0 9 RN0KJ-L-P V_0 RN R9 RN0KJ-P 0 0 RN PU_HOL_RT# V_ R9 KRJ--P R9 0KRJ--P RN0KJ-P E_I# E_WI# V_0 E_MI# E_I# PX_HMI# PX_HMI# PH_PIO 0 PU_HOL_RT#, PU_PWROK TP TP TP PU_PWR_EN# TP V_0 H: No function L: upport V_0 I_UM TP TP9 TP0 TP R dpu_prnt# R90 0KRJ--P Muxless PH_PIO0 E_MI# PX_HMI# E_I# E_WI# PH_PIO PH_PIO PU_HOL_RT# PU_PWROK PH_PIO PH_PIO PH_PIO PH_PIO TP_PI# PH_PIO PU_PWR_EN# dpu_prnt# dpu_ei PH_PIO9 PH_PIO RT_TE PH_PIO PW_LR# PH_PIO PH_TP9 PH_TP9 PH_TP9 PH_TP9 V_ Y J F0 K9 T F Y H0 V M V V P H F F MUY#/PIO0 TH/PIO TH/PIO TH/PIO PIO LN_PHY_PWR_TRL/PIO PIO TP/PIO TH0/PIO LOK/PIO PIO PIO PIO TP_PI#/PIO TLKREQ#/PIO TP/PIO TP/PIO LO/PIO TOUT0/PIO9 PIELKRQ#/PIO PIELKRQ#/PIO TOUT/PIO TP/PIO9 PIO _NTF NTF_9 H _NTF_ H _NTF NTF NTF# 9 _NTF#9 _NTF# 0 _NTF#0 _NTF# _NTF# _NTF# _NTF# E _NTF#E E _NTF#E F _NTF#F F _NTF#F H _NTF#H H _NTF#H J _NTF#J J _NTF#J J _NTF#J J9 _NTF#J9 J _NTF#J J0 _NTF#J0 J _NTF#J J _NTF#J _NTF# _NTF# E _NTF#E E _NTF#E IEXPEK-M-P-NF UM_Muxless R 0KRJ--P PH_PIO R9 I PIO NTF RV NTF TET PIN:,9,,0,,,,,E, E,F,F,H,H,J,J,J, J9,J,J0,J,J,,,E,E MI PU UM_IRETE# Optimus: HIH UM: HIH I ONLY: LOW LKOUT_PIEN H LKOUT_PIEP H LKOUT_PIEN F LKOUT_PIEP F 0TE LKOUT_LK0_N/LKOUT_PIEN LKOUT_LK0_P/LKOUT_PIEP V_0 PEI RIN# PROPWR THRMTRIP# TP TP TP TP TP TP TP TP TP9 TP0 TP TP TP TP TP TP TP TP TP9 N_ N_ N_ N_ N_ INIT_V# TP U M M 0 T E0 0 W Y Y V V F M N J K K M N M0 N0 UM_00M R 0KRJ--P PH_PIO R 900M H T9 P 0 LK_PU_N_R LK_PU_P_R PH_THERMTRIP_R INIT_V# RT_TE 0009 K0TE 0 R R KRIN# 0 H_PWR,9 H_PEI V_ R 0KRF--P VRM Frequency VRM 00Mhz : PULL HIH VRM 900Mhz : PULL LOW 00 R R RJ--P V_ V_0 LK_PU_N LK_PU_P PH_PIO Hynix 00M NPV KU 0V_VTT Placed Within " from PH 0UVKX-P TP... R KRF--P R9 UM/M : HIH : LOW PM_THRMTRIP-#, N =.N0.E.N0. N00E--P Q R 00KRF-L-P UM_M _ R0 0KRJ--P R_RMRT# 0, M_RMRT# V_0 PH_PIO 0009 : HIH UM//M : LOW Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PH (/9) JE-P - ize ocument Number Rev ate: Wednesday, November, 00 heet of 9 NON- R R R 0KRJ--P UM_M_

17 T 0V_VTT 0V_VTT 0V_VTT m.0 0UVMX-P 0V_VTT 0V_VTT 0 - L 0UVMX-P. 0V_VTT V_0 oringal reservetion 0UF 0 - RF L 9 UVKX-P 0 0UVMX-P 9 UVKX-P +.0V_VPLL_EXP UVKX-P U0VKX-P 0 0UVMX-P UVKX-P UVKX-P UVKX-P m VFI_VRM +.0V_VPLL_FI PH_P VORE VORE VORE VORE VORE F VORE F VORE F0 VORE F VORE H VORE H VORE H0 VORE H VORE J0 VORE J VORE K VIO J VPLLEXP N0 VIO N VIO N VIO N VIO N VIO N VIO J VIO J VIO T VIO T VIO U VIO U VIO V VIO V VIO W VIO W VIO VIO VIO VIO VIO VIO VIO VIO VIO E VIO E VIO VIO VIO H VIO N0 VIO N VIO N V_ T VVRM[] J VFIPLL M VIO POWER V ORE PI E* IEXPEK-M-P-NF FI RT LV HVMO MI NN / PI OF 0 V V VLV _LV VTX_LV VTX_LV VTX_LV VTX_LV V_ V_ V_ VVRM VMI VMI VPNN VPNN VPNN VPNN VPNN VPNN VPNN VPNN VPNN VME_ VME_ VME_ VME_ E0 E F F H H9 P P T T T M K K0 K9 K K M M M +V V_0 +V_V_LV 00m UM_Muxless R9 0RJ-0-U-P UM_Muxless T U M M9 P P9 0UVKX-P m 0 U0VKX-P m R9 0UVKX-P +.V_VTX_LV V_0 9m m U0VKX-P 0U0VKX-P UM_Muxless U0VKX-P V_0_V_0 +V_NVRM_VQ R0 +.V_V_MI R0 UVKX-P R0 VME_ U0VKX-P R9 R9 0RJ-0-U-P UM_Muxless m V_0 9m V_0_ 9m 0V_VTT 0V_VTT V_0_ V_0 Imax = 00 m U UM_Muxless VIN VOUT N EN N# UVZY-P 0 V_0 UM_Muxless +V_V_LV +.V_VTX_LV V_0 R9 I 909-0TU-P.0909.JF N =.099.F I R99 R00 I V_0 V_0 V_0_ VPNN which power the NN interface must be powered even if dual channel NN interface is not connected since it also supplies power to other functions inside PH. R0 R0 UM_Muxless 9 UVMX-P V_0_V_0 VFI_VRM R0 V_0 V_0_V_0 Hynix 00M NPV KU V_0 R0 R0 PH (/9) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

18 0V_VTT V_ 0V_VTT 0V_VTT m 0V_VTT 0V_VTT Inductance:0uH current :m +.0V_V PL UVKX-P +.0V_V PL 0 0V_VTT L R0 R09 VccLN may be grounded if Intel LN is disabled L IN-0UH--P.00.0E N =.000.0T L IN-0UH--P.00.0E N =.000.0T UVKX-P UVKX-P 9 U0VKX-P 0UVMX-P 0-90 U0VKX-P V_0 9 UVKX-P RT_UX_ R9.9 9 U0VKX-P R m 9m m +.0V_VLN 0UVMX-P UVKX-P +VRTEXT +.0V_V PL +.0V_V PL +VT m 9 m PUYP V_0_V_0 +.VLW_INT_VU V VIO 9 V_ VIO F0 V 9 V_ VIO H0 VIO F9 U0VKX-P Y V_ VIO 9 VIO 0 VIO +.V_PH_PU_IO VIO T V_PU_IO PH_V 0 VME R 9 PH_V VME Y R U PH_V V_PU_IO VME Y R U0VKX-P PH_V VME R +.V_PH_VRT +.0V_V_LK P P F F Y0 9 F F F V9 V V Y9 Y Y V9 U PUYP VME VME VME VME VME VME VME VME VME VME VME VPLL VPLL VPLL VPLL H VIO J VIO H VIO F H F V Y P U9 U0 U PH_PJ VLK VLK VLN VLN VME PRT VVRM VIO VIO VIO PT PU VU_ VU_ VU_ VU_ VRT POWER lock and Miscellaneous RT PU PI/PIO/LP IEXPEK-M-P-NF T PI/PIO/LP U H 0 OF 0 VIO V VIO V VIO Y VIO Y VU_ V VU_ U VU_ U VU_ U VU_ P VU_ P VU_ N VU_ N VU_ M VU_ M VU_ L VU_ L VU_ J VU_ J VU_ H VU_ H VU_ VU_ VU_ F VU_ F VU_ E VU_ E VU_ VU_ VU_ VU_ VU_ VU_ VIO VREF_U VREF V_ V_ V_ V_ V_ V_ V_ VIO VVRM VIO VIO VIO VUH U V F K9 J L M N P U VTPLL K VTPLL K H T0 H9 0 F L0 0 U0VKX-P +VLW_PH_VREFU +V_PH_VREF +.0V_VPLL V_0_V_0 - m 0V_VTT V_ V_0 V_ 0V_VTT V_ m 0V_VTT V_0 m Intel check list update from 0.uF to uf 9 UVKX-P U0VKX-P U0VKX-P L 0V_VTT V_ +V_+.V_H_IO V_0 U0 VIN N EN VOUT N# R +V_+.V_H_IO Hynix 00M NPV KU HH-0PT-P.R00.F N =.R00.F V_0 rd =.R00.F R 0RJ--P U0VKX-P V_ V_ V_0 V_ Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. 0 U0VKX-P UVKX-P UVKX-P 9 U0VKX-P U0VKX-P UVKX-P 9 UVKX-P 9 UVKX-P HH-0PT-P 0V_VTT.R00.F N =.R00.FV_ rd =.R00.F m R 0RJ--P U0VKX-P 9 UVKX-P U0VZY-P R09 R 0RJ-0-U-P U0VZY-P U0VKX-P PH ( /9 ) JE-P - ize ocument Number Rev ate: Wednesday, November, 00 heet of 9

19 PH_PH 9 0 M U 9 E E F Y H9 U F P N F F F9 F F H H H H H V H H H J9 J J0 J J J J J J T J K M N9 K K K K IEXPEK-M-P-NF OF 0 K0 K K K K K K K K9 K K L L M M0 M M M M M0 M M M M M M9 M U0 M V M9 M 0 0 N N0 N P P P P9 P P R R T H T T T T T V V V0 V V0 V V V V V9 V V W W W F9 W W W0 W Y Y Y PH_PI Y H9 9 E E E0 E E0 E E E E E E0 E E F F9 F 0 H H H9 H H H H9 H H H 0 E E E0 E E0 E E E E E E E F9 F 0 0 F9 H H0 H0 H H H 9 OF 0 H9 H J K K K K L L L L L L L0 L M M M0 N M M M M M9 M M N P P P0 P P P P P R R T T T T9 T T U0 U U U P V P V9 V0 V V0 V V V V V V V V V V9 V V V W W Y Y Y Y9 Y Y Y0 Y Y Y Y Y P9 Y Y Y P T T Y T M T M K K9 V Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IEXPEK-M-P-NF PH ( 9/9 ) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet 9 of 9

20 V_0 M [..0] M, PM_LP TL R_VREF_ R_VREF_ Place these caps close to VTT and VTT. R R 0V_0 Q UVKX-P. 0V_0 PM_LP TL_ M_VREF IMM0 N00E--P.N0. N =.N0.E 9 UVKX-P 09 U0VKX-P M_VREF_Q_IMM0 R RF--P U0VKX-P 000 0, M M 0 M M Q[..0] M Q#[..0] M Q[..0] M_OT0 M_OT M_VREF_Q_IMM0 R_RMRT# M 0 9 M 9 M 9 M 9 M 9 M 9 M 90 M M 9 M 9 M 0 0 M M M 9 M 0 M M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q 9 M Q M Q M Q9 M Q0 0 M Q M Q 0 M Q M Q M Q 9 M Q M Q 9 M Q M Q9 M Q0 M Q 0 M Q 9 M Q M Q M Q M Q 0 M Q M Q 0 M Q9 M Q0 M Q 9 M Q M Q 9 M Q M Q M Q M Q 0 M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q 9 M Q9 9 M Q0 0 M Q M Q 9 M Q 9 M Q#0 0 M Q# M Q# M Q# M Q# M Q# M Q# 9 M Q# M Q0 M Q 9 M Q M Q M Q M Q M Q M Q 0 M_VREF IMM0 M_VREF_Q_IMM H =mm 0 9 0/P / 0 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q0# Q# Q# Q# Q# Q# Q# Q# Q0 Q Q Q Q Q Q Q OT0 OT REVERE TYPE VREF_ VREF_Q REET# VTT VTT R-0P--P NP NP NP NP 0 R# WE# # 0# # KE0 KE 0 K0 0 K0# 0 K 0 K# M0 M M M M M 0 M M 00 0 L 9 EVENT# VP N# N# N#/TET V V V V V V 9 V 9 V 99 V9 00 V0 0 V 0 V V V V V V V M M0 M M M M M M M M M M M M M M OIMM0 M_T_R OIMM0 M_LK_R T#_IMM0 0_IM0 _IM0 V_ R 0 M R# M WE# M # M_#0 M_# M_KE0 M_KE M_LK_R0 M_LK_R#0 M_LK_R M_LK_R# M M[..0] U0VKX-P Layout Note: Place these aps near O-IMM. PM_EXTT#0_R 0 U0VKX-P 0_IM0 _IM0 R R R 0KRJ--P V_0 V_ 0 U0VKX-P R0 Note: If 0 IM0 = 0, _IM0 = 0 O-IMM P ddress is 0x0 O-IMM T ddress is 0x0 If 0 IM0 =, _IM0 = 0 R 0KRJ--P O-IMM P ddress is 0x O-IMM T ddress is 0x PH_MT,, PH_MLK,, OIMM EOUPLIN 0 0UVMX-P 0 0UVMX-P U0VKX-P 0 U0VKX-P 0 0UVMX-P U0VKX-P 0 0UVMX-P.00.Z Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RIII ocket M ize ocument Number Rev JE-P - Wednesday, November, 00 ate: heet of 0 9

21 M [..0] R_VREF_ R_VREF_ R R 000 M M 0 M M Q[..0] M_VREF IMM U0VKX-P M_VREF_Q_IMM U0VKX-P M Q#[..0] M Q[..0] 0V_0 M_OT M_OT 0 M_VREF_Q_IMM,0 R_RMRT# M 0 M M M M M M M M M 9 M 0 M M M M M M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M Q0 M Q M Q M Q M Q M Q M Q M Q M_VREF IMM M_VREF_Q_IMM /P / 0 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q REVERE TYPE Q0# Q# Q# Q# Q# Q# Q# Q# Q0 Q Q Q Q Q Q Q OT0 OT VREF_ VREF_Q REET# VTT VTT NP NP NP NP 0 R# WE# # 0# # KE0 KE 0 K0 0 K0# 0 K 0 K# M0 M M M M M 0 M M 00 0 L 9 EVENT# VP 99 0 N# N# N#/TET V V V V V V V V V9 V0 V V V V V V V V M M0 M M M M M M M M M M M M M M OIMM M_T_R OIMM M_LK_R T#_IMM 0_IM _IM V_ M R# M WE# M # M_# M_# M_KE M_KE M_LK_R M_LK_R# M_LK_R M_LK_R# M M[..0] R PM_EXTT#_R 0 U0VKX-P M R-0P--P.00. nd =.00.R9 rd =.00.V th =.00.X R R V_0 V_ U0VKX-P U0VKX-P _IM 0_IM PH_MT,,0 PH_MLK,,0 OIMM EOUPLIN 0UVMX-P 0UVMX-P U0VKX-P 0UVMX-P U0VKX-P V_0 R0 R 0KRJ--P 9 0 R9 0KRJ--P 0UVMX-P Place these caps close to VTT and VTT. UVKX-P UVKX-P H = mm Note: O-IMM P ddress is 0x O-IMM T ddress is 0x O-IMM is placed farther from the Processor than O-IMM Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RIII ocket M ize ocument Number Rev JE-P - Wednesday, November, 00 ate: heet of 9

22 L PH_TXOUT+ PH_TXOUT- PH_TXOUT0+ PH_TXOUT0- RN L_TXOUT+ L_TXOUT- L_TXOUT0+ L_TXOUT0- RN0J--P UM_Muxless RN PH_TXLK- L_TXLK- PH_TXLK+ L_TXLK+ PH_TXOUT+ L_TXOUT+ PH_TXOUT- L_TXOUT- 00 LK WP RN0J--P UM_Muxless RN PU_TXOUT- PU_TXOUT+ PU_TXLK+ PU_TXLK- I L_TXOUT- L_TXOUT+ L_TXLK+ L_TXLK- V_0 RN PU_TXOUT0- L_TXOUT0- PU_TXOUT0+ L_TXOUT0+ PU_TXOUT- L_TXOUT- PU_TXOUT+ L_TXOUT+ I RNKJ--P RN L_EI_T L_EI_LK PH_L_ON PH_L_ON R K_L_ON_IN 0RJ--P UM_Muxless K_L_ON_IN 0 R 00KRJ--P UM_Muxless RN T EI L_EI_T LK EI L_EI_LK RN0J--P R9 NV_LON_IN NV_LON_IN I I NV_L_EI_T NV_L_EI_LK RN9 L_EI_T L_EI_LK RT RN0 PH_LUE PH_REEN PH_RE RT_LUE RT_REEN RT_RE RN0J--P UM_Muxless RN NV_RT_RE NV_RT_REEN NV_RT_LUE I RT_RE RT_REEN RT_LUE Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. L_RT_WITHLE ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

23 L/INVERTER/ ONN L/ ONN L NP NP P-ON0-P 0.F.00 _EN LON_OUT_ TOUT_L UVKX-P 0009 RJ--P RIHTNE_N _PWR R90 UPN R90 UPP R909 V_0 LV R R _EN 0 90 U0VKX-P 9 F POLYW-V-P-U nd = For amera N L_TXLK+ L_TXLK- L_TXOUT+ L_TXOUT- L_TXOUT+ L_TXOUT- L_TXOUT0+ L_TXOUT0- L_EI_T L_EI_LK 90 UVKX-P TOUT E90 INT_MI_L_R, nalogy Microphone 09 0 LON_OUT KRF--P R R 00KRJ--P 00P0VJN-P LON_OUT_ 0 L_KLTTL RIHTNE L_KLTTL RIHTNE UM_Muxless R0 RIHTNE_N RJ--P I R RIHTNE_N V_0 ET L_EI_LK I L_EI_T ET _PWR _PWR U0VKX-P F FUE-V-P-U nd = V_0 PH_LV_ON NV_LV_ON PH_LV_ON R 0RJ--P UM_Muxless NV_LV_ON R I R 00KRJ--P LV_ON LV Layout 0 mil UVKX-P U EN N OUT IN# IN# TU-P.0.0F N =.09.09F PreMp 0 ER:R00 request by EMI aron UVKX-P UPN UPP E E Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. L ONN ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

24 E Layout Note: Place these resistors close to the RT-out connector Hsync & Vsync level shift RT_RE RT_R F0F-P nd = V_0 L RT_REEN RT_ F0F-P nd = UVZY-P L9 09 RT_LUE RT_ HV_EN# R F0F-P U RJ--P R RN R9 RJ--P RT_HYN_ RT_HYN_ RT_HYN NV_RT_HYN RN RT_VYN NV_RT_VYN RN0F--P THTPW-P RT_N RT_N R0 L Ferrite bead impedance: 0 ohm@00mhz nd =.00. P0VN-P P0VN-P P0VN-P PH_VYN PH_HYN I RN RN0J--P UM_Muxless 000 RT_VYN_ U RT_N_ RT_N_ R THTPW-P RT_N_..L nd =..L RT_VYN_ rd = PreMp ER:R Layout Note: * Must be a ground return path between this ground and the ground on the V connector. Pi-filter & 0 Ohm pull-down resistors should be as close as to RT ONN. R will hit Ohm first, pi-filter, then RT ONN. V_RT_0 F RT V_0 FUE-V-P-U RV0-P N =.R00.0F 9 V_RT N# nd = R00.HH N# V_0 V_RT_ rd =.R00.F T 09 - LK T_I LK_I RT_IN#_R RN RT_R N RN RN0KJ--P 0UVKX-P RT_ RT_RE N RT_ RT_REEN N RNKJ--P R RT_LUE N RT_VYN N 0 RT_HYN VYN N HYN N V_0_ T T T T PH_T LK PH_LK RT_HYN RT_VYN RN0J--P UM_Muxless LK N00KW-P T NV_RT_T.N0.F LK LK NV_RT_LK nd =.M0.0F 0P0VJN-P I RN LK 0P0VJN-P Hynix 00M NPV KU V_0 R 000 Wistron orporation 0 RT_E# RT_IN#_R F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT_IN#_R 0RJ--P 9 00P0VJN-P 9 0 RT I/F & ONNETOR -U---P RN _LK & T level shift Q V_RT_0 V_0 00m RT ONN JE-P - ize ocument Number Rev ate: Wednesday, November, 00 heet of 9 E K

25 V_0 I = VIEO HMI Level hifter & ONNETOR V_0 UM_Muxless : default setting used P0. if don't used P0 please change 0~0 to 0 ohm resister U0VKX-P U0VKX-P 0 U0VKX-P UM_Muxless UM_Muxless UM_Muxless UM_Muxless UM_Muxless R0 KRJ--P 0009 HMI_LK_R_# OUT_- HMI_LK_R_ OUT_+ 0 HMI_T0_R_# OUT_- 9 HMI_T0_R_ OUT_+ HMI_T_R_# OUT_- HMI_T_R_ OUT_+ HMI_T_R_# OUT_- HMI_T_R_ OUT_+ U HMI_LK- IN_- 9 HMI_LK+ IN_+ HMI_T0- IN_- HMI_T0+ IN_+ HMI_T- IN_- HMI_T+ IN_+ HMI_T- IN_- HMI_T+ IN_+ U0VKX-P U0VKX-P R0 V_0 V V V V V V V 0 V HMI_T N# HMI_T N# UM_Muxless HMI ONN HMI KT-HMI9P--P-U.09. _LK_HMI _T_HMI V_HMI HP_HMI_ON HMI_T_R_ HMI_T_R_# HMI_T_R_ HMI_T_R_# HMI_T0_R_ HMI_T0_R_# HMI_LK_R_ HMI_LK_R_# 0 U0VKX-P 000 V. V_HMI V_0 F0 FUE-V-P-U nd = R 0009 V. V_0 R0 R0 UM_Muxless KRJ--P R0 V_0 hange from.k to.k. HMI_P0 HMI_P R0 UM_Muxless HMI_REXT 99RF--P HMI_OE# HMI EN UM_Muxless R0 KRJ--P 0 P0 P REXT RT_EN# OE# _EN P0-P N N N N N N N N N N N 9 PH_HMI_T 9 L PH_HMI_LK HP PH_HMI_ETET R0 HP_HMI_ON HP_INK 0 00KRJ--P _T_HMI _INK 9 _LK_HMI L_INK 000 V. UM_Muxless st Parade.P0.00 nd Pericom.0.0 R0 Q0 MMT90--P I_PX_Muxless HMI_HP_ R 0KRJ-L-P I_PX_Muxless 0009 V. E.T90. N =.090.P rd =.090.L0 I_PX_Muxless R 0RJ--P R R 0KRJ--P HMI_HP_ET PH_HMI_ETET HMI IRETE/ UM o-lay lose to Level hift Impedance:00 ohm 0009 V. HP_HMI_ON HMI_LK# HMI_LK HMI_T0# HMI_T0 HMI_T# HMI_T HMI_T# HMI_T V_0 HMI_LK# HMI_LK HMI_T0# HMI_T0 HMI_T# HMI_T HMI_T# HMI_T Impedance:00 ohm R09 UM_Muxless 0KRJ-L-P HMI_OE# RN I_PX HMI_IN# 0 R9 UM_PX_Muxless. Q0 o PX_HMI# Not tuff.. N00E--P.N0. N =.N0.E 0009 UM_Muxless R 0RJ--P RN0 HMI_LK_R# I_PX HMI_LK_R HMI_T0_R# I_PX HMI_T0_R RN09 RN0 I_PX HMI_T_R# HMI_T_R HMI_T_R# HMI_T_R lose to HMI onnector Impedance:00 ohm V_ R I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX... HMI_PLL_N R R I_PX I_PX I_PX I_PX I_PX I_PX I_PX I_PX PH_HMI_LK PH_HMI_T R9 HMI_LK_R_# HMI_LK_R_ HMI_T0_R_# HMI_T0_R_ HMI_T_R_# HMI_T_R_ HMI_T_R_# HMI_T_R_ R~R For Intel PE the resister need stuff 0 ohm Q0 For V PE the resister need stuff 00 ohm N =.N0.E R R R R0 R RN RNKJ--P V_0 V Tolerance PU_HMI_LK PU_HMI_T PH_HMI_LK PH_HMI_T RN0 PU_HMI_LK PU_HMI_T V_0 V_HMI HMI_LK_ HMI_T_ R HP_HMI_ON V_V_0 009 I_PX RN0 RN0 U0 V_ V_ EN N RN0 HMI_LK_ I_PX HMI_T LK_HMI _T_HMI HMI_LK T_HMI _LK_HMI _T_HMI V_HMI HMI_T_ V_0 W--P RN0.000.Q RNKJ--P nd =.000.K R R _LK_HMI V_V_0 V_0 nd =.M0.0F _level shift solution.if UM no used P0 (R,R,Q0,R.Q0,RN0,Q0,R~R,0~0 need to stuff,rn0,r,r,q0 to ).I need level shift (R.Q0,RN0 need to stuff,rn0 to ) *UM_Muxless : default setting used P0. if don't used P0 please change 0~0 to 0 ohm resister Q Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. HMI ONN ize ocument Number Rev JE-P - Wednesday, November, 00 ate: heet of 9

26 T onnector V_0 K T_TXP0 T_TXN0 T_RXN0 T_RXP PWR TRE 00mil T 0U0VZY-P U0VKX-P T_TXP0_ 0U0VKX-P T_TXN0_ 0U0VKX-P T_RXN0_ 0U0VKX-P T_RXP0_ 0 U0VZY-P P P P P P P P P P9 P0 P P P P P H KT-TP+P--P.00.9 Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. H ONN ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

27 O onnector V_0 K T_TXN T_TXP T_RXN T_RXP UVZY-P 9 0U0VKX-P 0U0VKX-P 0 0U0VKX-P 0U0VKX-P T 0U0VZY-P T_TXN_ T_TXP_ T_RXN_ T_RXP_ P P O +V +V M P P P N N N N P N P N N O_M O_P TP R 0KRJ--P NP NP NP NP KT-TP-P-90-P Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. O ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

28 LUETOOTH MOULE V_T_0 E E0 put near LUE / all U put one choke near connector by EMI request V_T_0 U9 OUT N N# T IN EN 0TU-P.00.F nd =.09.F rd =.09.0F V_T_0 V_0 U0VKX-P LUETOOTH_EN 0 UPN UPP E-ON--P-U 0.F0.00 Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. LUETOOTH ONN ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

29 0 V_ at least 0 mil,0 U_PWR_EN# upport U0 N VIN VIN EN# VOUT# VOUT# VOUT# O# UPR--P nd = at least 0 mil 0 U0VKX-P V_U_ 0 E0 T0 T0UVM--P U0VKX-P 0..L nd =..09L UPN UPP V_U_ R0 UPN_ R0 UPP_ H U U KT-U--P.0. nd =.0. V_U_ UPN9 UPP9 R0 UPN9_ R0 UPP9_ U KT-U--P.0. nd =.0. Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. U.0 ONN ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet 9 of 9

30 V_ 0 Input.V U0VKX-P 0U0VZY-P igital.v VL U0VKX-P 9 U0VKX-P nalog.v VH U0VKX-P U0VKX-P 9 U0VKX-P U0VKX-P nalog.v VL U0VKX-P U0VKX-P U0VKX-P 90 U0VKX-P LOE TO LN HIP MI- MI+ MI0- MI0+ MI- MI+ RN99F-P RN0 RN9 RN99F-P RN99F-P RN 0009 E90 U0VKX-P E909 U0VKX-P E90 U0VKX-P 0009 MI- MI+ RN RN99F-P 0009 E90 U0VKX-P 0009 PIE_TXP PIE_TXN VL VL LN_T_LE# LK_PIE_LN 0M/00M/_LE# LK_PIE_LN#,,,,0,,,9 PLT_RT# 0 V_ N LX LX 0 LE 9 LE0 VL_RE RX_N RX_P VL REFLK_P REFLK_N VL VL theros -L U R-L-P.0.00,, PIE_WKE# PIE_LK_LN_RQ# P0VJN--P X XTL-MHZ-0-P.000. nd = HosonicP ITTI P, P P0VJN--P V_EN VL LN_X0 LN_XI VH RI R KRF-P 9 0 V PERT# WKE# LKREQ# VT VL_RE XTLO XTLI VH_RE RI TRXP0 TRXN0 VL TRXP TRXN VH TRXP TRXN VL TRXP 9 0 TX_P 0 TX_N 9 TET_RT TETMOE MT MLK VL LE VH TRXN MT? MLK? PIE_RXP 0 PIE_RXN 0 R0 KRJ--P VL VH U0VKX-P U0VKX-P V_ MI- PIE_RXP PIE_RXN MI0+ MI0- VL MI+ - OM change to.0.0 nalog.v MI+ VL V_EN 000P0VJN-P-U U0VKX-P L0 IN-UH-9-P LX 0U0VZY-P - modify, MI- MI+ MI- VH Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O R chip ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet 0 of 9

31 I = LOM U0VKX-P 90 U0VKX-P 90 U0VKX-P 90 U0VKX-P V_EN V_EN MI+ MI+ MI0+ RJ_ RJ_ MT RJ_ RJ_ MT RJ_ V_ 0 MI+ 0 MI0-0 V_EN I Lan Transformer 9 Rx ide XF XFORM-P--P.H0.0 XF XFORM-P--P.H0.0 T:T T:T Tx ide 9 Rx ide 0 modify For EMI 0 MI- LN MI Off-Page RJ_ RJ_ T:T RJ_ 0 MI+ RJ_ RJ_ RJ_ R RJ_ V_EN MT 0RJ--P RJ_ ONN_PWR 0 LN_T_LE# ORNE RJ_ 0 MI- Tx ide R9 KRJ--P T:T RJ 0 MI- 0 RJ_ RJ-P--P.0.Y 90 V_EN MT MI0- MI- V_ U90 U M/00M/_LE# MI0+ V_ V_ V_ ONN_PWR 0009 U90 U90 RJ_ RN RN0J--P-U 9 0 ONN_PWR REEN LE OLOR 0(+) 9(-)::REEN (+) (-):ORNE E 0009 E MI+ 0 MI+ 0 MI- 0 MI- 9 V_EN 9 V_EN 9 V_EN V_EN 00 MT MT MT MT MT MT MT MT T T T T RJ-L-P R90 RJ-L-P R90 RJ-L-P R90 RJ-L-P R90 MT_R 90 KPKVKX-P Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. LN ONN ize ocument Number Rev JE-P Wednesday, November, 00 ate: heet of 9 E -

32 H_OE_OUT H_OE_ITLK R9 RJ--P V_0 U_V V_0 VP_0 LX o-layuout LX LX LX pin PVREF pin EP REREF V_0 V_0 H_IN0 H_OE_ITLK H_OE_OUT R0 RJ--P R RJ--P R 0UVMX-P LOE TO PIN and 9 R 9 U0VKX-P V_0_U 0 U0VKX-P R 0UVMX-P U0VKX-P LOE TO PIN9 and RN UIP_P_EEP UIO_EEP K_EEP_ UVKX-P 00P0VJN-P RNK--P-U R KRJ--P if use.v_0 for V-IO U_N have to make sure power rail on FH or PH side PKR R9 R K_EEP 0 H_PKR OMO_MI_J# V_0 V_0 R9 R UVMX-P V_0_U LOE TO PIN 9 90 U0VKX-P 9 U0VZY-P V_0 R9 U90 EN N# N VIN VOUT 909-TU-P.0909.FF N =.099.F LOE TO PIN9 and V_0 9 0UVMX-P P# RN90 0- Q90 N = V_0 V_0 EP U_N LOE TO PIN EP IITL U_N LOE TO PIN LOE TO PIN U_V (include thermal pad) 9 N EP PIFO EP VP_0 PV U_PK_R+ PK-OUT-R+ U_PK_R- PK-OUT-R- P P U_PK_L- PK-OUT-L- U_PK_L+ 0 PK-OUT-L+ VP_0 9 L_V PV R9 V 9 U0VKX-P R90 U LX-V-R-P.00.0 U0VKX-P P# V PIO0/MI-T PIO/MI-LK P# T-OUT LK U_P U_N PVEE HP_OUT_R_U HP_OUT_L_U Z_ITLK_UIO_+ T-IN U_V_R 9_TIN V-IO 9 YN 0 REET# PEEP P N PVEE HPOUT-R/PORT-I-R HPOUT-L/PORT-I-L MI-VREFO-L MI-VREFO-R MI-VREFO LO-P VREF V 0 9 VREF LO_P MIV MI-VREFO MI-VREFO UIP_P_EEP pilt by N ENE_ LINE-L/PORT-E-L LINE-R/PORT-E-R MI-L/PORT-F-L MI-R/PORT-F-R ENE_ 9 JREF 0 MONO-OUT MI-L/PORT--L MI-R/PORT--R LINE-L/PORT--L LINE-R/PORT--R NLO L_V 0 U_N U0VKX-P U_N H_OE_YN H_OE_RT# LOE TO PIN need onnector OMO Phone jack L_ENE MI-L MI-R MI-L_PORT- MI-R_PORT- MI-J_ MI-L_PORT- MI-R_PORT- JREF U_N R 9KRF-L-P R 0KRF-L-P UVKX--P UVKX--P U0VKX-P U0VKX-P R9 OMO_MI_J# 0KRF-L-P LOE TO PIN9 R0 0KRF-L-P U0VKX-P U0VKX-P U0VKX-P 0009 U_N R9 U_N 0KRJ--P 0UVKX-P U_HP_J# EXT_MI_J# U_MI_L U_MI_R INT_MI_L_R OMO_MI INT_MI_R OMO_MI_R MIV_L OMO_MI R99 00 OMO MI RN9 RN0 RNKJ--P RNKJ--P 9 U_N U_N INT_MI_L_R, OMO_MI MI_IN_L MI_IN_R Mic in jack Q90 -F-P.00.F R9 KRJ--P U_N R9 KRF-L-P MIV OMO_MI 0009 U_N U0VKX-P U_HP_JK_R U_HP_JK_L RN RNJ--P MIV R o R Not tuff Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. UIO OE(L) ize ocument Number Rev ustom JE-P - Wednesday, November, 00 ate: heet of 9

33 E Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. **** ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9 E

34 Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. **** ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

35 Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT (R REER) ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

36 V_R_0 UPN UPP LK_ardreader R0 K9RF-P RREF V_0 V_R_ VRE 0 RREF M P V_IN R_V V N _T/X_/M RT X_/M_ X_/_/M_ X_/_/M_ X_/_/M_ LK_IN X_ P P P 0 P 9 X_# P P P P P 9 0 U0 RT-R-P.0.00 P0 PIO0 P9 P P P X_/_M X_/_/M_0 X_0/_LK/M_ X_WP/_/M /X_WE#_RT U0VKX-P UVZY-P U0VKX-P X_#_RT X_R/_WP/M_LK X_RE#/M_IN# X_E#/_ X_LE/_0/M_ X_LE/_/M_ 0009 IN R-REER (/M/M PRO/X) R EMI capacitor X_/_/M_ X_/_M V_R_0 X_0/_LK/M_ X_LE/_0/M_ X_E#/_ X_/_/M_ X_R/_WP/M_LK _/X_WE#_RT _/X_WE#_RT X_/M_ X_/_/M_ X_/_/M_0 X_0/_LK/M_ X_RE#/M_IN# X_LE/_/M_ X_R/_WP/M_LK V_R_ NP -T/MM-RV -M/MM-M -/MM- -V/MM-V -LK/MM-LK -/MM- -T0/MM-T -T -T -WP -# -# M-/N M- M-T M-IO/T0 M-T M-IN M-T M-LK M-V M-/N NP X-N 0 X- 9 X-R/- X-RE X-E X-LE X-LE X-WE X-WP X-N X-0 0 X- 9 X- X- X- X- X- X- X-V -/MM-/N N N NP NP X_#_RT X_R/_WP/M_LK X_RE#/M_IN# X_E#/_ X_LE/_0/M_ X_LE/_/M /X_WE#_RT X_WP/_/M_ X_0/_LK/M_ X_/_/M_0 X_/_M X_/_/M_ X_/_/M_ X_/_/M_ X_/M T/X_/M RT V_R_0 X_LE/_0/M_ X_E#/_ X_/_/M_ X_/_/M_ X_/_M X_0/_LK/M /X_WE#_RT X_R/_WP/M_LK E90 E9 E9 E9 E E E E RU0P-KT--P 0.I00.I nd = Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ardreader ONN ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

37 Mini ard onnector(wln) upport debug-card Mini ard onnector(robson and ) V_0 V_ V_MINI R9,0, PIE_WKE# MINI_WKE# MINI_LKREQ# LK_PIE_MINI# LK_PIE_MINI 0 E_Rx 0 E_Tx PIE_RXN PIE_RXP PIE_TXN PIE_TXP V_0 R V_0_MIN_ V_ R90 V_ R9 V MIN WLN NP NP V_0 PTWO-ONN-9-P-U 0.F9.0 N = 0.F9.0 rd =.00. R MINI_PWR_ PLT_RT#_MINI MINI_PWR M_LK_MINI M_T_MINI LE_WWN# V_0 R R R R R o Not tuff R R MINI_PWR V_ WIRELE_EN 0 PLT_RT#,,0,,0,,,9 R0 M_LK M_T UPN UPP WLN_LE# V_0 R,0, PIE_WKE# V_0 V_ R0 MIN_LKREQ# LK_PIE_MINI# LK_PIE_MINI PIE_RXN PIE_RXP PIE_TXN PIE_TXP MINI_WKE# V_0 MINI_PWR PLT_RT#_MINI M_LK_MINI M_T_MINI IM_V IM_IO_ IM_LK_ IM_RT_ IM_VPP V_MINI MINI_EN R PLT_RT#,,0,,0,,,9 UPN UPP V_0_MIN_ R9 _LE# WLN_LE_# _LE# R9 TP0 Pin,9, for debug ard WWN NP NP N = 0.F9.0 rd =.00. R oringal reservetion UF R TP TP R0 V_0 IM_V V_0 V_ R9 R9 V_MINI 90 9 IM_V TP IM_VPP IM_RT_ IM_LK_ IM_IO_ IM V VPP RT LK I/O 9 REERVE# REERVE# NP NP NP NP N N 0 N PLT_RT#_MINI 9 UPP UPN Place near MINI 0 _EN R9 MINI_EN N = 9 9 V_0 9-9 V_0 0 - RF MINI_PWR 9 oringal reservetion 0UF V_MINI V_0_MIN_ V_MINI Hynix 00M NPV KU U0VZY-P UVZY-P 9 UVZY-P T 9 N =..00L MINI R Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

38 UN FF R0 0RJ-0-U-P U_N EXT_MI_J# MI_IN_R MI_IN_L V_,0, PIE_WKE# U0_MI# OMO_MI U_HP_JK_R U_HP_J# U_HP_JK_L UPN0 UPP0 9,0 U_PWR_EN#,,0,,0,,,9 PLT_RT# V_ U_PE_LKREQ# PWRN FF PWRN E-ON0-0-P 0.K V_ K_PWRTN# 0, FRONT_PWRLE#_Q TY_LE#_Q U_PK_L- U_PK_L+ U_PK_R- U_PK_R+ V_ UN E-ON--P 0.K UN FF UN 9 0 LK_PIE_U LK_PIE_U# PIE_RXN PIE_RXP PIE_TXN PIE_TXP E-ON0--P 0.K0.00 Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. I/O oard ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet of 9

39 for T thermal diode - 00 Q PM90--P.090.L0 N =.090.K for system thermal diode - 00 Q9 PM90--P.090.L0 N =.090.K & LOE TO _P 00P0VKX-P _N _P 00P0VKX-P _N V_UX_ V_0 RN RMRT# RMRT#_TRL PURE_HW_HUTOWN# LERT# 0 FN RN0KJ--P 099 FN_TH R9 K RV0-P.R00.HH N =.R00.0F PURE_HW_HUTOWN# V_0 0 R9 V_0 RMRT#_TRL 0 FN_PWM Q N00-F-P.00.N N =.00.W 0 U0VKX-P E0 FN_TH_ N =.T. R9 V_UX_ RMRT# FN PWR RMRT# 0, (dummy, K already delay) For PU FN FN E-ON--P 9 0UVMX-P RV-0-P.R00.0F 00 N =.R00.F 0.F0.00 V_0 R 00RJ--P V_0_THERML K U0VKX-P 0 U R KRF-P _P _P _N TP TP V XP PN NP TET N# 9 N#9 N# N# RU-P.00.0 THERM# 0 THERM_ET LERT# N L N N PURE_HW_HUTOWN# THERM_ET LERT# _N M_THERM 0, M_THERM 0, R 9K9RF-L-P T=90 THERM_ET = [(Tset-) x ] x V Hynix 00M NPV KU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. 00 Thermal/Fan onnector ize ocument Number Rev JE-P - ate: Wednesday, November, 00 heet 9 of 9

40 9 9, RMRT# RMRT# V_0 V_UX_ KOL V_UX_ R RMRT#_R K0TE KRIN# T_IN# KOL KOL KOL KOL KOL KOL KOL KOL9 KOL0 KOL KOL KOL KOL KOL KOL KOL KOL V_UX_ FOR K EU KOL KOL Internal Keyoard onnector KROW KROW KROW KROW KROW KROW KROW KROW E_I# Prevent IO data loss solution 09 - U N REET# RN RN0KJ--P 00KRJ--P V 90L9TUF-P.0090.I N =.0009.V R R Q MMT90--P 0 9 0,,0,,,,,9 V_0 V_0 V_0 K E-ON-P-U ERT# PLT_RT# 000 change connect to FP (ame as Lab) 0.K0.0 Pin ->left side 0.K00.0 Pin -> right side(use in lab stage) so swap net E.090.R N =.090.F rd =.T90. R 0KRJ--P FN_TH R09 PLT_RT#_ 00RJ--P 9 RT_E# HMI_IN# EI#_K LK_PI_K, INT_ERIRQ, LP_LFRME# LK_PI_K PM_LKRUN#,,0,,,,,,,, TP 9 FN_PWM TP 9 FN_TH WLN_LE_OFF# 09 ENE suggest pf if stuff R 0.K00.0 N = 0.K0.0 TPT-P.000.T N =.T. rd = UVKX-P R 0KRJ--P TOP_H# 0-00 TOP_H# Pin P0VJN--P HLLWW VOUT N V PX9HI-TR-P.09. E_WI#,,0 LP_L0 LP_L LP_L LP_L V_UX_ KRIN# K0TE K_EEP PM_LP_# _TFULL RT_E# K_PWRTN# PM_LP_# TPLK TPT HMI_IN# K_L_ON_IN RIHTNE TP9 TY_LE WIRELE_EN LUETOOTH_EN PILK H_ON# OVER_W#_ INT_ERIRQ LP_LFRME# LK_PI_K PM_LKRUN# LP_L0 LP_L LP_L LP_L ERT# KRIN# EI#_K K0TE K_EEP _IN_LE FN_PWM T_LE FN_TH WLN_LE_OFF# KOL KOL KOL KOL KOL KOL KOL KOL KOL9 KOL0 KOL KOL KOL KOL KOL KOL KOL KOL KROW KROW KROW KROW KROW KROW KROW KROW TPLK TPT HMI_IN# _TFULL RT_E# PM_LP_# K_PWRTN# PM_LP_# K_L_ON_IN RIHTNE WWN_LE MOEL_I0 TY_LE WIRELE_EN LUETOOTH_EN PILK H_ON# OVER_W# R EWI#_K U stuff.090.0,we can X 'tal over Up witch UVKX-P R 00RF-L-P-U OVER_W# V_0 UVKX-P U ERIRQ LFRME# PILK LKRUN# L0 L L L ERT# KRT# I# 0 PIRT# PWM0 PWM FNPWM0 FNPWM FNF0 FNF KO0 KO KO KO KO KO KO KO KO KO9 KO0 KO KO KO KO KO KO KO KI0 KI KI KI KI KI KI KI PLK PT PLK PT PLK PT PIO PIO PIO PIO0 PIO0 PIO0 PWM PIO9 PIO PIO PIO PILK PIO9 PIO0 PIO K90QF--P K_L K_ PM_U_LK Q9 N00KW-P.N0.F nd =.M0.0F V V V V V 9 V 9 V N 9 N N N L0 0 L 0 0 PXIO0 PXIO PXIO PXIO PXIO PXIO PXIO PXIO PXIO PXIO9 PXIO0 PXIO N N 9 PXIO0 PXIO PXIO PXIO PXIO PXIO PXIO PXIO PIO PIO 0 PI# 0 MOI MIO 9 9 PIO0 90 PIO 0 PIO 9 PIO 9 PIO PIO PIO XLKI XLKO VR PWM_ELET P_LE _EN _I P_VER0_ T_TYPE E_V_0 PI_WP# WIRELE_TN# T_TN# PM_PWRTN# _ENLE_K RMRT#_K _OFF WLN_TET_LE 0_PWR_OO ME_UNLOK# _PREENT LON_OUT U_PWR_N_K PM_LP_M# _EN_ VOLUME_OWN# IRETE# _IN# HRE_LE E_Tx E_Rx T_IN# NUM_LE P_LE FRONT_PWRLE K_XI K_XO VR U0VKX-P VTT_PWR KUP# L -> is a obsoleted part Impedance: 0-ohm V_UX_ rated urrent : H0KF-00T0-P L UVZY-P 0U0VZY-P UVZY-P nd = UVZY-P V N R0 K_XO TP TP PM_PWRTN#,9 RMRT#_K _OFF WLN_TET_LE PI# PIO PII _IN# _EN _I PI_WP# TP TP 0_PWR_OO ME_UNLOK# _PREENT T_IN# TP LON_OUT U_PWR_N_K PM_LP_M# TP9 HRE_LE nd =.000. R 0 - FRONT_PWRLE M_THERM 9, M_THERM 9, U_PWR_EN# 9, TP TP VTT_PWR TP K_XI 00KRJ--P T_L, T_, K_ K_L 0 - TP0 TP V_0 L = pf Freq tolertance :+/- 0 ppm X R R < TTERY <------THERML E_V_0 R 0KRJ--P 0 - R add test point for debug E_Tx E_Rx V_UX_ T_TYPE IRETE# _ENLE_K R _ENLE_K _ENLE KRJ--P R _OFF KRJ--P R KRJ--P E_Rx E_Tx V_ UM_W 00 RNKJ--P RN T_L T EN MOEL_I0 R 0KRJ--P V_UX_ V_UX ENLE,9,9 V_UX_ OVER_W# V_ V_ V_0 Model I " PH 0K.V_UX_ " PL 0K N R9 R0 _90W R R 0KRF--P UM 0KRJ--P R9 0KRF--P P_VER0_ R 00 R R 0KRF--P RN RNKJ--P V_ R0 KRF-P R 0KRF--P Hynix 00M NPV KU M_THERM 9, M_THERM 9, Value PN 0K.00.L 0K.0.L.K..L.9K.9.L.K..L K.00.L K.00.L K.0.L Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. K_K90 ize ocument Number Rev JE-P - Wednesday, November, 00 ate: heet of 0 9