F8V L80V N80V N81 Montevina Block Diagram

Transcription

1 FV L0V N0V N Montevina lock iagram _IN & T ON PE 0 Penryn W & LE PE HMI RT PE PE LV & INV PE INTERNL KEYOR TOUH P PE IR IO PI ROM MI IN HP&PIF OUT OPMP PE Internal MI ON PE PE PE 0 V aughter PE FVa: M FVr: M L0Vr: M N0Vr: M N0Vb/Vc: NM- N0Vm: NP-E N0Vn: NP-T NVe: TI M NVp: TI M NVg: N0M TPM PE E ITE/IT PE 0, zalia odec Realtek zalia M Header T O T H ET PE,, PE PE PE FN + ENOR PI-E x PE 0 FV L0V:L N0V :L PE PE 0 LP MHz zalia T ()MH antiga IH-M U F 0MHz PE 0,,,,, MI Interface PE 0,,,, PE,, PU VORE PI MHz PI-E U.0 ON x amera U Fingerprint luetooth PE 0 PE PE PE PE LOK EN FVa/Vr L0Vr N0Vb/Vm I/LPR N0Vr/Vc/Vn I/LPR ardus RIOH R LN RTL MINIR Robson/ MINIR WLN PE PE PE 0, PE PE PE Neward/ebugard PE, aughter UTeK OMPUTER IN. N lock iagram Wing_heng ize Project Name Rev ustom YTEM PWR R REER PE FVa Tuesday, October 0, 00 ate: heet of PE T & HRER Other PWR PE,,,, 0,,,, R 00MHz ual hannel R O-IMM x PE,, PM:FV... Part Number: Part Name & pec:. TPM NTI INT PM 0/L M:N Part Number: Part Name & pec:. ELELKE() M INTEL M 00/L Part Number: 0000 Part Name & pec:. IHM MO F0IM INTEL /LQ P ON PE RJ,RJ ON PE HP&PIF OUT U.0 ON x PE MI IN PE.0

2 Reset I _T_Y U_ON U_ON +V +V +V_E +VU +VU +VU +.V +V +V +V +0.V +.V +.V +.V +V +V +V PWRW#_E +V_E E PM_PWRTN# IT PM_RMRT# VU_ON E_LK_EN U_PWR 0 LL_YTEM_PWR PU_PWR U_ON U_ON PM_PWROK Power On WITH IHM VRMPWR L_PWROK PWROK PLT_RT# antiga L_PWROK PWROK LK en. LP_# LP_# LP_# + VRMPWR PWROK + VRMPWR H_PURT# LK_PWR To E H_PWR LK_PWR asserted when both PM_U# and VRM_PWR are high. Penryn elay ms PU_VRON +VORE heck sequence & Power On equence UTeK OMPUTER IN PowerOn sequence ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

3 0 H_#[:0] 0 H_#[:] 0 H_REQ#[:0] H_#[:0] H_#[:] H_REQ#[:0] T0 T0 0 0 H_T#0 H_T# 0 H_0M# 0 H_FERR# 0 H_INNE# 0 H_TPLK# 0 H_INTR 0 H_NMI 0 H_MI# T00 T00 T00 T0 T0 T0 T0 T0 T0 T0 T00 T0 H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_REQ#0 H_REQ# H_REQ# H_REQ# H_REQ# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# J L L K M N J N P P L P P R M K H K J L Y U R W U Y U R T T W W Y U V W V M N T V F U00 []# []# []# []# []# []# []# [0]# []# []# []# []# []# []# T[0]# REQ[0]# REQ[]# REQ[]# REQ[]# REQ[]# []# []# []# [0]# []# []# []# []# []# []# []# []# []# [0]# []# []# []# []# []# T[]# 0M# FERR# INNE# R ROUP 0 R ROUP TPLK# LINT0 LINT MI# RV RV RV RV RV RV RV RV RV RV0 IH REERVE XP/ITP INL ONTROL # NR# PRI# EFER# RY# Y# R0# IERR# INIT# LOK# REET# R[0]# R[]# R[]# TRY# HIT# HITM# PM[0]# PM[]# PM[]# PM[]# PRY# PREQ# TK TI TO TM TRT# R# THERML PROHOT# THRM THRM THERMTRIP# H LK LK[0] LK[] H E H F E F 0 H F F E 0 H_IERR# XP_PM# H_PREQ# H_TK H_TI H_TO H_TM H_TRT# H_R# H_PROHOT_# T00 T00 R00 H_# 0 H_NR# 0 H_PRI# 0 H_EFER# 0 H_RY# 0 H_Y# 0 H_R0# 0 H_INIT# 0 H_LOK# 0 H_PURT# 0 H_R#0 0 H_R# 0 H_R# 0 H_TRY# 0 H_HIT# 0 H_HITM# 0 T0 T0 T0 T0 Ohm PU_THRM_ 0 PU_THRM_ 0 H_THRMTRIP#,,0, LK_PU_LK LK_PU_LK# +VP_PU 00 0.UF/0V R0 KOhm % R0 KOhm % +VP_PU Zo= Ohm, 0." max for TL_REF U00 H_#0 E Y H_# H_# [0]# []# F H_# H_# []# []# E V H_# H_# []# []# V H_# H_# []# []# F V H_# H_# []# []# T H_# H_# []# []# E U H_# H_# []# []# E U H_# H_# []# []# K Y H_#0 H_# []# [0]# W H_# H_#0 []# []# J Y H_# H_# [0]# []# J W H_# H_# []# []# H W H_# H_# []# []# F H_# H_# []# []# K H_# H_# []# []# H H_# []# []# 0 H_TN#0 J Y TN[0]# TN[]# H_TN# 0 0 H_TP#0 H TP[0]# TP[]# H_TP# 0 0 H_INV#0 H U INV[0]# INV[]# H_INV# R0 R0 H_TN# H_TP# H_INV# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# TL_REF % KOhm % KOhm T00 T00 T00 T00 PU_EL0 PU_EL PU_EL N K P R L M L M P P P T R L T N L M N F F LK F EL EL EL0 00 []# []# []# []# [0]# []# []# []# []# []# []# []# []# []# [0]# []# TN[]# TP[]# INV[]# TLREF TET TET TET TET TET TET EL[0] EL[] EL[] OKET T RP T RP 0 MI T RP T RP []# []# [0]# []# []# []# []# []# []# []# []# []# [0]# []# []# []# TN[]# TP[]# INV[]# OMP[0] OMP[] OMP[] OMP[] PRTP# PLP# PWR# PWROO LP# PI# E 0 E F E F E F 0 R U Y E E L H H 00 L H L 0 L L L H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_OMP0 H_OMP H_OMP H_OMP H_TN# 0 H_TP# 0 H_INV# 0 R0.Ohm % R0.Ohm % R0.Ohm % R0.Ohm % H_PRTP#,0,0 H_PLP# 0 H_PWR# 0 H_PULP# 0 PM_PI# 0 omp 0,: Z0=. Ohm, trace length < 0." omp,: Z0= Ohm, trace length < 0." R0 H_PWR 0 +VP_PU 0 OKET +VP_PU efault trapping When Not Used XP_PM# H_PREQ# H_TI H_TO H_TM H_R# R00.Ohm % R00.Ohm % R00.Ohm % R00.Ohm % R00.Ohm % R00 KOhm % +VP_PU +V 0, PWRLIMIT# R00 H_PROHOT_# Ohm 00 RV-0 Q00 HN00 THRO_PU 0 H_TK H_TRT# R00.Ohm % R00.Ohm % UTeK OMPUTER IN. N PENRYN() Wing heng Place R00 & R00 for XP function ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

4 H_VI H_VI0 H_VI H_VI H_VI H_VI H_VI +V_PU +V_PU VENE 0 VENE 0 H_VI0 H_VI H_VI H_VI H_VI H_VI H_VI +VORE +VP_PU +VORE +.V +VORE ize Project Name Rev ate: heet of ustom Tuesday, October 0, 00 UTeK OMPUTER IN. N Penryn PU ().0 FVa Wing heng ize Project Name Rev ate: heet of ustom Tuesday, October 0, 00 UTeK OMPUTER IN. N Penryn PU ().0 FVa Wing heng ize Project Name Rev ate: heet of ustom Tuesday, October 0, 00 UTeK OMPUTER IN. N Penryn PU ().0 FVa Wing heng +V_PU 0 m NO0. NR R00 0 % R00 0 % V P V E V V V V V V V F V V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V V V E V E V E V E V E V0 E V E V E V E V F V F V F V F V F V F V0 F V F V F V V V V V H V H V H V0 H V J V J V J V J V K V K V K V K V L V0 L V L V L V M V M V M V M V N V N V N V0 N V P V V F V0 F V F V F V F V F V F V V E V E V E V P V P V R V R V R V R V T V0 T V T V T V U V U V U V U V V V V V V V00 V V0 W V0 W V0 W V0 W V0 Y V0 Y V0 Y V0 V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V V V E V E V0 Y V V E V0 E V E V F U00 OKET U00 OKET R00 0 % R00 0 % UF/V UF/V 00 0UF/.V 00 0UF/.V V V V 0 V V V V V V 0 V0 V V 0 V V V V V V 0 V V0 0 V V V V V V V 0 V V V0 V V V E V E V E0 V E V E V E V E V0 E V E0 V F V F V F0 V F V F V F V F V F V0 F0 V V V 0 V V V V V V 0 V0 V 0 V 0 V V V V V V 0 V V0 V V V V V V V V V 0 V0 V V V V V E V E0 V E V E V E V0 E V E V E0 V F V F0 V F V F V F V F V F V00 F0 V VP J VP K VP M VP J VP K VP M VP N VP0 N VP R VP R VP T VP T VP V VP W VENE F VI[0] VI[] F VI[] E VI[] F VI[] E VI[] F VI[] E VENE E V VP VP V U00 OKET U00 OKET

5 E +VORE for Penryn UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V +VP JP00 MM_OPEN_MIL + E00 +VP ecoupling apacitor (Place near PU) +VP_PU NO0. FVa MP 0UF/V 0 0.UF/V 0 0.UF/V 0 0.UF/V 0 0.UF/V 0 0.UF/V 0 0.UF/V 0 0UF/.V NO0. FVa MP UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V ecoupling guide from Intel 0 0UF/.V 0 0UF/.V UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V 0UF/.V VORE uf/0v r 0uF * pcs 0uF/V * pcs VP 0.uF * pcs 0uF * pcs? 0uF * pcs? 00 0UF/.V 0 0UF/.V +VORE Mid-Frequency apacitor Intel: UF * F: 0UF * : 0UF *0.../ VV:? +VP ecoupling apacitor Intel: 0UF *, 0.UF * F: 00UF *, 0.UF * VV:? F VORE 0uF/0V 0uF/V VP 0.uF 0uF 0uF/0V /0(F) VORE 0uF/0V * pcs * 0pcs * pcs for PU * pcs for PU * pcs * pcs? EREE THERML PROTETION place in the path of a draft +VP +V Thermistor Resistor +VP R00.KOhm % R00 Ohm R UF/V U00 N V U N VOUT PT0NR RT00 00KOhm Q00 +V N00 R00 00KOhm FORE_OFF# 0 0.UF/V Q00 N00 FORE_OFF# U_E# 0,,,,0, H_THRMTRIP# FORE_OFF#, Q00 PM0,,,,,0 PLT_RT# Thermal Trip signal (From PU to IH-M and sequence) UTeK OMPUTER IN. N P Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

6 NO0. NR lock iagram M_LK_ M_T_ PU PU_VI0~ M VR_I0~ Voltage Regulator O U LK en. Reserved 0 ohm R to bypass O/U pin Internal Pull own NO. NR chematics /0 +VP 00 UF/V /PUswitch 00 0.UF/0V /PUswitch / / T00 H_VI RNX00 VR_VI T0 T00 H_VI RNX00 VR_VI /npuswitch T0 T00 H_VI RNX00 VR_VI /npuswitch T0 T00 H_VI RNX00 VR_VI /npuswitch T0 T00 H_VI RNX00 VR_VI /npuswitch T0 T00 H_VI RNX00 VR_VI /npuswitch T0 T0 H_VI0 RNX00 VR_VI0 /npuswitch T0 RNX00 /npuswitch /npuswitch +V VP +V +V +V R00 0KOhm M_R R00 0KOhm /PUswitch Mus elect 0:h :Eh trapping R00 0KOhm VI_PIO0 R00 0KOhm /PUswitch R00 0KOhm VI_PIO R00 0KOhm /PUswitch NO. NPR /0,,,,,, T0 H_VI0 H_VI H_VI H_VI H_VI H_VI H_VI M_LK_ M_T_ M used PWR REET# +VP H_VI0 H_VI H_VI H_VI H_VI H_VI H_VI M_R M_LK_ M_T_ VI_RT# VI_PIO0 NO. NPR 0 U00 M_LK_ M_T_ VTT VIIN0 VIIN VIIN VIIN VIIN VIIN VIIN N M_R L REET# PIO0 M /PUswitch / T00 T00 VIOUT VIOUT VIOUT VIOUT VIOUT VIOUT VIOUT0 V 0 N U O PIO PIO PIO VR_VI VR_VI VR_VI VR_VI VR_VI VR_VI VR_VI0 R00 R00 VI_PIO VI_PIO VI_PIO /0 +V +V VR_VI 0 VR_VI 0 VR_VI 0 VR_VI 0 / +V_VI VR_VI 0 VR_VI 0 VR_VI0 0 /PUswitch U O /PUswitch T00 T00 +V_VI R0 /PUswitch R0 00 UF/V /PUswitch 00 0.UF/0V /PUswitch UTeK OMPUTER IN. N N_PM(MI/F) Kenny hu ize Project Name Rev ustom N Tuesday, October 0, 00 ate: heet of 0.a

7 , M [0..] J00 M Q[0..] Place near O-IMM_0 +.V +.V + E00 0UF/V ER=0mOhm/Ir=. NO. N0V PR M_LK_R0 00.PF/0V /N0V_ M_LK_R#0 M_LK_R 00.PF/0V /N0V_ M_LK_R# Layout Note: Place these caps near O IMM 0 00.UF/.V 00.UF/.V 00.UF/.V 00.UF/.V O-IMM 0 is placed farther from the MH than O-IMM Mus lave ddress: 0H M_LK_R0 R->N(0k change to 0) NO0. FVa PR 0.UF/.V M M[0..] M Q[0..] M Q#[0..] M 0 M M M M M M M M M M 0 M M M M, M, M 0, M, M_#0, M_# M_LK_R#0 M_LK_R M_LK_R#, M_KE0, M_KE, M #, M R#, M WE#,, M_LK_M,, M_T_M, M_OT0, M_OT M M0 M M M M M M M M M M M M M M M Q0 M Q M Q M Q M Q M Q M Q M Q M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# Q0 Q Q Q Q Q Q Q Q Q 0/P Q0 Q Q Q Q Q _ Q Q 0 Q Q 0# Q0 # Q K0 Q K0# Q K Q K# Q KE0 Q KE Q # Q R# Q WE# Q0 0 Q Q L Q Q Q OT0 Q OT Q Q M0 Q M Q0 M Q M Q M Q M Q M Q M Q Q Q0 Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q Q#0 Q Q# Q Q# Q Q# Q Q# Q0 Q# Q Q# Q Q# Q R_IMM_00P M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q0 M Q 0 M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q 0 M Q M Q M Q M Q M Q M Q M Q0 M Q M Q 0 M Q M Q M Q M Q M Q M Q M Q 0 M Q M Q0 M Q M Q +.V +V Layout Note: Place these caps near O IMM UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0 0.UF/.V 0.UF/0V RX00 PM_EXTT#0 M_VREF_MH 0 0.UF/.V 0.UF/0V VREF -> 0/0 mils J00 V V V V V V V V V V0 V V V V V V V V V0 V V V V V V VP V V0 N V N V N V N V NTET V V VREF V V N0 V N V0 V NP_N V NP_N V V V V V V V V V V V V V V0 V V V V V V V0 V V V V V V V V V R_IMM_00P UTeK OMPUTER IN. N R O-IMM_0 Raphael_hen ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

8 , M [0..] M Q[0..] J00 +.V Place near O-IMM_ NO. N0V PR M_LK_R.PF/0V /N0V_ M_LK_R# M_LK_R 00.PF/0V /N0V_ M_LK_R# Layout Note: Place these caps near the MH 0.UF/.V 0.UF/.V 0.UF/.V 00 0.UF/.V Mus lave ddress:h R->N(0k change to 0) NO0. FVa PR 0.UF/.V +V M M[0..] M Q[0..] M Q#[0..] R00, M, M 0, M, M_#, M_# M_LK_R M_LK_R# M_LK_R M_LK_R#, M_KE, M_KE, M #, M R#, M WE#,,,, M_LK_M M_T_M,, M_OT M_OT M 0 M M M M M M M M M M 0 M M M M M M0 M M M M M M M M M M M M M M 0KOhm M Q0 M Q M Q M Q M Q M Q M Q M Q M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# /P _ 0 0# # K0 K0# K K# KE0 KE # R# WE# 0 L OT0 OT M0 M M M M M M M Q0 Q Q Q Q Q Q Q Q#0 Q# Q# Q# Q# Q# Q# Q# Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q Q Q Q Q Q Q Q0 Q Q Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q0 M Q M Q M Q M Q M Q M Q M Q +V +.V Layout Note: Place these aps near O IMM UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0 0.UF/.V 0.UF/0V RX00 PM_EXTT# M_VREF_MH 0 0.UF/.V 0.UF/0V Layout Note: Place these aps near O IMM VREF -> 0/0 mils J00 V V V V V V V V V V0 V V V V V V V V V0 V V V V V V VP V V0 N V N V N V N V NTET V V VREF V V N0 V N V0 V NP_N V NP_N V V V V V V V V V V V V V V0 V V V V V V V0 V V V V V V V V V R_IMM_00P R_IMM_00P UTeK OMPUTER IN. N R O-IMM_ Raphael_hen ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

9 +0.V NO0. FVa PR M_VREF_MH,,, 0.V_VTT_REF 00 0.UF/0V MV +0.V +0.V change to +0.V 00 0.UF/0V +.V R00 0KOhm R00 0KOhm + - +V U00 V+ V- LMVX_NL 00 0.UF/0V M [0..], M [0..], RN00 Ohm RN00 Ohm RN00 Ohm RN00 Ohm RN00E Ohm RN00F Ohm 0 RN00 Ohm RN00H Ohm RN00 Ohm RN00 Ohm RN00 Ohm RN00 Ohm RN00E Ohm RN00F Ohm 0 RN00 Ohm RN00H Ohm M M M M M R# M 0 M M_#0 M_KE0 M M M M M M M +0.V +0.V change to +0.V R00 M #, M R#, M WE#, M [0..], RN00 M 0 Ohm RN00 M 0 Ohm RN00 M WE# Ohm RN00 M # Ohm RN00E M_# Ohm RN00F M_OT Ohm 0 RN00 M_OT0 Ohm RN00H Ohm UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V Layout note: Place one cap close to every pullup resistors terminated to +0.V M [0..], M #, M R#, M WE#, RN00 Ohm RN00 M_KE Ohm RN00 M 0 Ohm RN00 M Ohm RN00E M R# Ohm RN00F M_# Ohm 0 RN00 M_OT Ohm RN00H M Ohm +0.V +0.V change to +0.V M_#[0..],, M_OT[0..],, M_KE[0..],, RN00 M Ohm RN00 M Ohm RN00 Ohm RN00 Ohm RN00E Ohm RN00F M Ohm 0 RN00 M Ohm RN00H M Ohm M M M, UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V RN00 M_KE Ohm RN00 M Ohm RN00 M Ohm RN00 M Ohm RN00E M Ohm RN00F M Ohm 0 RN00 M 0 Ohm RN00H M 0 Ohm RN00 M WE# Ohm RN00 M # Ohm RN00 M_# Ohm RN00 M_OT Ohm HEK WHY? RN00 M Ohm RN00 Ohm RN00 M Ohm RN00 Ohm M_KE M, UTeK OMPUTER IN. N R termination Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

10 R00.Ohm % H_ROMP +VP R00 Ohm H_WIN R00 0 % +VP 00 0.UF/0V R00 KOhm % H_PURT# H_PULP# R00 00 KOhm 0.UF/0V % ap 0.uF within 00 mils from MH T00 RX00 H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_WIN H_ROMP HVREF F F E H H F H M M J J N J P L R N L M J N R N N P N L N0 M Y Y Y0 Y Y Y W Y 0 E E E F E E E E E U00 H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_WIN H_ROMP H_PURT# H_PULP# H_VREF H_VREF NTI_HIPET HOT H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_ H_#_0 H_#_ H_#_ H_#_ H_#_ H_#_ H_# H_T#_0 H_T#_ H_NR# H_PRI# H_REQ# H_EFER# H_Y# HPLL_LK HPLL_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#_0 H_INV#_ H_INV#_ H_INV#_ H_TN#_0 H_TN#_ H_TN#_ H_TN#_ H_TP#_0 H_TP#_ H_TP#_ H_TP#_ H_REQ#_0 H_REQ#_ H_REQ#_ H_REQ#_ H_REQ#_ H_R#_0 H_R#_ H_R#_ F H M J P R N M E P F 0 J E0 H J0 L L J H0 K 0 F K L0 H F E 0 H H J F H E H J L Y Y L0 M E L M E K F F H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_# H_# H_# H_# H_#0 H_# H_# H_# H_# H_# H_REQ#0 H_REQ# H_REQ# H_REQ# H_REQ# H_# H_T#0 H_T# H_NR# H_PRI# H_R0# H_EFER# H_Y# LK_MH_LK LK_MH_LK# H_PWR# H_RY# H_HIT# H_HITM# H_LOK# H_TRY# H_INV#0 H_INV# H_INV# H_INV# H_TN#0 H_TN# H_TN# H_TN# H_TP#0 H_TP# H_TP# H_TP# H_R#0 H_R# H_R# H_#[:] H_REQ#[:0] H_#[:0] H_#[:] H_REQ#[:0] H_#[:0] PM:FV... Part Number: Part Name & pec:. TPM NTI INT PM 0/L M:N Part Number: Part Name & pec:. ELELKE() M INTEL M 00/L UTeK OMPUTER IN. N antiga -- PU () Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of 0.0

11 +.V +VP +V R0 KOhm % R0.0KOHM R0 KOhm % R0 R0 /PM /PM /PM /PM M_ROMP_VOH 0.UF/.V M_ROMP_VOL 0.UF/.V RN0 0OHM RN0 0OHM RN0 0OHM RN0 0OHM 0KOhm 0KOhm PM_EXTT#0 PM_EXTT# MH_EL0 MH_EL MH_EL MH_F_ MH_F_ MH_F_ MH_F_ MH_F_0 MH_F_ MH_F_ MH_F_ 0 0.0UF/V 0 0.0UF/V LK_REF# LK_REF LK_REF# LK_REF T0 T0 T T0 T0 T0 T0 T0 MH_F_ MH_F_0 NO0. FVa PR PM_YN#,0,0 H_PRTP# PM_EXTT#0 PM_EXTT#0 PM_EXTT# PM_EXTT#,0 PM_PWROK,,,,,0 PLT_RT# RX0 0,,0, H_THRMTRIP#,0 PM_PRLPVR RX0 M N R T H H0 H H K L K N M T J M Y F H F T R P P0 P N M E N P T R0 M0 L H P R T R N P T0 T T0 R F H E H F H H H H H F H E F F U00 RV RV RV RV RV RV RV RV RV RV0 RV RV RV RV RV RV RV RV0 RV RV RV RV RV F_0 F_ F_ F_ F_ F_ F_ F_ F_ F_ F_0 F_ F_ F_ F_ F_ F_ F_ F_ F_ F_0 PM_YN# PM_PRTP# PM_EXT_T#_0 PM_EXT_T#_ PWROK RTIN# THERMTRIP# PRLPVR N_ N_ N_ N_ N_ N_ N_ N_ N_ N_0 N_ N_ N_ N_ N_ N_ N_ N_ N_ N_0 N_ N_ N_ N_ N_ RV N F PM R ONTROL/OMPENTION LK MI RPHI VI ME MI H _K_0 _K K_0 _K K#_0 _K# K#_0 _K# KE_0 _KE KE_0 _KE #_0 _# #_0 _# OT_0 _OT OT_0 _OT_ M_ROMP M_ROMP# M_ROMP_VOH M_ROMP_VOL M_VREF M_PWROK M_REXT M_RMRT# PLL_REF_LK PLL_REF_LK# PLL_REF_LK PLL_REF_LK# PE_LK PE_LK# MI_RXN_0 MI_RXN_ MI_RXN_ MI_RXN_ MI_RXP_0 MI_RXP_ MI_RXP_ MI_RXP_ MI_TXN_0 MI_TXN_ MI_TXN_ MI_TXN_ MI_TXP_0 MI_TXP_ MI_TXP_ MI_TXP_ FX_VI_0 FX_VI_ FX_VI_ FX_VI_ FX_VI_ FX_VR_EN L_LK L_T L_PWROK L_RT# L_VREF P_TRLLK P_TRLT VO_TRLLK VO_TRLT LKREQ# IH_YN# TTN# H_LK H_RT# H_I H_O H_YN P T V U0 R R U V0 Y Y Y V R Y F Y H F H M_ROMP M_ROMP# M_LK_R0 M_LK_R M_LK_R M_LK_R M_LK_R#0 M_LK_R# M_LK_R# M_LK_R# M_KE0, M_KE, M_KE, M_KE, M_#0, M_#, M_#, M_#, M_OT0, M_OT, M_OT, M_OT, M_ROMP_VOH M_ROMP_VOL V M_VREF_MH R F Ohm R % E F F E E E E H E0 E E H0 E E E H E F H F E H H N J H N M E K H 0 0 T0 T T T T T0 0 T0 T T LK_REF LK_REF# LK_REF LK_REF# LK_MH_PLL LK_MH_PLL# MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP RT_HYN_M RT_VYN_M L_LK0 L_T0 L_RT#0 VO_TRLLK VO_TRLT.0KOhm R % /M R /PM MH_IH_YN# R 0KOhm +.V R R 0 0.0UF/V L_PWROK +VP 0.Ohm 0.Ohm RT LK RT T /M RX0 Ohm RX0 Ohm /M L_KLT_TRL L_KLTEN Z_LK_HMI 0 Z_RT#_HMI 0 Z_OUT_HMI 0 RX0 Ohm Z_YN_HMI 0 /M EI_LK_M EI_T_M L_VEN R0.KOHM % /M R /M LV_ULKN_M LV_ULKP_M LV_LLKN_M LV_LLKP_M LV_U0N_M LV_UN_M LV_UN_M LV_U0P_M LV_UP_M LV_UP_M LV_L0N_M LV_LN_M LV_LN_M LV_L0P_M LV_LP_M LV_LP_M R /PM T T RT_LUE_J L_VREF+VP 0 0.UF/0V RT_REEN_J RT_RE_J R /PM R0 KOhm % R0 Ohm % Z_IN_HMI 0 L M M K J M E E 0 H E 0 0 H F0 0 H J F K F H K H E E J H J J E L U00 RT_LUE_M RT_REEN_M RT_RE_M L_KLT_TRL L_KLT_EN L_TRL_LK L_TRL_T L LK L T L_V_EN LV_I LV_V LV_VREFH LV_VREFL LV_LK# LV_LK LV_LK# LV_LK LV_T#_0 LV_T#_ LV_T#_ LV_T#_ LV_T_0 LV_T_ LV_T_ LV_T_ LV_T#_0 LV_T#_ LV_T#_ LV_T#_ LV_T_0 LV_T_ LV_T_ LV_T_ TV_ TV_ TV_ TV_RTN TV_ONEL_0 TV_ONEL_ RT_LUE RT_REEN RT_RE RT_IRTN RT LK RT T RT_HYN RT_TVO_IREF RT_VYN NTI_HIPET R /M /M LV R0 PI-EXPRE RPHI TV /M V JP0 HORT_PIN JP0 HORT_PIN JP0 R HORT_PIN PE_OMPI PE_OMPO PE_RX#_0 PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_0 PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX#_ PE_RX_0 PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_0 PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_RX_ PE_TX#_0 PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_0 PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX#_ PE_TX_0 PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_0 PE_TX_ PE_TX_ PE_TX_ PE_TX_ PE_TX_ T T H J L L0 N P N T U Y Y Y H J L L N0 P N T U Y W Y 0 J M M M0 M R N T0 U U0 Y0 0 J L M M M R N T U U Y Y RT_LUE_J RT_REEN_J RT_RE_J PIEN_RXN0 PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN0 PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXN PIEN_RXP0 PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP0 PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_RXP PIEN_TXN0 PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN0 PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXN PIEN_TXP0 PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP0 PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP PIEN_TXP X X X X X X X X X X X X0 X X X0 X X X X X X X X X X X X X X X0 X X RT_LUE_M RT_REEN_M RT_RE_M +V_PE R0.Ohm % R /PM PIEN_RXN[:0] 0 PIEN_RXP[:0] 0 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V R0 /PM PIE_RXN0 PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN0 PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXN PIE_RXP0 PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP0 PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXP PIE_RXN[:0] 0 PIE_RXP[:0] 0 R /PM NTI_HIPET UTeK OMPUTER IN. N antiga-r/pe() Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

12 M Q[0:] M Q[0:] U00 M Q0 J M Q _Q_0 0 M 0, J M Q _Q M, N T M Q _Q M, M M Q _Q_ J 0 M Q _Q R# M R#, J0 0 M Q _Q # M #, M Y0 M Q _Q WE# M WE#, M M Q _Q_ N M Q _Q_ N M Q0 _Q_ U0 M Q _Q_0 M M[0..] T M M M0 M Q _Q M_0 N T M M M Q _Q M_ N Y M M M Q _Q M_ U U M M M Q _Q M_ U M M M Q _Q M_ V Y M M M Q _Q M_ Y T M M M Q _Q M_ 0 J M M M Q _Q M_ M Q[0:] M Q0 _Q_ V J M Q0 M Q _Q_0 _Q_0 Y T M Q M Q _Q Q_ M Q M Q _Q Q_ 0 M Q M Q _Q Q_ Y W M Q M Q _Q Q_ M Q M Q _Q Q_ V U M Q M Q _Q Q_ T M M Q M Q#[0:] M Q _Q Q_ Y J M Q#0 M Q _Q Q#_0 T M Q# M Q0 _Q Q#_ V M Q# M Q _Q_0 _Q#_ W M Q# M Q _Q Q#_ Y M Q# M Q _Q Q#_ U M Q# M Q _Q Q#_ U M Q# M Q _Q Q#_ M M Q# M Q _Q Q#_ U M [0:], M Q _Q_ V M 0 M Q _Q M_0 M M Q _Q M_ M M Q0 _Q M_ H M M Q _Q_0 _M_ M M Q _Q M_ U0 M M Q _Q M_ V M M Q _Q M_ M M Q _Q M_ F M M Q _Q M_ Y W M M Q _Q M_ M 0 M Q _Q M_0 V M M Q _Q M_ V H M M Q0 _Q M_ T H M M Q _Q_0 _M_ N Y M M Q _Q M_ U M Q _Q_ U M Q _Q_ T M Q _Q_ N0 M Q _Q_ M M Q _Q_ M M Q _Q_ J M Q _Q_ J M Q0 _Q_ N M Q _Q_0 M M Q _Q_ J M Q _Q_ J _Q_ R YTEM MEMORY M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q M Q0 M Q M Q M Q U00E K _Q_0 H _Q_ P _Q_ P _Q_ J _Q_ J _Q_ M _Q_ P _Q_ U _Q_ U _Q Q_0 Y _Q_ T _Q_ R _Q Q Q Q Q Q_ F _Q_ E _Q_0 _Q_ F0 _Q_ F _Q Q_ F _Q_ H _Q Q_ H0 _Q Q Q_0 H _Q_ H _Q Q_ H _Q Q_ H _Q_ F _Q_ F _Q Q Q_0 _Q_ Y _Q_ Y _Q_ F _Q_ F _Q Q Q_ V _Q_ U _Q_ R _Q_0 N _Q_ Y _Q_ V _Q_ P _Q_ R _Q_ L _Q_ L _Q_ J _Q_ H _Q_ M _Q_0 M _Q_ H _Q_ J _Q_ R YTEM MEMORY 0 _R# _# _WE# _M_0 _M M M M M M M Q_0 _Q Q Q Q Q Q Q Q#_0 _Q# Q# Q# Q# Q# Q# Q# M_0 _M M M M M M M M M M_0 _M M M M_ M 0, M, M, U M R#, M #, F M WE#, M M[0:] M M M0 Y M M 0 M M F M M M M M M P M M K M M M Q[0:] L M Q0 V M Q M Q M Q H M Q M Q U M Q N M Q M Q#[0:] L M Q#0 V M Q# H M Q# H M Q# M Q# M Q# T M Q# N M Q# M [0:], V M 0 M M U M W M M U M W M T M M M 0 W M Y M H M U M NTI_HIPET NTI_HIPET UTeK OMPUTER IN. N antiga--r bus () Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

13 +.V_MH U00 +VFX_ORE P N H F Y W V U T R P N H F 0 H F Y W V U T R P W W T +VFX_ORE Y E m E Y pec update E 00m J E Y H0 F0 E T T M L E J H F Y V U N M U T T0 J T0 H V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_0 V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_0 V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_0 V_M_ V_M_ V_M_ V_M_ V_M_ V_M_/N V_M_/N V_M_/N V_M_/N V_M_0/N V_M_/N V_M_/N V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_0 V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_0 V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_0 V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_ V_X_0 V_X_ V_X_ V_X_ENE V_X_ENE V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_0 V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_0 V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_0 V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_0 V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_0 V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_ V_X_NTF_0 Max: m POWER V M V FX V FX NTF V M LF V_M_LF V_M_LF V_M_LF V_M_LF V_M_LF V_M_LF V_M_LF W V W V W V W V W V M L K W V U M0 K0 W0 U0 M L K J H F E Y W V U M K H F E Y W V M L K J H F E Y W V U V M0 V Y M0 +VP 0 0.UF/0V MM_OPEN_MIL JP0 MM_OPEN_MIL JP0 0 0.UF/0V /M +VP +.V 0.UF/.V + 0.UF/.V MM_OPEN_MIL JP0 PM: OPEN JP0, JP0 /M + E0 E0 0UF/V 0UF/V MM_OPEN_MIL JP0 MM_OPEN_MIL JP0 /M 0 UF/.V 0.UF/.V + E0 0UF/V /PM R0 /PM R0 + E0 0UF/V UF/.V iscrete V: 0m UM : 0m 0 0UF/0V R: 000m R: 0m 0 UF/.V /M 0.UF/0V 0 0UF/0V 0 0.UF/.V /M 0UF/0V 0 0UF/0V /M 0UF/0V 0 0.UF/.V +.V_MH 0 /M 0.UF/0V 0.UF/0V +V_MH 0 0.UF/0V +VFX_ORE /M 0.UF/0V U00F V_ V_ V_ V_ Y V_ V V_ U V_ M V_ K V_ J V_0 V_ F V_ E V_ V_ V_ Y V_ W V_ V V_ U V_ H V_0 F V_ V_ V_ J V_ V_ E V_ V_ H V_ V_ F V_0 V_ J V_ H V_ F V_ T V_ V ORE NTI_HIPET POWER V NTF V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ M L K J H E Y W U M0 L0 K0 H0 0 F0 E Y0 W0 V0 U0 L K J H E Y W V L K L K K K K +V_MH Route V_X_ENE and V_X_ENE differentially. NTI_HIPET ustom antiga--power () Wing heng UTeK OMPUTER IN. N ize Project Name Rev FVa Tuesday, October 0, 00 ate: heet of.0

14 /00Mhz +V L +V_TV_RT_ +V_TV_RT_ /M +VP +.0V_VP 0 0.UF/0V /M +.0V_VP m 0UF/.V /M NO0. FVa PR +.V +.0V_HPLL +.0V_MPLL +.0V_PEPLL R: 0m R: m +V_TV_RT_ NO0. FVa MP +.0V_PLL.m +.0V_PLL +.0V_VP m +V_Q m On P. and P., R is co-lay to 0, +.0V for antiga(+vp) and R0 is co-lay to0. MM_OPEN_MIL JP0 L0 /M /00Mhz L0 /00Mhz E0 0UF/.V L0 /00Mhz L0 /00Mhz 0UF/0V L0 /M /00Mhz + E0 0.UF/0V 00uF/.V /M /M 0 0.UF/0V /M 0 0.UF/0V NO. FVa R 0.UF/0V + E0 0UF/V + E0.UF/.V L0 /00Mhz R /PM 0UF/V 0.UF/0V NO UE TV NO. FVa R 0.m NO. FVa R.m +.V_TXLV NO. FVa R +.0V_VP R: m R: m NO. FVa R +V_TV.m From, Internal V RT on, TV off 0UF/.V R /PM R0 /PM 0UF/.V R0 + E0 00UF/.V m 0m /M 000PF/0V R /PM +.V R0 0.UF/0V R 0.UF/0V /M /M 0.UF/0V.UF/.V +V_TV_RT_ /M 0.UF/0V /M 0.0UF/V +V_TV_RT_ +.V +.0V_VP +.0V_PEPLL 0m 0UF/0V /M 0.0UF/V 0.0UF/V m 0.0UF/V +.V /M 0.UF/0V /M 0.0UF/V +.0V_PLL +.0V_PLL +.0V_HPLL +.0V_MPLL V_TX_V_LV +V_PE_MH 0.UF/0V.UF/.V 0UF/0V m 0m +.0V_PEPLL 0.UF/0V NO0. FVa MP 0/0 R /PM R /M 0m 0.UF/0V /M 0 0.UF/0V /M R UF/.V 0.UF/0V /PM R F L E J J R0 P0 N0 R P N T R P P N P N N M M M L M L M L M L F M L /M UF/.V U00H V_RT V_RT V V V_PLL V_PLL V_HPLL V_MPLL V_LV V_LV V_PE_ V_PE_PLL V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_ V_M_K_ V_M_K_ V_M_K_ V_M_K_ V_M_K_ V_M_K_NTF_ V_M_K_NTF_ V_M_K_NTF_ V_M_K_NTF_ V_M_K_NTF_ V_M_K_NTF_ V_M_K_NTF_ V_M_K_NTF_ V_TV V_TV V_H V_TV V_Q V_HPLL V_PE_PLL V_LV_ V_LV_ NTI_HIPET RT PLL LV PE M TV H LV POWER K TV/RT XF M K MI HV PE VTT VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_0 VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_0 VTT_ VTT_ VTT_ VTT_ VTT_ V_XF_ V_XF_ V_XF_ V_M_K_ V_M_K_ V_M_K_ V_M_K_ V_TX_LV VTTLF V_HV_ V_HV_ V_HV_ V_PE_ V_PE_ V_PE_ V_PE_ V_PE_ V_MI_ V_MI_ V_MI_ V_MI_ VTTLF VTTLF VTTLF U T U T U T U0 T0 U T U T U T U T U T V U V U T V U F H0 0 F0 K V U V U U H F H L 0.UF/.V m +.V_TXLV 0.UF/.V m 0.UF/.V 0 UF/.V m 0.UF/0V /PM R +V_HV 0.UF/.V m m.uf/.v 0 0UF/.V /M 000PF/0V UTeK OMPUTER IN. N +V_PE +.0V_VP +.V_MH +VP +VP +V +VP +V_PE antiga-power() ize Project Name Rev ustom 0m 0.UF/0V.UF/.V 0 0.UF/.V NO. FVa R NO. FVa R R: m R: 0m 0UF/.V +.V L0 /00Mhz /M /M 0UF/0V 0UF/0V R0 FVa NO. FVa R + E0 0UF/V 0 T Unmount JP0 and mount JP0 NO. FVa R Wing heng Tuesday, October 0, 00 ate: heet of + E0 0UF/V 0.UF/0V R0 % MM_OPEN_MIL JP0.0

15 ate: Tuesday, October 0, 00 heet of ustom FVa.0 ize Project Name Rev UTeK OMPUTER IN. N HIH = Ensable (efault) LOW = isable Wing heng.kohm R0 antiga-n MH_F_ F : F ynamic OT R.KOhm MH_F_ F : PIE RPHI LNE HIH = Normal Operation (efault) LOW = Reverse Lanes MH_F_0 N p.0 R.KOhm MH_F_ MH_F_ F : Intel ME rypto trap Transport Layer ecurity cipher suite HIH = With confidentiality (efault) LOW = Without confidentiality.kohm R0 F0 : VO/PIE ONURRENT MOE LOW = ONLY VO or PIE is Operational (efault) HIH = VO and PIE are operating simultaneously via the PE port MH_F_ F : Integrated TPM Host Interface MH_F_ MH_F_ NO. NPR R HIH = itpm disable (efault).kohm R /PI LOW = itpm enable.kohm +V F [:] : XOR/LL-Z 00 = Reserved 0= XOR Mode Enabled 0= ll-z Mode Enabled = Normal Operation (efault) R0.0KOHM R0.0KOHM R0.KOhm F : MI Lane Reversal LOW = NORML (default) HIH = Reverse Lanes MH_F_ F : MI TRP HIH = MI X (efault) LOW = MI X R0.KOhm MH_F_0 F0 : PIe Loopback HIH = isable (efault) LOW = Enable +V L W U P N H F R M J 0 0 W0 T0 J0 0 Y0 N0 K0 F0 0 0 W T R M H U N N K E W N J E N L E F V T M J Y N H Y N 0 V0 T0 J0 E0 0 M0 F N M H V T V_ V_00 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V V NTF V N V_ V_ V_ V_00 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V V V V V V N_ N_ N_ N_ N_0 N_ N_ N_ N_ N_ N_ N_ N_ N_ N_0 N_ N_ U00J NTI_HIPET H Y L E Y U N J E N J V T M M H Y L J H F E V L R P F W U R P J H F E Y M K M P H U U U U F V J0 M F U U L0 V0 L J U H H E F E U R L W N J F Y T N L Y V R M V R P H F F H Y U T M F V U M J Y T N J E N L U M H Y U T M 0 0 V0 N0 H0 E0 T M J E N L H U H Y U T J F F W T N J H K U V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V V_00 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ V_ V_0 V_ V_ V_ V_ V_ V_ V_ V_ U00I NTI_HIPET M E P L J F H Y U T F M J F E W V R L H P L H N K F N T N K H F V T R J E Y P K H F F H F H V R J Y N L J E F Y T J H F R L K J F E H Y

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17 UTeK OMPUTER IN ize Project Name Rev FVa LNK ate: Tuesday, October 0, 00 heet of.0

18 UTeK OMPUTER IN ize Project Name Rev FVa LNK ate: Tuesday, October 0, 00 heet of.0

19 UTeK OMPUTER IN ize Project Name Rev FVa LNK ate: Tuesday, October 0, 00 heet of.0

20 +V_RT R00 0KOhm RTRT# Part Number: 0000 Part Name & pec:. IHM MO F0IM INTEL /LQ P NO. FVa PR +V +V /M U00E V 0 N NLV0PWR /M U00F V N NLV0PWR Z_LK_HMI_L Z_YN_HMI_L Z_OUT_HMI_L +V_RT MV no use(ext PU) +V +V +V Z_LK_HMI_L Z_YN_HMI_L Z_RT#_HMI_L Z_OUT_HMI_L /M U00 V +.V N NLV0PWR /M U00 V +.V N NLV0PWR /M U00 V R00 +.V N NLV0PWR R0 0 /M 0 0 Z_LK_HMI_UF R0 0 /M Z_YN_HMI_UF Z_LK_V Z_LK_M Z_LK_U Z_YN_V Z_YN_U Z_YN_M R00 0 /M R0 /M Ohm % Z_OUT_HMI_UF RTRT# 0 Z_RT#_V RX0 /PM NV OHM Z_LK, Z_RT#_U RX0 OHM Z_RT#_M RX0 /M OHM Z_YN RX0 /M OHM Z_RT# 0 Z_OUT_V RX0 /PM NV Ohm Z_IN0_U Z_OUT_U RX0 Ohm Z_IN_M Z_OUT_M RX0 /M Ohm RX00 /M Ohm Z_IN_HMI_L 0KOhm 00 UF/0V 00 UF/0V NO. NR R0 Ohm R0 Ohm % % Z_OUT_HMI /M /M JRT MM_OPEN_MIL JRT MM_OPEN_MIL RX0 RX00 RX00 RX0 RX0 RX0 RX0 RX0 Z_LK_HMI Z_YN_HMI 00 Place Near the Open oor /PM NV /M /M /PM NV /M /M Ohm Ohm Ohm Ohm OHM OHM OHM OHM PF/0V T_RXN0 T_RXP0 T_TXN0 T_TXP0 T_RXN T_RXP T_TXN T_TXP JP00 +V_RT NO. FVa R 0 T_LE# MM_OPEN_MIL +.V_PIE_IH Z_IN_V Z_OUT X00.Khz +V PIO NO0. NR +VU X00 X00 X00 X00 R00 RT_X R00 0MOhm R0 RT_X RT_X IH_INTVRMEN LN_LP T00 0.0UF/V 0.0UF/V T0 T0 T0 T0 T0 T0 T0 T00 R0 0KOhm R00.Ohm % RX0 0.0UF/V 0.0UF/V MOhm /M R0 /PM NV PIO 0KOhm T_TXN0_IH T_TXP0_IH T_TXN_IH T_TXP_IH F0 E F E 0 F H E F H E E J H F H J F VccLN_0 & VccL_0 Internal VR High = Enable ( efault ) Low = isable U00 RTX RTX RTRT# RTRT# INTRUER# INTVRMEN LN00_LP LN_LK LN_RTYN LN_RX0 LN_RX LN_RX LN_TX0 LN_TX LN_TX LN_OK#/PIO LN_OMPI LN_OMPO H_IT_LK H_YN H_RT# H_IN0 H_IN H_IN H_IN H_OUT H_OK_EN#/PIO H_OK_RT#/PIO TLE# T0RXN T0RXP T0TXN T0TXP TRXN TRXP TTXN TTXP IHM RT LP LN / LN PU IH T +V_RT R00 0KOhm % R0 FWH0/L0 FWH/L FWH/L FWH/L FWH/LFRME# LRQ0# LRQ#/PIO LN_LP 0TE 0M# PRTP# PLP# FERR# PUPWR INNE# INIT# INTR RIN# NMI MI# TPLK# THRMTRIP# PEI TRXN TRXP TTXN TTXP TRXN TRXP TTXN TTXP T_LKN T_LKP TRI# TRI K K L K K J J N J RX00 RX00 RX00 RX00 RX00 RX00 J RX00 E J F E L F F H H J F H J E0 F0 H J J H R0 ET_TXN_IH ET_TXP_IH +V_RT T0 T00 T00 T00 TRI# R00 0KOhm % IH_INTVRMEN R00 Ohm PM_THRMTRIP# X00 X00 T0 T00 T00 T00 LP_0 0,,, LP_ 0,,, LP_ 0,,, LP_ 0,,, LP_FRME# 0,,, LP_RQ0# 0TE 0 H_0M# H_PRTP#,,0 H_PLP# H_PWR H_INNE# H_INIT# H_INTR R_IN# 0 H_NMI H_MI# H_TPLK# LK_PIE_T# LK_PIE_T R0.Ohm % T00 0.0UF/V 0.0UF/V +VP +VP ET_RXN ET_RXP ET_TXN ET_TXP Vccus_0, Vccus_, & VccL_ Internal VR High = Enable ( efault ) Low = isable R0 Ohm RX00 %.OHM 00 00PF/0V R00 Ohm H_FERR# H_THRMTRIP#,,, +.V +V R0 /M 0 U00 /M R00 /M V Ohm % Z_RT#_HMI_L Z_RT#_HMI_UF NO. FVa PR N Z_RT#_HMI NLV0PWR NO. FVa PR 00 J00 TT_HOLER PF/0V +RTT T00 R00 KOhm 00 0.UF/V H=. mm +V RT_X 00 T T00 +V_RT 00 UF/0V [IH_TP, Z_OUT] : XOR hain Entrance trap 00 = Reserved 0= Enter XOR hain 0= Normal Operation (efault) = et PIe Port onfig it +VH_IH +.V +V +V +.V Z_OUT R0 KOhm U00 U00 V V N OE Z_IN_HMI_L Z_IN_HMI_L Z_IN_HMI TX00KR MX0EXT+ /M Z_IN_HMI U00 and U00 are alternate parts, but not pin to pin competible. UTeK OMPUTER IN. N -IHM() Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of 0.0

21 +V PI U cross moat, add titching cap 0 +.V 0.UF/0V 0.UF/0V 0.UF/0V 0 PI_[:0],0 PI_INT#,0 PI_INT# PI_INT# PI_INT# PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ U00 0 E E E0 0 F F E F0 0 F 0 F F H H 0 H J E J PI REQ0# NT0# REQ#/PIO0 NT#/PIO REQ#/PIO NT#/PIO REQ#/PIO NT#/PIO /E0# /E# /E# /E# IRY# PR PIRT# EVEL# PERR# PLOK# ERR# TOP# TRY# FRME# PLTRT# PILK PME# Interrupt I/F PIRQ# PIRQE#/PIO PIRQ# PIRQF#/PIO PIRQ# PIRQ#/PIO PIRQ# PIRQH#/PIO IHM F F F E F E R E J F R H K F PI_REQ#0,0 PI_NT#0 0 PI_REQ# T0 PIO T0 PIO PIO T0 PI_/E#0 0 PI_/E# 0 PI_/E# 0 PI_/E# 0 PI_IRY#,0 PI_PR 0 PI_RT#_IH PI_EVEL#,0 PI_PERR#,0 PI_LOK# PI_ERR#,0 PI_TOP#,0 PI_TRY#,0 PI_FRME#,0 PLT_RT#,,,,,0 LK_IHPI PI_PME# 0 NO. NR PI_INTE# PI_INTF# PI_INT# PI_INTH# PI_MOI itpm Enable High = Enable Low = isable(efault) PIE_RXN_ROON PIE_RXP_ROON PIE_TXN_ PIE_TXP_ PIE_RXN_MINIR PIE_RXP_MINIR PIE_TXN_ PIE_TXP_ PIE_RXN_NEWR PIE_RXP_NEWR PIE_TXN_ PIE_TXP_ PIE_RXN_LN PIE_RXP_LN PIE_TXN_ PIE_TXP_ /PI RX0 Ohm % PI_LK +V /PI RX0 Ohm % PI_#0 R0 KOhm % T0 /PI /PI RX0 Ohm % PI_I PI_O NO. FVa R WLN_ON X0 X0 X0 X0 X0 X0 X X U_O0# U_O# U_O# U_O# NO00. N0V PR 0 0 VORE_NT VORE_NT NO0. FVa PR 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V R0 PIE_TXN_ROON PIE_TXP_ROON PIE_TXN_MINIR PIE_TXP_MINIR PIE_TXN_NEWR PIE_TXP_NEWR PIE_TXN_LN PIE_TXP_LN _PILK _PI0# _PI# _PII U_O0# U_O# U_O# U_O# U_O# U_O# VORE_NT VORE_NT U_O0# U_O# URI_PN N N P P L L M M J J K K H H E E F F F E N N N P M N M M N N P P U00 PERn PERp PETn PETp PERn PERp PETn PETp PERn PERp PETn PETp PERn PERp PETn PETp PI-Express irect Media Interface MI0RXN MI0RXP MI0TXN MI0TXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP MIRXN MIRXP MITXN MITXP PERn MI_LKN PERp MI_LKP PETn PETp MI_ZOMP MI_IROMP PERn/LN_RXN PERp/LN_RXP UP0N PETn/LN_TXN UP0P PETp/LN_TXP UPN UPP PI_LK UPN PI_0# UPP PI_#/PIO/LPIO UPN UPP PI_MOI UPN PI_MIO UPP UPN O0#/PIO UPP O#/PIO0 UPN O#/PIO U UPP O#/PIO UPN O#/PIO UPP O#/PIO UPN O#/PIO0 UPP O#/PIO UPN O#/PIO UPP O#/PIO UP0N O0#/PIO UP0P O#/PIO UPN UPP URI URI# PI V V U U Y Y W W T T F F W W Y Y W W V V U U U U MI_OMP U_PN0 U_PP0 U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP T0 T0 U_PN U_PP U_PN U_PP U_PN U_PP U_PN0 U_PP0 U_PN U_PP MI_RXN0 MI_RXP0 MI_TXN0 MI_TXP0 MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP MI_RXN MI_RXP MI_TXN MI_TXP LK_PIE_IH# LK_PIE_IH R0.Ohm % L<00mils +.V_PIE_IH Place within 00 mils of IH +V.Ohm % IHM Place within 00 mils of IH +VU IH oot IO select PLT_RT# U0 V N Y NZ0PX_NL R0 UF_PLT_RT# 0,, NO00. N0V PR PM_RI# NO00. N0V PR VORE_NT U_O# VORE_NT U_O0# RN0 0KOhm 0KOhm RN0 0KOhm RN0 0KOhm RN0 RN0 0KOhm LP PI PI 0 NT#0 0 0 # reserve (default) +V U_O# U_O# U_O# 0KOhm RN0 0KOhm RN0 RN0 0KOhm PI_NT#0 _PI# R0 KOhm R0 KOhm 0KOhm RN0 PI_RT#_IH U0 V N Y NZ0PX_NL R PI_RT# 0 U_O# 0KOhm RN0 U_O# 0KOhm RN0 U_O0# 0KOhm RN0 When supporting LK EN Turbo PIN, UNI R0. NO00. N0V PR UTeK OMPUTER IN. N -IHM() Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

22 +VU PM_RMRT# TP_PI# TP_PU# 0 PM_THERM# R 0KOHM RN0 0KOHM RN0 PM_THERM#,,, 0,0,, L RTLN_M_EN M_LINK0 M_LINK PM_U_TT# 0 PM_YN# TP_PI# TP_PU# PIE_WKE# INT_ERIRQ 0 PM_RI# EXT_I# EXT_MI# NO. FVa PR _PKR MH_IH_YN# M_LINK0 M_LINK PM_THERM#_ VR_PWR_LKEN PIO PIO XIE_Y_IN# PIO _# WLN_LE T0 T0 T_ET# T0 P_I P_I PIO T_LL# XIE_Y_F_ET XIE_Y_O_ET IO_MI# P_I0 ULK PM_PWROK_R L_VREF0 L_VREF XIE_Y_F_ET XIE_Y_O_ET IO_MI# LK_IH LK_U PM_U# 0 PM_U# 0 0,0,, PM_LKRUN# L M RX LKRUN# PRLPVR/PIO PM_PRLPVR,0 0 _# WLN_LE NO. NR NO. FVa PR T_ET# NO. FVa MP esign IP is T_LE -> T_ON but need change Page T_LE T_LE,0 +VU,0 NO. FVa R NO. FVa PR R0 0KOhm +VU +V PU_RT# HP_EEPROM_PROTET# R 0KOhm RX For UM esign T0 TPT T0 T0 T0 T0 T R0 0KOhm U00 MLK MT E LINKLERT#/PIO0/LPIO MLINK0 MLINK F R M E E0 M J 0 H E K F J L E F H M J H0 J0 J RI# U_TT#/LPP Y_REET# PMYN#/PIO0 MLERT#/PIO TP_PI# TP_PU# WKE# ERIRQ THRM# VRMPWR T TH/PIO TH/PIO TH/PIO PIO LN_PHY_PWR_TRL/PIO ENERY_ETET/PIO TH0/PIO PIO PIO0 LOK/PIO PIO PIO TLKREQ#/PIO LO/PIO TOUT0/PIO TOUT/PIO PIO PIO/LPIO PKR MH_YN# TP PWM0 PWM PWM IHM M T PIO locks Y PIO Power MT MI PIO ontroller Link T0P/PIO TP/PIO TP/PIO TP/PIO LK LK ULK LP_# LP_# LP_# _TTE#/PIO PWROK TLOW# PWRTN# LN_RT# RMRT# K_PWR LPWROK LP_M# L_LK0 L_LK L_T0 L_T L_VREF0 L_VREF L_RT0# L_RT# PIO/MEM_LE PIO0/U_PWR_K PIO/_PREENT PIO/WOL_EN H F E 0 H F P E 0 0 R 0 R R F F F 0 T0 T T U_LK T NO0. FVa PR PM_PWRTN# 0 T NO0. FVa PR T T T T T R0 0KOhm PM_RMRT# 0 LK_PWR L_PWROK L_LK0 L_T0 L_RT#0 RTLN_M# +VU NO. FVa R NO. FVa R NO. FVa PR,0 PI_INT# PM_LKRUN# PI_INT#,0 PI_EVEL#,0 PI_FRME#,0 PI_TOP# PI_INT#,0 PI_TRY# IO_MI# PIO,0 PI_ERR# PI_INTF# XIE_Y_O_ET XIE_Y_F_ET PI_REQ# PIO,0 PI_PERR# PI_INTE# PI_LOK#,0 PI_IRY#,0 PI_REQ#0 PI_INTH# PI_INT#,0 PI_INT# XIE_Y_IN# R INT_ERIRQ R +V RP0 0KOhm RP0 0 0KOhm RP0 0 0KOhm RP0 0 0KOhm RP0E 0 0KOhm RP0F 0 0KOhm RP0 0 0KOhm RP0H 0 0KOhm 0 RP0 0KOhm RP0 0 0KOhm RP0 0 0KOhm RP0 0 0KOhm RP0E 0 0KOhm RP0F 0 0KOhm RP0 0 0KOhm RP0H 0 0KOhm 0 RP0 0KOhm RP0 0 0KOhm RP0 0 0KOhm RP0 0 0KOhm RP0E 0 0KOhm RP0F 0 0KOhm RP0 0 0KOhm RP0H 0 0KOhm 0 0KOhm 0KOhm EXT_MI# EXT_I# L T_LL# PIE_WKE# PIO M_LINK0 M_LINK R0 R R0 R R R R +VU pull up (.K or 0K?) +VU R.0-0 0KOHM RN0 0KOHM RN0.KOhm.KOhm.KOhm 0KOhm 0KOhm.KOhm.KOhm NO0. N0V PR Mount/unmount as same R PM_RMRT# WLN_LE _# PU_RT# =HP_EPROM_PROTET# +V R R R R NO. FVa PR 0KOhm 0KOhm KOhm KOhm L_PWROK PM_PWROK_R +V RX PM_PWROK,0 NO0. FVa PR NO. FVa ER NO. FVa MP VR_PWR_LKEN R 00KOhm +VU R 0KOhm RX Q0 N00 LK_EN# 0 E_LK_EN 0 PIO PM_THERM#_ PIO PIO T_ET# R0 R0 R R R 0KOhm 0KOhm 0KOhm 0KOhm 0KOhm +V +V +V R 0KOhm P_I0 P_I P_I R 0KOhm NO. NR NO. NPR N P I etting I0 I I NO. NR default no overclock R R 0KOhm 0KOhm /overclock R R 0KOhm 0KOhm /Notoverclock L_VREF non IMT NO. N0V PR FV/N0V P I etting efore P. 0 0.UF/0V R.KOhm R Ohm L_VREF0 L_VREF0/ ~= 0.0 V L_VREF [0:] routing rules Width = mils min pacing = mils min reak-out: mils on mils for 00 mils max I0 I I UF/0V R0.KOhm R Ohm 0 PM_THERM#_E +V R 0KOhm Q0 N00 Q0 N00 PM_THERM# IHM() Wing heng UTeK OMPUTER IN. N ize Project Name Rev ustom FVa.0 Tuesday, October 0, 00 ate: heet of overclock 0 0 fter P. Overclock project fter P. Not Overclock project

23 +VREFU +VREF_IH +VTPLL_IH +VLNPLL_IH +V_VPUX +VUPLL_IH +VUPLL_IH +VUPLL_IH +VMIPLL_IH +.V_PIE_IH +.V_PIE_IH +.V_PIE_IH +.V_PIE_IH +VREFU +.V_PIE_IH +.V_PIE_IH +.V_PIE_IH +.V_PIE_IH +V_RT +VP +V +.V +VP_IH +VP_IH N N +V +V +.V +.V +V +.V +V +.V +.V +V +V +VU +V +VU +.V +.V_PIE_IH +VU +VU +VP_IH +VH_IH +VP_IH ize Project Name Rev ate: heet of ustom Tuesday, October 0, 00 UTeK OMPUTER IN. N -IHM(PWR).0 FVa Wing heng ize Project Name Rev ate: heet of ustom Tuesday, October 0, 00 UTeK OMPUTER IN. N -IHM(PWR).0 FVa Wing heng ize Project Name Rev ate: heet of ustom Tuesday, October 0, 00 UTeK OMPUTER IN. N -IHM(PWR).0 FVa Wing heng m m 0m m m m m 0m m m m. m m m m m u in.*/=..*/+0.0=0. NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R NO0. FVa R. pec update 0.0 NO. FVa PR UF/.V UF/.V 0.UF/V 0.UF/V UF/.V UF/.V 0.UF/V 0.UF/V T0 T0 0 0.UF/V 0 0.UF/V UF/.V UF/.V 0 T 0 T Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss0 Vss Vss Vss Vss Vss Vss 0 Vss Vss Vss Vss0 Vss Vss Vss Vss Vss Vss Vss Vss Vss Vss0 E Vss E Vss E Vss E Vss E Vss E Vss E0 Vss E Vss E Vss E Vss0 E Vss E Vss F Vss F Vss F Vss F Vss H Vss F Vss F Vss F Vss0 F Vss F Vss Vss Vss Vss 0 Vss Vss Vss Vss Vss0 H Vss H Vss H Vss H Vss H Vss H Vss H Vss H Vss H Vss H Vss0 J Vss J Vss J Vss J Vss Vss Vss Vss Vss 0 Vss Vss0 Vss Vss Vss Vss E Vss E Vss E Vss E Vss E Vss E Vss0 E Vss E Vss F Vss F Vss F Vss Vss Vss Vss Vss00 Vss0 Vss0 Vss0 H Vss0 H Vss0 H Vss0 H Vss0 H Vss0 J Vss0 J Vss0 J Vss Vss K Vss K Vss L Vss L Vss L Vss L Vss L Vss L Vss0 L Vss M Vss M Vss M Vss M Vss M Vss M Vss M Vss M Vss M Vss0 N Vss N Vss N Vss N Vss N Vss N Vss N Vss N Vss N Vss N Vss0 P Vss P Vss P Vss P Vss P Vss P Vss P Vss P Vss P Vss P Vss0 P Vss P Vss R Vss R Vss R Vss R Vss R Vss R Vss R Vss R Vss0 R Vss T Vss T Vss T Vss T Vss T Vss T Vss T Vss U Vss0 U Vss U Vss U Vss U Vss U Vss Vss U Vss U Vss U Vss Vss00 Vss0 Vss0 Vss0 H Vss0 H Vss0 J Vss0 J Vss0 J Vss0 J Vss0 Vss0 Vss V Vss0 V Vss V Vss V Vss V Vss Vss V Vss V Vss V Vss W Vss W Vss W Vss0 Y Vss Y Vss Y Vss Y Vss Y Vss Vss H Vss F Vss Vss U00E IHM U00E IHM 0.UF/0V 0.UF/0V 0UF/.V 0UF/.V + E0 00UF/.V + E0 00UF/.V 0.UF/V 0.UF/V.UF/0V.UF/0V 0 0.UF/V 0 0.UF/V 0 0.UF/V 0 0.UF/V 0.UF/V 0.UF/V 0.0UF/V 0.0UF/V R R L0 /00Mhz L0 /00Mhz 0.UF/V 0.UF/V 0 T 0 T L0 /00Mhz L0 /00Mhz.UF/0V.UF/0V 0.UF/V 0.UF/V.UF/.V.UF/.V 0.UF/V 0.UF/V 0 0UF/0V 0 0UF/0V 0 0.UF/0V 0 0.UF/0V 0.0UF/V 0.0UF/V L0 /00Mhz L0 /00Mhz 0 0.UF/V 0 0.UF/V 0 UF/.V 0 UF/.V 0.0UF/V 0.0UF/V 0.UF/V 0.UF/V 0.UF/0V 0.UF/0V 0.UF/V 0.UF/V R0 R0 L0 /00Mhz L0 /00Mhz 0.UF/V 0.UF/V 0 0.UF/V 0 0.UF/V 0.UF/V 0.UF/V 0.UF/0V 0.UF/0V + E0 0UF/V + E0 0UF/V 0UF/.V 0UF/.V 0 0UF/0V 0 0UF/0V 0.UF/V 0.UF/V T0 T0 0 0.UF/V 0 0.UF/V 0.UF/.V 0.UF/.V T0 T0 0 0.UF/0V 0 0.UF/0V + E0 0UF/V ER=0mOhm/Ir=. + E0 0UF/V ER=0mOhm/Ir=..UF/0V.UF/0V 0 0.UF/V 0 0.UF/V L0 /00Mhz L0 /00Mhz VREF VREF_us E Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc Vcc E Vcc 0 E Vcc E Vcc E Vcc E Vcc F Vcc Vcc H Vcc H Vcc J Vcc J Vcc 0 K Vcc K Vcc L Vcc L Vcc L Vcc M Vcc M Vcc N Vcc N Vcc N Vcc 0 P Vcc P Vcc R Vcc R Vcc R Vcc R Vcc T Vcc T Vcc T Vcc T Vcc 0 U Vcc VccMIPLL R Vcc Vcc Vcc Vcc E Vcc F VccTPLL J Vcc J Vcc Vcc 0 VccUPLL J VccLN_0_ 0 VccLN_0_ Vcc_0_ Vcc_0_ Vcc_0_ Vcc_0_ Vcc_0_ E Vcc_0_ F Vcc_0_ L Vcc_0_ L Vcc_0_ L Vcc_0_0 L Vcc_0_ L Vcc_0_ L Vcc_0_ M Vcc_0_ M Vcc_0_ P Vcc_0_ P Vcc_0_ T Vcc_0_ T Vcc_0_ U Vcc_0_0 U VccLN VccLN VccH J VccusH J V_PU_IO_ V_PU_IO_ Vcc F Vcc 0 Vcc Vcc J Vcc J Vcc K VccRT Vccus Vccus Vccus Vccus E Vccus T Vccus T Vccus T Vccus T Vccus 0 T Vccus T Vccus U Vccus U Vccus V Vccus V Vccus W Vccus W Vcc 0 Vccus_0_ Vccus_0_ F Vcc Vcc Vcc Vcc Vcc Vccus F Vcc Vcc Vcc_0_ V Vcc_0_ V Vcc_0_ V Vcc_0_ V Vcc_0_ V Vcc_0_ V VccLN E VccLN VccLN E VccLN VccLN_ VccLNPLL Vcc Vccus Y Vccus Vccus F VccMI_ Y VccMI_ W VccL_0 VccL VccL VccL_ Vcc W Vcc V Vcc U Vcc W Vcc U Vcc V Vcc K Vcc Y Vcc Y Vcc Vcc H Vcc J Vcc E Vcc F Vccus Y Vcc F0 Vcc Vcc 0 Vcc 0 Vcc 0 Vcc 0 Vcc Vcc Vcc Vcc J0 Vcc H0 Vcc Vcc Vcc Vcc 0 Vccus 0 T ORE VP TX RX U ORE PI LN POWER VP_ORE VPU VPU U00F IHM ORE VP TX RX U ORE PI LN POWER VP_ORE VPU VPU U00F IHM 0UF/.V 0UF/.V

24 IH-M +V +V +V R0.KOhm R0.KOhm +V RN0.KOhm.KOhm RN0 0OHM RN0 M_LK_ L_ M_LK_,,, L_ M_LK_M,, _ Q0 UMKN M_T_,,, _ Q0 UMKN M_T_M,, Q0 UMKN non IMT Q0 UMKN Non-iMT Mount: RN0, RN0 Unmount:RN0,RN0,Q0,Q0 0OHM RN0 M_T_ E-IT R0 +V +VU +V R0 R0.KOhm.KOhm 0 M_LK M_LINK0 M_LK M_LK_ 0,0 Q0 UMKN Q0 UMKN 0 M_T M_LINK M_T M_T_ 0,0 Q0 UMKN +V pull up P.0 +VU pull up P. (.K or 0K?) R0 Q0 UMKN NO. FVa PR HP ROM +V R0 0KOhm /M U0 0 V WP L N T0N /M NO. NR R0.KOhm R0 NO. FVa MP M_LK_ M_T_ ustom IHM-Other Wing heng UTeK OMPUTER IN. N ize Project Name Rev FVa Tuesday, October 0, 00 ate: heet of UF/0V /M Q0 N00 /M R R /M R0 NO. NR E_PJ0_HP_EEPROM_PROTET# 0 E_PJ_HP_EEPROM_PROTET# 0 HP_EEPROM_PROTET#,0

25 PI ROM NO. NR +V_PI +V_PI PI_#0 PI_O R0 /PI Ohm /PI R.KOhm +V_PI_0 /PI U0 E# V O HOL# WP# K V I R 0.KOhm 0.UF/V /PI /PI +V_PI_00 /PI R0 Ohm R0 Ohm R0 /PI +V PI_LK PI_I TVF0 (Mb) /PI If your Montevina system supports itpm but does not support imt, the ME firmware size for itpm only should be less than 0K. o a Myte (M bits) PI ROM should be large enough. Please co-work with H/W to use a Mbits PI ROM instead of a Mbits one if there is cost gap UTeK OMPUTER IN. N PI ROM Wing_heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

26 UTeK OMPUTER IN ize Project Name Rev FVa LNK ate: Tuesday, October 0, 00 heet of.0

27 UTeK OMPUTER IN ize Project Name Rev FVa LNK ate: Tuesday, October 0, 00 heet of.0

28 UTeK OMPUTER IN ize Project Name Rev FVa LNK ate: Tuesday, October 0, 00 heet of.0

29 +.V 0.UF/0V NO0. NR 0 0.UF/0V +V 0 NO0. NR L0 /00Mhz 0 +V NO0. NR 0 0 LK_REF LK_TI LK_REF# O LK_TI LK_U LK_PI LK_TPMPI LK_IOPI LK_PI NO. FVa PR LK_KPI LK_IHPI NO00. N0V PR +V FL NO. FVa PR R0 R0 R : VREF K 00 UNI : TURO UNI 0K 0 :NO TO UNI UNI UNI 00 U +V_LK_V PWRVE# NO00. N0V PR +V_LK_V PF/0V 0.UF/0V K0_X,,,, ifferential mplitude control NO. FVa PR 0PF/0V NO. FVa PR /FV_ NO. FVa MP NO. FVa MP M_LK_M M_T_M K0_X LK_V LK_V# U FL PI PI PI0 PIF PIF0 NO00. N0V PR PU PU P PU P FOR Int PU/P R=0K ohm. Int PU: pin,,,, Ext P: pin NO00. N0V PR If FVa/Vr L0V N0Vb/Vm :0000 ILPRELF-T If N0Vr/Vc/Vn :0000 ILPRLF-T If with PU witch :0000 RTMT--RT NO0. NR L00 /00Mhz 0.UF/0V 0 0UF/0V 0UF/0V 0 0.UF/0V RX RX RX RX R0 KOhm % /npuswitch 0 0.UF/0V /M /PM PF/0V Ohm Ohm 0PF/0V /FV_ RX /M Ohm RX RX0 RX Ohm 0PF/0V /FV_ RX 0PF/0V /FV_ RX Ohm /FIR RX0 Ohm /EU 0PF/0V /FV_ Ohm Ohm 0PF/0V /FV_ RX0 /PM 0 0PF/0V /FV_ 0PF/0V /FV_ Ohm.KOhm Ohm Ohm R0 % /npuswitch T0 X0.Mhz 0 U00 VPIEX VPIEX VPIEX PWRVE#* VPU V N X X FL/U_MHz FL/TET_MOE PILK PILK N N N N N N N VPI FIX/L_T/PIeT_L0 /L_/PIe_L0 *ELPIEX0_L#PILK PILK0/REQ_EL** *ELL_#/PILK_F ITP_EN/PILK_F LK T VREF ILPRLF-T VPI V VREF PI/PIEX_TOP# PU_TOP# PUT_LF PU_LF PUT_L0 PU_L0 PUITPT_L/PIeT_L PUITP_L/PIe_L PEREQ#/PIeT_L PEREQ#/PIe_L PIeT_L PIe_L PIeT_L PIe_L PIeT_L PIe_L PIeT_L PIe_L PIeT_L PIe_L PIeT_L PIe_L TLKT_L TLK_L PIeT_L/OTT_MHzL PIe_L/OT_MHzL *PEREQ# PEREQ#* VttPWR_/P# REF/FL/TET_EL REF PU PU LK_MH LK_MH# LK_PU LK_PU# LK_PIE LK_PIE# LK_PIE LK_PIE# LK_PIE LK_PIE# LK_PIE LK_PIE# LK_PIE LK_PIE# LK_PIE LK_PIE# LK_T LK_T# LK_V LK_V# PEREQ# PEREQ# REF REF0 RX RX RX0 LK_V LK_V# U PI PI PI0 PIF PIF0 0 0.UF/0V WWN TP_PI# TP_PU# RX RX RX RX RX RX RX0 RX0 RX0 RX0 RX0 RX RX RX RX RX RX RX RX RX RX RX NO. FVa PR /M /PM /PM NO. N0V PR UF/0V /M Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm Ohm 0KOhm Ohm Ohm Ohm Ohm/FIR +V_VPI LK_MH_LK 0 LK_MH_LK# 0 LK_PU_LK LK_PU_LK# LK_PIE_LN LK_PIE_LN# NO. N0V PR LK_PIE_MINIR LK_PIE_MINIR# LK_PIE_ROON LK_PIE_ROON# LK_PIE_NEWR LK_PIE_NEWR# LK_MH_PLL LK_MH_PLL# LK_PIE_IH LK_PIE_IH# NO. FVa PR LK_PIE_T 0 LK_PIE_T# 0 LK_REF LK_REF# Ohm LK_PIE_PE 0 Ohm LK_PIE_PE# 0 NO0. FVa PR LK_NEWR_REQ# PF/0V PF/V /N0V_ PF/V /N0V_ PF/V /N0V_ PF/V /N0V_ PF/V /N0V_ PF/V /N0V_ PF/V /N0V_ PF/V /N0V_ 0 0UF/0V 0 0.UF/0V LK_ROON_REQ#, LK_PWR LK_IO FL LK_IH NO. N0V PR L0 /00Mhz 0 0UF/0V PWRVE# PEREQ# PEREQ# +V 0 0.UF/0V +V_VPI 0.UF/0V NO. N0V PR Latched Input elect 0 = R LK = PU_ITP LK REQ_EL PIF0 (Pin) 0 = PIELK = PEREQ# REQ_EL PI0 (Pin) ecide pin / +VP ELPIE0_L# PI PIF RX FL PU_EL0 RX KOhm MH_EL0 RX FL PU_EL RX KOhm MH_EL RX0 FL RX PU_EL KOhm MH_EL R 0KOhm R 0KOhm +V R0 R R 0KOhm ecide pin / 0KOhm ecide pin 0/ 0KOhm PEREQ# PEREQ# PEREQ# PEREQ# 0 = LLK = PIEX (Pin) ELL_# =0, pin#/=piex_l; pin#/=fix/, Reserved for R.0 ebug R KOhm R KOhm ELL_# =, pin#/=ot_mhzl; pin#/=l_/pie_l0. (Pin) R KOhm R 0: Enable control TLK & PIEX0 / through I : isable TLK & PIEX0 / ontrolled 0: Enable control PIEX / through I : isable PIEX/ ontrolled 0: Enable control PIEX / through I : isable PIEX / ontrolled 0: Enable control PIEX / / through I : isable PIEX / / ontrolled R KOhm R <Variant Name> UTeK OMPUTER IN +V +V LOK EN ize Project Name Rev ustom /M R 0KOhm R0 0KOhm /PM R R ecide pin /// ecide pin /// /M /PM LK F ELELEL0 PU riven FVa 0KOhm 0KOhm / / Tuesday, October 0, 00 ate: heet of / 0.0

30 0 NO. NR NO. FVa R NO. FVa R +VPLL +V_E +V+V For IT Power +V_E +VPLL +V_E R00 0,,, 0,,, 0,,, 0,,, LP_0 LP_ LP_ LP_ RNX0 OHM RNX0 OHM RNX0 OHM RNX0 OHM LK_KPI 0,,, LP_FRME#,, UF_PLT_RT#,0,, INT_ERIRQ EXT_MI# EXT_I# 0 0TE 0 R_IN# 0TE R_IN# E_RT# PM_THERM#_E PM_THERM#_E K R0 Ohm K_E T_NT# O T00 I R0 Ohm I_E E# R00 Ohm E#_E T_NT# T00 PM_PWRTN# KI0 KI KI KI KI KI KI KI KO0 KO KO KO KO KO KO KO KO KO KO0 KO KO KO KO KO PM_PWRTN# OP_# LUETOOTH# WLN# MRTHON# T0 TP_LK TP_T 0 M0_LK 0 M0_T M_LK M_T THRO_PU T0 0 0.UF/0V E_L0 E_L E_L E_L E_XIN_ E_XOUT_ LUETOOTH# WLN# MRTHON# ITP# TP_LK TP_T M0_LK M0_T M_LK M_T U_PWRINT UF/0V U00 L0 L L L LPLK LFRME# LPRT#/WUI/P ERIRQ EMI#/P EI#/P 0/P KRT#/P WRT# P0 FK P FMIO FMOI FE# P KI0/T# KI/F# KI/INIT# KI/LIN# KI KI KI KI KO0/P0 KO/P KO/P KO/P KO/P KO/P KO/P KO/P KO/K# KO/UY KO0/PE KO/ERR# KO/LT KO KO KO KO/P KO/P KK KKE PLK0/PF0 PT0/PF PLK/PF PT/PF PLK/WUI0/PF PT/WUI/PF MLK0/P MT0/P MLK/P MT/P MLK/WUI/PF MT/WUI/PF ITE-L VTY VTY VTY VTY VTY VTY KMX LP FLH ROM P/ Mus V VORE V V V V V V N VT V V E_N PWM0/P0 PWM/P PWM/P PWM/P PWM/P PWM/P PWM/P PWM/P RX/P0 TX/P TX0/P RIN#/PWRFIL#/LPRT#/P PIO RX0/P0 TMRI0/WUI/P TMRI/WUI/P PWUREQ#/P RI#/WUI0/P0 RI#/WUI/P INT/P TH0/P TH/P L0HLT/PE0 E/PE E#/PE ELK/PE PWRW/PE WUI/PE LPP#/WUI/PE L0LLT/WU/PE P/I LKRUN#/WUI/PH0/I0 RX/WUI/PH/I TX/WUI/PH/I WUI/PH/I PH/I PH/I PH/I 0/PI0 /PI /PI /PI /PI /PI /PI /PI 0/PJ0 /PJ /PJ /PJ /PJ /PJ TEL_# FN0_PWM T_NT# T_NT# TX0 RX0 _IN_O# T_IN_O# RFON_W# PWRLIMIT# PM_U# OLOREN# U_E# U_E# T_IN_O# INTNT_ON# PM_U# K_EN RL_LE# NUM_LE# PWR_LE# H_LE# T0 T0 R00 0KOhm L_L_PWM FN0_PWM 0 T00 T00 H_EN# PREH RX0 _IN_O# 0 T_IN_O# 0 T0 PWRLIMIT#, PM_U# L_KOFF# FN0_TH 0 OLOREN# VU_ON, U_E#,, U_E#,,,, PU_VRON 0 PWR_W# LI_W#,, INTNT_ON# PM_U# PM_LKRUN#,0,, _ON#, R0 VOL_EL /Overclock PM_RMRT# K_EN NO. NR T_LERN VOL_EL, NUM_LE# P_LE# _IN_O# T_IN_O# T_IN_O# M0_LK M0_T 0TE R_IN# NV_OVERT# R0 RN00 M_LK V_LERT# 0,0.KOHM RN00 M_T U_PWR,.KOHM LL_YTEM_PWR PU_PWR VRM_PWR,0, +VU PWR_MON 0 P_ERR# T0 R0 VOL_EL K_I0 0KOhm K_I NO00. N0V PR 0KOhm R0 E_LK_EN RN00 00KOhm PM_PWROK, RN00 00KOhm T0 R0 KOhm PM_U# RN00 00KOhm TEL_P# PM_U# TEL_P# RN00 00KOhm TP_LE R0 FN_ T0 0KOhm U_E#.KOhm R0 U_E#.KOhm R00 NO. NR E_PJ0_HP_EEPROM_PROTET# E_PJ_HP_EEPROM_PROTET# NO. NR T0 NO. NR +V For PU / P +V_E R00 R0 R0 R00 R00 +VU +V 0K P? PM_RMRT# +V_E L00 /00Mhz RN00 PWRLIMIT# 0KOhm NO. FVa R NO. NR R0 RN00 RN00 RN00 RN00 RN00 0KOhm KOhm KOhm.KOhm.KOhm 0KOhm 0KOhm 0KOhm 0KOhm.KOHM.KOHM PM_PWRTN# TP_T TP_LK 00KOHM R00 Note: EXT_MI#, EXT_I#, PU power plane depend on IH PIO. 00 0UF/0V R00 +V +V_E 00 0.UF/0V THERML_TRIP# 0 E_N For E Reset O#_O +V_E +V close to the WRT# (ITE pin) R0 from Thermal sensor 0.UF/.V For Instant Key lose to E R0 R UF/0V R0 0KOhm RN00 0KOhm RN00 0KOhm RN00 0KOhm RN00 0KOhm 00 0KOhm 00 0UF/0V 00 0.UF/0V R0 R0 U00 RT/OUT N 00KOhm LUETOOTH# WLN# OLOREN# MRTHON# ITP# INTNT_ON# E_RT# +V E_N E Reset kts: Option : Mount U00,00,0 NI: 00,00,R0,R0 Option : Mount 00,00,R0,R0 NI: U00, 00, 0 V/V N RNV0 R00 00.UF/.V E_RT# 00 0.UF/0V 00 0.UF/0V 00 0.UF/0V +V_E 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 0 0.UF/0V 00 0.UF/0V +V_PI R0.KOhm E# O O_ROM R0 Ohm ROM_WP# U00 E# V O HOL# WP# K V I TVF00 (Mb) +V_PI NO0. FVa PR +V_E R0 0.KOhm 0.UF/V ROM_H# K I NO. FVa R uto power on and ata time error issue(e Team) NO. FVa MP PM_RMRT# 00 PM_PWROK 00 E_LK_EN 00 U_PWR IT I~J N 0,,0 T# _IN_O# NO. FVa R olve uto power on issue(n) 00 TW +V R0 0KOhm PM_RMRT# Q00 N00K_T_E For X'tal For E E_XIN_ Note: load=.pf place close to E R0 NO0. FVa PR 0MOhm E_XOUT_ X00.Khz +/-0ppm/.PF 0 PF/0V 0 PF/0V For E Hardware trap I/O ase ddress Note: It can be programmable by E fireware hare Memory Note: It can be programmable by E fireware. PP Enable Note: efault Int. Pull-Low UTeK OMPUTER IN. N For imt pin name _PREENT PM TTE# _TTE_ON PM_LP_M# LP_M_ON E_WLN_PWR MP_PWR _PREENT LN_WOL_EN +VM_P +.VM_+VMLK_P UPWR_K E_IT (/) Wing heng N NO. FVa R ize Project Name Rev ustom FVa.0 ate: Tuesday, October 0, 00 heet 0 of

31 For attery Note: When plug in or out the battery, it may cause a spike to damage E and gas gauge. It needs to add varistors to protect those pins. Touch Pad +V L0 /00Mhz 0 J0 0.UF/V el IE 0 0 IE FP_ON_P L0 /00Mhz L0 /00Mhz TP_W_L TP_W_R TP_T 0 TP_LK 0 For witch PWR WITH +V_E R0 0KOhm PWR_W# 0 PWR_W# PWRW# R0 0KOhm 0 Layout note:close to IT 0.0UF/V TP_W_L 00PF/0V W0 TT_WITH_P TP_W_R 00PF/0V W0 TT_WITH_P LI WITH For Thermal ontrol Method +V_E R0 0KOhm LI_W# 0,, LI_W# LIW# R0 0KOhm +V_E LIW# close to connector Note: 0 LI_W# is easy to cause high voltage damage when V plugging inverter board connector to M/ with present. Need to add bidirectional diode to protect this pin. close to U0 output +V THERML_TRIP# 0 0 Layout note:close to IT 0.0UF/V R0 00KOHM Q0 0,0, VRM_PWR 0 N00,,,0 H_THRMTRIP# Q0 R0 PM0 E PU/N THERMTRIP# Keyboard onnector J0 0 IE KI KO KI KO0 KI KO KI KO 0 KI 0 KO KI KI KO KO KI0 KO KO KO 0 KO 0 KO KO0 KO KO KO K_I0 K_I IE FP_ON_P NO. FVa MP PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 PF/0V N0 KI 0 KO 0 KI 0 KO0 0 KI 0 KO 0 KI 0 KO 0 KI 0 KO 0 KI 0 KI 0 KO 0 KO 0 KI0 0 KO 0 KO 0 KO 0 KO 0 KO 0 KO0 0 KO 0 KO 0 KO 0 K_I0 0 K_I 0 R 0KOhm R 0KOhm +V +V UTeK OMPUTER IN. N E_IT (/) Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

32 NO. NR NO. NR +V 0 K_EN 0 Q0 0UF/0V /EL PMNEN /EL +V R0 +V 00KOHM /EL R0 0KOhm /EL Q0 N00 /EL Q0 N00 /EL 0 +V_K.UF/V /EL 0 NF/0V /EL NO. NR U0 N +V TRIER IHRE OUTPUT THREHOL REET ONTROL_VOLTE LMMX /EL R0 KOhm /EL R0 /EL 0KOhm R0 /EL R0 /EL Q0 TNN /EL L0 0UH /EL NO. NR 0 /EL Q0 TNN /EL 0 /EL V0W--F R0 0KOhm /EL +00V_ELK 0.UF/0V /EL 0 0.UF/V /EL U0 HVIN V O O HV0 /EL N V V N REL-O P.0 is not added. Must add at P.0 +00V_EL+ Fly Line +00V_ELK+ +00V_ELK- J0 J0 NO. NR IE IE R0 /EL IE IE R0 /EL Wto_ON_P Wto_ON_P MOhm /EL /EL +00V_EL- NO. NR J0 N N FP_ON_P /EL own Touch ON/OFF witch oost regulator NO. NR Lamp driver UTeK OMPUTER IN K ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

33 +V_LN close to pin within 00 mil NO. FVa PR R r00_h VTRL NO. FVa R 0 mil 0UF/0V 0.UF/0V close to pin Note :The Trace length NO. FVa PR.KOhm R0 from, to (P)'s Pin must be within 0.cm. The trace width from V to Pin should > 0mils. NO. FVa MP +V_LN L_TP L_TN L_RP L_RN L_TRP L_TRM L_TRP L_TRM VTRL +V_LN +V_LN +V_LN F NO. FVa R 0 U0 ROUT V_ MIP0 MIN0 F MIP MIN V_ MIP MIN V_ MIP MIN V_ N V_ ENR XIN_LN XOUT_LN +V_LN N RET VR ENR KTL 0 KTL V_ V_ LE0 LE LE LE V_ V_ OPIO N N LNWKE PERT V_ EV_ HIP HIN EN REFLK_P REFLK_N EV_ HOP HON EN V_ +V_LN IPIO 0 V_ RTL_V_R EEK EEI/UX V_ EEO EE V_ N N 0 N N V_ V_ IOLTE N N LKREQ +V +V_LN EEK EEI LKREQ EEO EE NO. FVa PR NO. FVa R Reserved M Function NO. FVa R RTLN_M# ---> PIO0 of IH RTLN_M_EN --> PIO0 of IH R R0 NO. FVa MP Q0 N00 RTLN_M# RTLN_M_EN +V R0 KOhm R0 KOhm R0 KOhm V V EV V U_E# 0,,,, Power domain chart RTL RTL +VU.V.V.V.V.V close to pin with in 00 mil please change:00x.uh/0%.v.v.v NO. FVa PR 0 0.UF/0V 0 mil 0 0UF/0V verage supply current V 0m V+EV+V m 0 0.UF/0V NO. FVa PR 0 0.UF/0V +V_LN 0 0.UF/0V 0mil +V_LN 0 0.UF/0V +V_LN +V_LN 0 0 VTRL,,,,,0 EE EEK EEI EEO,, +V_LN PIE_WKE# PLT_RT# +EV_LN without R0, 0u leakage when R0.KOhm U0 K I O T NO. FVa R V OR N R0 0 +V_LN 0.UF/0V close to LN HIP N_N_ LN_TXN_ X0 0.UF/0V LN_TXP_ X0 0.UF/0V PIE_RXN_LN PIE_RXP_LN LK_PIE_LN# LK_PIE_LN PIE_TXN_ PIE_TXP_ )/PLTRT# and RTL are in Vccus_ well )PLTRT# will be low before PM_U# go low N be high after PM_U# go high )UF_PLT_RT# could be or 0 pwr well R0 0KOhm N_N_ ONNET TO.V ENLE ;0V TO ILE WIRTHIN REULTOR R R0 NO. FVa PR NO. FVa PR L0.UH 0 UF/.V NO. FVa R F 0mil LN Note : The Trace length between L0 and (P)'s Pin must be within 0. cm. 0 and 0 to L0 must be within 0.cm. Refer to Layout guide for more detail. 0.UF/0V 0 0.UF/0V NO. FVa PR NO. FVa PR 0.UF/0V 0.UF/0V for EMI 0.0UF/0V 0 0.UF/0V +V. 0.UF/0V 0.UF/0V NO. FVa PR L0 0/00Mhz 0mil 0.UF/0V 0.UF/0V 0.UF/0V 0 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V 0.UF/0V +V_LN +V +EV_LN 0.UF/0V XIN_LN +V_LN XOUT_LN X0 ENR Mhz PF/0V PF/0V only NO. FVa ER +V_LN +V_LN L_TP L_RP L_TRP L_TRP 0 IP0Z 0 IP0Z L_TN L_RN L_TRM L_TRM close to transformer <Variant Name> UTeK OMPUTER IN igaln ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

34 0 have issue after IR reflow, alternative part:l-0- U00 TT MT L_MT L_TRM T+ MX+ L_TRLM L_TXN RN0 LTXN UF/0V NO. FVa PR PF/0V / 0 0.0UF/0V PF/0V / WWN L_TRP L_TRM L_TRP L_RN L_RP L_TN L_TP 0 0.0UF/0V PF/0V / MX- T- TT T+ T- TT T+ T- TT 0 T+ T- L_0_ 0 0.0UF/0V L_MT L_MT L_MT L_MT0 PF/0V / Transformer close ON Ohm RN00 Ohm RN00 Ohm RN00 Ohm RN00 R00 0 MX+ MX+ MX+ MX-L_TRLP MT L_MT MX- MT MX- MT FN L_TRLM L_TRLP L_MT L_RXN L_RXP L_MT0 L_TXN L_TXP 0 00PF/KV L_TXP L_RXN L_RXP L_TXN L_TXP L_RXP L_RXN L_TRLP L_TRLM L_TRLM L_TRLP L_TRLM L_TRLP L_TRLM L_TRLP RN0 LTXP RN0 LRXN RN0 LRXP LTXN L00 /00Mhz LTXP LRXP L0 /00Mhz LRXN LTRLP L0 /00Mhz LTRLM LTRLM L0 /00Mhz LTRLP FOR EMI o-layout RN0 LTRLM RN0 LTRLP RN0 LTRLM RN0 LTRLP FOR EMI o-layout LTRLM LTRLP LRXN LTRLM LTRLP LRXP LTXN LTXP TIP RIN NO0. NR L0 /M KOhm/00Mhz L0 /M KOhm/00Mhz 0 000PF/KV /M J00 IE P_N 0 0 NP_N NP_N P_N IE MOULR_JK_P J0 IE IE WTO_ON_P /M NO. FVa ER 0 000PF/KV /M <Variant Name> UTeK OMPUTER IN RJ+ ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

35 ZLI M onnector NO0. NR +V 0 Z_OUT_M 0 Z_YN_M 0 Z_IN_M 0 Z_RT#_M RX0 Ohm /M J0 N N N NP_N N N N NP_N 0 0 R0 /M 0 0.UF/0V /M TO_ON_P 0 /M Z_LK_M 0 UTeK OMPUTER IN M ize Project Name Rev FVa ate: Tuesday, October 0, 00 heet of.0

36 HP_J _OUT_L _OUT_R NO. N0V PR NO. FVa R 0 PIF_V NO0. N0V PR PIF_OUT +V R.KOhm /L R00.KOhm /L UF/V c00_h NO. FVa MP 0/0 N R0 R0 N_UIO R0 R KOhm /PM NV Nonly 0.UF/0V N N_UIO N_UIO EPOP# 0/0 0KOhm 0KOhm +V_OE 0 Z_OUT_U 0 Z_LK_U 0 Z_IN0_U 0 Z_YN_U 0, Z_RT#_U N_UIO EPOP# LINE_VREFOUT R0.KOhm +V_UIO NO. FVa R R0 0KOhm % 00PF/0V T00 R U00 R0.KOhm HN# N IN ET OUT -0TUF 0000 _HP_R R _HP_L R X X E.ER T0 T0 P_EEP R LINE_J UF/V FRONT-L FRONT-R UF/V NO. FVa R EPOP# R /L.Ohm /L.Ohm /L.UF/.V RX R /L 0 U0 L-R 0/0 MI_VREFOUT_L VREF_OE N_UIO +V_UIO N_UIO MI_J HP_J No symbol in data base, modify manually MONO-OUT V URR-L(PORT--L) JREF URR-R(PORT--R) V ENTER(PORT--L) LFE(PORT--R) PIFO MI-LK/ EP PIFO 000PF/0V R 00KOhm PF/0V FRONT-R(PORT--R) FRONT-L(PORT--L) ense HPOUT-L(PORT-I-L) HPOUT-R(PORT-I-R) PVEE V PIO0/MI-/ PIO V_ T-OUT LK V_ T-IN V-IO YN REET# PEEP Ohm L00 UF/V c00_h N 0 P MI-VREFO VREF V V /L R /L.UF/.V LINE-R(PORT--R) LINE-L(PORT--L) MI-R(PORT--R) MI-L(PORT--L) LINE-VREFO 0 MI-VREFO LINE-VREFO MI-R(PORT-F-R) MI-L(PORT-F-L) LINE-R(PORT-E-R) LINE-L(PORT-E-L) ense 0 /00Mhz 0.UF/0V 0 UF/V c00_h MI_VREFOUT_L 0 0.UF/V c00 X0 X0 _R _N R _L X X MI_VREFOUT +V_UIO N_UIO NO. FVa MP % 0KOhm R +V_UIO N_UIO N_UIO 0/0 MI_VREFOUT MI_JK NO. FVa R _PKR N_UIO MI_VREFOUT_L MI_JK INTMI_P _HP_R _HP_L N_UIO If FV/L0V :00000 L If N0V/N :00000 L R.KOhm 0.UF/V c00 UF/0V UF/0V R R 0.UF/V c00 UF/0V UF/0V 0 /L /L R.KOhm 0UF/0V PF/0V 0 0UF/0V 0 0UF/.V c00 VREF_OE N_UIO 0/0 _R _N R _L _N R ense MI ense HP for resume from auto display Microphone plugged/unplugged message issue 000PF/0V EPOP# E.PR N_UIO Pin define is for L. 0 0.UF/V c00 PF/0V R KOhm R0.KOhm 0 0.UF/V c00 00PF/V R X X X R R 0.UF/V c00 P_EEP R 0KOhm /L /_V UF/0V /_V /_V UF/0V /L LINE_VREFOUT UF/0V R R R MI_VREFOUT R0 R0 R /_V /_V /_V _PK_P _PK_N, N_UIO N N N N N diust able Vout=.*(+(00K/K)) N_UIO N_UIO N_UIO +V +V_OE L0 /00Mhz 0 000PF/0V 000PF/0V UF/V UF/V <Variant Name> UTeK OMPUTER IN OE-L0 N N N N ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

37 Internal MI INTMI_P 00 00PF/0V N_UIO R0 MI_J R00.KOhm MI_VREFOUT /n_v J00 IE IE Wto_ON_P N_UIO R0 INT_MI_JK /_V 0 00PF/0V To external JK N_UIO MI_J_JK R0.KOhm MI_VREFOUT_L /n_v MI_VREFOUT_L MI_JK +V_UIO R0 R0 0KOhm /_V R0 0KOhm /_V +V_UIO N_UIO + - U0 0 LMMX UF/V /_V /_V +V_UIO 0 0.UF/V N_UIO N_UIO N_UIO U0 LMMX /_V + - R0 0KOhm /_V R0 0KOhm /_V 0 UF/V /_V R0.KOhm /_V EXT_MI_JK MI_JK R0 /n_v 0 00PF/0V EXT_MI_JK N_UIO R 00KOHM /_V 0 00PF/0V /_V _MI_P R /_V N_UIO E.PR Note:Either or n must be chosen, either _V or n_v must be chosen NO. FVa ER UTeK OMPUTER IN UIO-MI ize Project Name Rev ustom FVa ate: Tuesday, October 0, 00 heet of.0

38 E E V_MP R00 0KOhm r00 JK_W# LY_OP_E# MP_HN Q00 N00K_T_E Q0 N00K_T_E V_MP R 0KOhm MP_HN# Q0 N00K_T_E 0, Z_RT#_U 0 OP_# EPOP# R0 +V MOhm r00_h R0 +V 00KOhm R0 +V 00KOhm r00 LY_OP_E# NO0. FVa PR TW 0 00 Q0 N00K_T_E REERVE FOR R ELY TO MUTE POP. R0 ER_POP _HP_L Q0 N00K_T_E 00 Q0 UF/V N00K_T_E _HP_R Q0 N00K_T_E ER_POP Q0 N00K_T_E Q0 N00K_T_E ER_POP FL FR NO0. N0V PR EPOP R0 00KOhm JK_W# V_MP V_MP +V Q0 R0 00KOhm Q0 PM0 R0 N_UIO 0 0.UF/V 0KOhm R0 PM0 V_PIF PIF_OUT JK_W# V_PIF L0 /00Mhz 0 0.UF/V c00 L0 JK_W# mil width OPTI_V_JK 0 0.UF/V c00 PIF_O_JK 0 00PF/0V FL FR R /L E00 /L 00U/.V + + E0 00U/.V /L R /L 0uF change to 00uF R0 0KOhm /L R0 0KOhm /L /L R R Ohm /L R /L Ohm R /L L0 /00Mhz L0 /00Mhz N 0 c00 0.0UF/V HP_JK_L HP_JK_R 0 0.0UF/V c00 V_MP V_MP NO. FVa MP PV_MP L0 /00Mhz L0 /00Mhz +V N R R 0KOhm 0KOhm 0 0.UF/V 0 UF/V c00_h 0 UF/V c00_h / Follow vender's suggestion N_UIO R 0KOhm R 0KOhm IN0 IN _OUT_L N_UIO 0 0.UF/V N_UIO 0.UF/V PV_MP INTPKL+ N_UIO 0.UF/V N_UIO N_UIO 0 N_UIO U0 INTPKR- L0 /00Mhz INTPKR+ L0 /00Mhz INTPKL- L0 /00Mhz INTPKL+ L0 /00Mhz N IN0 IN LOUT+ LIN- PV RIN+ LOUT- LIN+ YP FU N_UIO N 0 N HUTOWN# ROUT+ RIN- V PV ROUT- N N N N_UIO MP_HN# INTPKR+ V_MP IN0IN v(inv) d 0 d. d. d _OUT_R INTPKL- INTPKR- NO. FVa R <Variant Name> / / / / UIO-OP UTeK OMPUTER IN ize Project Name Rev FVa J0 PKR-_M_ON N PKR+_M_ON PKL-_M_ON PKL+_M_ON N PF/0V Wto_ON_P PF/0V PF/0V PF/0V Tuesday, October 0, 00 ate: heet of.0

39 UTeK OMPUTER IN LNK ize Project Name Rev FVa ate: Tuesday, October 0, 00 heet of.0

40 +V E.PR hange R 000 0UF/.V 0.0UF/V 0.0UF/V 0.0UF/V +V U00 +V 00 0UF/.V 00 0.UF/0V UF/V 0 0 V_PIV_ V_PIV_ V_PIV_ V_PIV_ V_PIV_ V_PIV_ V_RIN V_V UF/V 00 0UF/.V UF/V UF/V 0 0.UF/V 0 0.UF/V 0 V_ROUT V_ROUT V_ROUT V_ROUT V_ROUT V_M NO0. FVa PR PI_ for design IP PI_ +V --> _RT# ms < T < 00ms 0 0.UF/0V R00 R R00 00KOhm PI_[0..] +V _IEL PI_PR PI_/E# PI_/E# PI_/E# PI_/E#0, PI_REQ#0 PI_NT#0, PI_FRME#, PI_IRY#, PI_TRY#, PI_EVEL#, PI_TOP#, PI_PERR#, PI_ERR# _RET# PI_RT# LK_PI PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_ PI_0 _IEL PR /E# /E# /E# /E0# IEL REQ# NT# FRME# IRY# TRY# EVEL# TOP# PERR# ERR# RT# PIRT# PILK PI / OTHER N N N N N N N N N N0 N 0 N 0 N 0 N N HWPN# MEN XEN UIO UIO UIO UIO 0 UIO UIO0/RIRQ# INT# INT# R00 R00 _UP# 0KOhm +V R000 0KOhm 0KOhm R00 0KOhm R00 00KOhm +V E.PR 00 PI_INT#, UIO UIO INT_ERIRQ,0,, PI_INT#, _# R00 F.PR 0KOhm +V E.PR w/o erial ROM: PH R00 0KOhm +V erial EEPROM 0 0.UF/0V U000 V 0 WP L N T0N +V,0,, PM_LKRUN# 0 PME# LKRUN# TET PI_PME# NO0. FVa PR R0 00KOhm R_TQFP N00 Q00 <Variant Name> UTeK OMPUTER IN RIOH R/PI_ ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of 0.0

41 +V U L00 /00Mhz 0 as close as possible to R PF/V 0 R : 0=0.0u R : 0= No stuff 0 R00 0KOhm % 0 00 PF/V 0.0UF/V 0.0UF/V X00.Mhz 0 00 XI XO FIL0 REXT VREF IEEE/ V_PHYV_ V_PHYV_ V_PHYV_ V_PHYV_ TPI0 TPN0 TPP0 TPN0 TPP UF/V LOE POILE TO R/ R0 Ohm R0 Ohm 0 0.0UF/V R0 Ohm 0 0.UF/0V 0.UF/0V 0UF/.V TP0- TP0+ TP0- TP0+ 0 R0 0PF/0V Ohm R0.KOhm LOE POILE TO ONNETOR. NO. FVa PR TP0-_ TP0+_ TP0-_ TP0+_ ircuit area : s small as possible. MIO MIO MIO MIO MIO MIO MIO MIO0 MIO0 0 MIO MIO MIO MIO MIO MIO MIO MIO0 MIO0 MIO0--> xe# MIO0--> Power ontrol / xwp MIO0--> x/m/ LE ontrol MIO--> x ata MIO--> x ata MIO--> x ata MIO--> x ata MIO--> x LE MIO--> x LE RV R_TQFP MIO0 MIO MIO MIO0 MIO0 MIO00 MIO0 MIO0 MIO0 MIO0 MIO0 0 MIO0 MIO0--> M ard etect MIO MIO0--> Write Protect MIO MIO0--> ard Power0 ontrol/ MIO0 M Power ontrol MIO0 MIO0--> External lock/ MIO00 M External lock MIO0--> ommand/m us tate MIO0 NO. FVa R MIO0--> lock/m lock HIEL N R0 MIO0 MIO0--> ata 0/M ata 0 LOK OF MEMORY MOULE Ohm MIO--> ata /M ata MIO0 MIO--> ata /M ata MIO0 T00 TPT MIO--> ata /M ata ouble trace spaceing with other signal <Variant Name> UTeK OMPUTER IN RIOH R/PI_ ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

42 +V Q00 IRLML0PF To correct the problem when M uo adaptor is in use. +V Q0 MIO0 R00 0KOhm UF/V +V Place as close to card 0 reader socket 0.UF/0V as possible R0 0KOhm IRLML0PF 0 0.0UF/V XR +V Place as close to card reader 0 socket as 0.UF/0V possible XR X_PWR_EN olve M uo daptor short issue. N00K_T_E Q0 E.PR hange to , KV E MIO N00K_T_E Q0 T MIO00--> ard etect +V MIO R0 0KOhm MIO00 Q0 N00K_T_E T MIO0--> M ard etect MIO0--> Write Protect MIO0--> ard Power0 ontrol/ M Power ontrol MIO0--> ommand/m us tate MIO0--> lock/m lock MIO0--> ata 0/M ata 0 MIO--> ata /M ata MIO--> ata /M ata MIO--> ata /M ata +V MIO0--> xe# MIO0 0 0PF/0V MIO0 MIO0 +V T MIO MIO0 MIO0 MIO MIO MIO0 MIO MIO0 MIO0 MIO0 T J0 NP_N T /T M V M0 V M V M LK M Reserved M IN M Reserved M IO M V M M V V LK V T0 T NP_N _W OMMON WP_W N N R/- -RE -E LE LE -WE -WP N 0 V X X0 X X X X X X X X X0 X X X X X X X X MIO0 MIO0 MIO0 MIO MIO MIO0 MIO0 R0 0KOhm MIO0 MIO MIO MIO MIO MIO MIO MIO +V X_PWR_EN 00 0 MIO0 MIO0 MIO MIO MIO0 MIO0 MIO0 MIO MIO MIO MIO MIO MIO MIO MIO00 MIO0 MIO0--> Power ontrol / xwp MIO0--> x/m/ LE ontrol MIO--> x ata MIO--> x ata MIO--> x ata MIO--> x ata MIO--> x LE MIO--> x LE _R_P +V MIO00 MIO00 MIO0 H00 EMI_PRIN_P WWN 0 0.0UF/V XR 0 0.0UF/V XR 0 0.0UF/V XR R0 0KOhm 0 PF/0V MIO PF/0V MIO0 PF/0V MIO0 0 PF/0V MIO0 PF/0V T PF/0V T NO. FVa R Impact M function F.PR EMI H0 EMI_PRIN_P <Variant Name> UTeK OMPUTER IN ize Project Name Rev ustom FVa ardreader Tuesday, October 0, 00 ate: heet of.0

43 heck +VU-->+V hange RIOH R as nd source and Winbond WLY (000000) put on st source. NO. N0V PR RN0 /00Mhz heck VU_ON-->N or Test point 0,,,, U_E#,0, UF_PLT_RT# +V +V +.V del PI_RT#(instead of UF_PLT_RT) T0 U0 UXIN.VIN N.VIN N 0 HN# TY# YRT# N N UXOUT.VOUT N.VOUT N PERT# 0 PPE# PU# O# N RLKEN +V_PE +V_PE +.V_PE R00 PERT# KOhm PPE# PU# R0 PERT# PPE# U_O# U_PN U_PP L0 RN0 UP- UP+ WLY J00 LP_FRME#_R PERT# UP- UP+ PU# LP_FRME#_R M_LK_ M_T_ PIE_WKE#_ M_LK_ M_T_ +.V_PE PIE_WKE#_ +V_PE +V_PE LKREQ#_ LKREQ#_ PPE#_ PPE#_ LK_PIE_NEWR# LK_PIE_NEWR PIE_RXN_NEWR PIE_RXP_NEWR PIE_TXN_ PIE_TXP_ 0 0 N U_- N U_+ NP_N PU# REERVE REERVE MLK MT +.V_ +.V_ WKE# +.VUX PERT# +.V_ +.V_ LKREQ# PPE# REFLK- REFLK+ N PERn0 PERp0 N PETn0 NP_N PETp0 N N 0 EXPRE_R_P J0 P_N P_N R_EJETOR_P 0 +V_PE UP- VW_L 0 +V_PE UP+ +V +V +.V VW_L 0.UF/0V 0 0.UF/0V 0.UF/.V 0 0.UF/0V 0.UF/.V 0 0.UF/0V <Variant Name> +V_PE 0.UF/0V 0 0UF/0V 0.0UF/V +V_PE.UF/0V 0.0UF/V +.V_PE.UF/0V 0.0UF/V UTeK OMPUTER IN ize Project Name Rev ustom FVa Express ard Tuesday, October 0, 00 ate: heet of.0

44 E.PR elete Newars/LP lock PERT# R0 /EU 00 00PF/0V /EU R0 0KOhm /EU +V 00 T /EU R0 00KOhm /EU R0 KOHM /EU 0 0.UF/0V /EU R0 KOHM PE_EUEN# Q00 PM0 E /EU U0 OE# V N Y LVV N /EU R0 /EU +V TPT R0 LP_FRME# 0,0,, T00 /EU LP_FRME#_R LP_FRME#_R N N N N NO. FVa MP PPE# PPE# lock RN00 RN00 RN00 RN00 /nebug /nebug /nebug /nebug R /nebug LK_PI 0,0,, LP_ 0,0,, LP_0 0,0,, LP_ 0,0,, LP_ U PPE#_ LKREQ#_ PIE_WKE#_ M_LK_ M_T_ PPE#_ LKREQ#_ PIE_WKE#_ M_LK_ M_T_ LK_NEWR_REQ#,, PIE_WKE#,,, M_LK_,,, M_T_ PE_EUEN# 0 E# X 0 V N If don't support Neward ebug ard,pls do (a) NI all components of block (b) Mount lock (RN00,R) If stage is R, ER, PR, please use /ebug. +VIf stage is MP, please use /nebug to cost down. NTPWR /EU 0 0.UF/0V NO. FVa MP /EU N N N <Variant Name> UTeK OMPUTER IN Express ard ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

45 E heck stub +V +VU +V +V,,,,,,,0,,,,,,,0,,,,,0,,,,,,0,,,,,,,0,0,, +VU 0,,,,0,, +V,,,,,,0, LV_Y0P 0 LV_U0P LV_Y0N 0 LV_U0N LV_YP 0 LV_UP LV_YN +V 0 LV_UN LV_YP 0 LV_UP LV_YN 0 LV_UN LV_LKP change to 0000P 00 0 LV_ULKP LV_LKN 0 LV_ULKN LV_Y0P 0.UF/V 0 LV_L0P J0 LV_Y0N 0 LV_L0N LV_YP 0 LV_LP LV_YN +V IE +L_V 0 LV_LN +L_V 0 LV_YP 0 +L_V 0 LV_LP +V LV_YN EI_LK EI_T 0 LV_LN LV_LKP 0 LV_LLKP LV_LKN LV_Y0N LV_Y0N 0 LV_LLKN LV_Y0P R0 R00 0 LV_Y0P 0 LV_YN 0KOhm 0KOhm LV_YN LV_YP LV_YP EI_LK R0 EI_LK_M EI_T LV_YN R0 /M LV_YN EI_T_M 0 LV_YP 0 /M LV_YP 0 EI_LK_PE EI_T_PE LV_LKN LV_LKN 00PF/0V 00PF/0V LV_LKP LV_LKP IE WTO_ON_0P NO0. NR 0 R 0 NO. FVa PR NO. FVa PR PF/0V PF/0V LV_LKN LV_LKN NO0. FVa MP 0 +V +V +V.PF/0V.PF/0V LV_LKP LV_LKP 0 / PF/0V / PF/0V R R 00KOHM 00KOHM Q0 R +L_V The aps will impact on LV signal!! PMNEN 0KOhm L0 /00Mhz /M Q00 power suggest R UMKN L_VEN 0.UF/V VV L_V_EN_PE VL 0 L_V_EN_PE NO. FVa PR Q00 0.UF/V 0.UF/V 0UF/0V 0UF/0V L00 /00Mhz VL INVERTOR _T_Y_INV UMKN R J0 NT /M 0 0KOhm R V L_KLT_TRL NO. FVa R UF/V V /PM N NO. NR R L0 KOhm/00Mhz N 0 L_L_PWM L0 KOhm/00Mhz VREF R0 00KOHM +V +L_V +L_V KEN U0 0 RF 0 0 PWM LI_W# 0,, LI_W# IN OUT WTO_ON_P 0.UF/V N L_V_EN_PE 00PF/0V IN EN 0 L_KOFF# /M TU R0 L_KLTEN 0 NO. NR _T_Y_INV VL R F.ER Magnatic witch For LI_W# 0KOhm 0/0 On/OFF lose to W0 For N0V 0/0 Magnatic witch R0 Q0 +V 00KOHM N00K_T_E For FV For LI_W# On/OFF U0 /N0V NO. FVa MP +V NO. FVa MP V LIW# N U0 /FV OUTPUT NO. FVa MP V LIW# N <Variant Name> ELHLT LIW# OUTPUT 0PF/0V 0.UF/0V ELHLT /N0V LV & Inverter 0PF/0V 0.UF/0V /FV UTeK OMPUTER IN lose to W0 For N0 project 0 L_KEN_PE ize Project Name Rev ustom Q0 IRLML0PF FVa Tuesday, October 0, 00 ate: heet of.0 E

46 +V 0 RT_VYN +V U0 V 00 0.UF/V NO. FVa MP +V +V +V +V,,,,,,,0,,,,,,,0,,,,,0,,,,,,0,,,,,,,0,0, +V,,,,,,0, +V,,,,,,0,,,,,0, N Y LVV +V VYN_RT RT_RE RT_REEN RT_LUE Ohm/00Mhz L0 Ohm/00Mhz L0 Ohm/00Mhz L0 RE REEN LUE 0 RT_HYN U0 V N Y LVV HYN_RT _ HYN_RT VYN_RT _ L0 R00 R0 L0 /00Mhz Ohm Ohm /00Mhz HYN VYN +V +V +V 00 RN00.kOhm RN00.kOhm R0 R0 R PF/0V 0PF/0V 0PF/0V +V 0 V 0 V 0 V 0 0PF/0V 0PF/0V NO. FVa R PF/0V 0PF/0V 0PF/0V PF/0V 0PF/0V 0 _PE 0 _PE RT LK RT T RN00.kOhm RN00.kOhm R0 /M R0 /M Q00 UMKN Q00 UMKN _PE REITOR LOE TO MXM _PE RE REEN LUE J0 0 HYN VYN _U_PR 0 RT_RE 0 RT_REEN 0 RT_LUE RT_RE RT_REEN RT_LUE <Variant Name> UTeK OMPUTER IN RT & TV-Out ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

47 <Variant Name> UTeK OMPUTER IN VI-***** ize Project Name Rev FVa Tuesday, October 0, 00 ate: heet of.0

48 lose to HMI ON(E Protection) 0 Ohm for compensate layout impedance 0.UF/.V 0.UF/.V VI_TX+_M_R VI_TX-_M_R +V_VI VI_TX+_M_R VI_TX-_M_R VI_TX+_M_R VI_TX-_M_R +V_VI VI_LK+_M_R VI_LK-_M_R Must be short for E diode I layout NO. FVa MP +V U0 TM_+ N TM_V TM_+ N IP0Z0 U0 TM_+ N TM_V TM_+ N IP0Z Q0 +V 0 N TM_- TM_N N TM_- 0 N TM_- TM_N N TM_- N00 +V_HMI VI_TX+_M_R VI_TX-_M_R VI_TX+_M_R VI_TX-_M_R VI_TX+_M_R VI_TX-_M_R VI_LK+_M_R VI_LK-_M_R NO. FVa R R R R R R R R0 R F0 0./V 0.UF/.V NO0. N0V PR +V_VI VI_TX+_M_ VI_TX-_M_ VI_TX+_M_ VI_TX-_M_ VI_TX+_M_ VI_TX-_M_ VI_LK+_M_ VI_LK-_M_ 0 +V HMI_ETET V 0 0 VI_TX- R0 KOhm R 0KOhm /PM NV R /npm NV NO0. N0V PR VI_TX- VI_TX+_M_ VI_TX-_M_ VI_TX+_M_ VI_TX-_M_ VI_TX+_M_ VI_TX-_M_ VI_LK+_M_ VI_LK-_M_ VI_LK_M_R VI_T_M_R R r00_h 0 0PF/0V NO0. N0V PR HMI ON NO. FVa PR 0 J0 0 keep the position for EMI or E issue. RN0 P_N P_N P_N P_N HMI_ON_P 0 VI_TX-_M_R P_TRLT trapping:(port ) Low = No HMI/P (default) High = HMI/P NO. FVa PR +V VI_T M VI_LK M 0 VI_TX+ VI_TX+ R KOhm /00Mhz L0 RN0 VI_TX+_M_R +V 0 VI_T 0 VI_LK VO_TRLT VO_TRLLK.KOhm RN0.KOhm RN0 RN0 /PM RN0 /PM Q0 Q0 UMKN UMKN NO. FVa MP NO. N0V PR +V_HMI 0 VI_TX- 0 VI_TX+ VI_TX- VI_TX+ R KOhm RN0 RN0 /00Mhz L0 VI_TX-_M_R VI_TX+_M_R RN RN /M /M RN0.KOhm RN0.KOhm VI_T M VI_LK M 0 VI_TX- VI_TX- RN0 VI_TX-_M_R If you use nvidia PU, it need be Kohm If you use UM or TI, it need be.kohm R0 KOhm /00Mhz L0 0 VI_TX+ VI_TX+ RN0 VI_TX+_M_R NO. FVa PR 0 VI_LK- VI_LK- RN0 VI_LK-_M_R 0 VI_LK+ VI_LK+ R0 KOhm /00Mhz L0 RN0 VI_LK+_M_R VO_TRLT trapping:(port ) Low = No VO/HMI (default) High = VO/HMI NO. FVa PR VI_T M VI_T_M_R VI_LK M VI_LK_M_R HMI UTeK OMPUTER IN. N Wing heng ize Project Name Rev ustom FVa Tuesday, October 0, 00 ate: heet of.0

49 UTeK OMPUTER IN. N ize Project Name Rev FVa Wing heng ate: Tuesday, October 0, 00 heet of.0

50 FN & THERML ONTROLLER For Penryn PU: st source: TEMP.ENOR 0PU OP- MT nd source: 0000 TEMP ENOR MXYM+ OP- MXIM +V R00 0KOhm PM_THERM# MXIM suggestion: 00 00pf(00) R00 00ohm (000000) MT suggestion: 00 00pf(00) R00 00ohm (000000) NO. FVa R Wto_ON_P IE IE J00 E.PR +V_FN +V +V NO. FVa MP L000 R000 0KOhm 000 +V,0 M_LK_ 000 /00Mhz,0 M_T_ 0UF/0V Irat= PM_THERM# FN0_TH PF/0V PM_THERM# 00 00PF/0V +V_THM +V Max: m R00 0 U000 MLK V PU_THRM_ MT XP PU_THRM_ LERT# XN O#_O N THERM# 0PU +V_E NO. FVa R 00 0.UF/0V PU_THRM_ PU_THRM_ O#_O 0 R00 00KOHM O#_O R00 R00 0KOhm FN0_PWM 0 PU_THRM_ PU_THRM_ 00 00PF/0V heck heck: read T NO. FVa R 00 00PF/0V N00 Q000 R00 +V FK 0KOhm 00 O#_O TW V_LERT# 0,0 heck Thermal policy <Variant Name> UTeK OMPUTER IN FN & THERML ize Project Name Rev FVa Tuesday, October 0, 00 0 ate: heet of.0

51 E T H ON J0 N 0 T_TXP0 +V 0 T_TXN0 NP_N NO. N0V PR X0 T_H_TXN0 0 T_RXN0 0.0UF/V X0 T_H_TXP0 0 T_RXP0 0.0UF/V R0 0KOhm H_LE# +V 0 0 T_LE# 0 Q0 Q0 UMKN UMKN +V R0 XIE_Y_F_ET +V +V 0 0 NP_N N T_ON_P 0UF/0V c00 0.UF/V 0.UF/V 0.UF/V 0UF/0V c00 LYOUT NOTE: Two trobes : Matched within 00 mils of each other [0:] : Matched within +/- 0 mils of two strobes T O ON J0 NP_N 0 T_TXP 0 T_TXN NP_N 0 T_RXN X T_RXN_O 0.0UF/V 0 T_RXP X T_RXP_O 0.0UF/V +V XIE_Y_O_ET +V T0 P P P P P P P P P NP_N P P NP_N P T_ON_P 0 0UF/0V 0.UF/V 0UF/0V 0.UF/V 0UF/0V 0.UF/V 0UF/0V c00 c00 c00 c00 H & O UTeK OMPUTER IN close to connector (+V) ize Project Name Rev Tuesday, October 0, 00 ate: heet of E ustom FVa.0 +V +V +V +V,,,,,,,0,,,,,,,0,,,,,0,,,,,,,0,,,,,,0,0,, +V,,,,,,,0,,,,0, +V,,,,,,0,

52 E UP- U_PN 0 UP+ U_PP N N /N0V /00Mhz UP+ N +V +V_U0 J0 UP- 0P+ U-UP /FV +V +VU0 0P- NO. FVa ER RN0 R F0 V RN0 00KOHM./V /00Mhz +VU_0 L0 +VU0 UP0+ N /FV UP0- P+ + U_ON_XP L 0 E0 0 +VU0 P- V 0UF/.V U-OWN UP0- Q0 0UF/0V R 0.UF/V N N U_PN0 0 PMNEN F.PR UP0+.KOhm 0 U_PP0 /N0V 0.UF/V U_O0# /00Mhz /FV R RN0.KOhm /FV RN0 +V +V_U NO. FVa ER +V +V,,,,,0, +V UP- F0./V /00Mhz U_PN L0 +VU_ L0 +VU /00Mhz UP+ R U_PP + /N0V 00KOHM 0 E0 0 E.PR /FV NO. FVa R RN0 Remove U commom UP- U_PN L0 J0 choke /00Mhz UP+ co-lay U_PP NO. FVa ER IE_ /N0V +VU V IE_ UP- +V +V_U T0- RN0 UP+ +V T0+ U- N /FV R00 F00 NO. FVa ER IE_ E.PR EMI./V L00 IE_ R0 RN0 00KOHM +VU_ +VU U_ON_XP R0 H0 NO. FVa MP R0 /FV 00 /00Mhz 0 0 R0 + EMI_PRIN_P Q00 0UF/0V E00 0.UF/V 0.UF/V EMI UP- E.ER 0 PMNEN U_PN 0UF/.V /00Mhz /N0V L0 UP+ R0 J0 H00 U_PP 0.UF/V.KOhm IE_ NO0. N0V PR /N0V +VU V IE_ UP- T0- EMI_PRIN_P UP+ U_O# T0+ /FV o-layout N RN0 IE_ U- R0 IE_.KOhm U_ON_XP RN0 /FV L0 RN0 0UF/.V NO. FVa ER 0UF/0V 0.UF/V /FV Q0 E.PR 0 PMNEN R R NO. FVa R 0.UF/V U_O#.KOhm.KOhm NO. FVa ER UP- UP+ +VU I/O I/O V N J0 HEER_X0P 0 +VU Z0_0N UP- 0 U- UP+ EXT_MI_JK U0 INT_MI_JK TP0-_ OPTI_V_JK UP+ UP- TP0+_ 0 PIF_O_JK +VU I/O I/O V N 0 JK_W# TP0+_ HP_JK_L Z0_0N TP0-_ HP_JK_R <Variant Name> MI_J_JK HP_J U0 UP- +VU U0 I/O V Z0_0N NO. N0V PR I/O N UP+ NO. N0V PR U-P: U//MI/ERPHONE L0 /00Mhz NP_N NP_N UTeK OMPUTER IN U/U P ize Project Name Rev FVa ustom Tuesday, October 0, 00 ate: heet of.0 E