Page Title of Schematics Page SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB SB

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1 Page of chematics Page 0 0 chematics Page Index lock iagram 0 R&F (MI,P,FI) 0 R&F (LK,MI,JT) 0 R&F (R) 0 R&F (POWR) 0 R&F (RPHI POWR) 0 R&F (N) 09 R&F (RRV) 0 PH (H,JT,T) PH (PI-,MU,LK) PH (MI,FI,PIO) PH (LV,I) PH (PI,U,NVRM) PH (PIO,V_NTF,RV) PH (POWR) / PH (POWR) / PH (V) 9 LOK N 0 RIII(O-IMM_0) / RIII(O-IMM_) / O-IMM_VRF / +K (NPL) PI Flash ROM ebug Port xpress ard Mini-PI ard (WLN) TV-Tuner onnector 9 LN (0) / 0 LN (Transformer) / T H T -ROM raidwood onnector PI (M&iLINK) / PI () / amera onnector Felica onnector ep&lv onnector 9 luetooth onnector 0 Modem onnector K onnector tatus L chematics Page Index ( / Revision / hange ate) Project ode & chematics ubject: Rev. M90 Main oard Page of chematics Page Touch Pad onnector udio/u onn. FN Thermal ensor&protection Power esign iagram IN&harger ischarge ircuit Y Power (+_V/+V) VTT&PH Power(+_/_0V) R Power(+_V/+0_V) VRM Power(+_V) PU Power_VHOR PU Power_VI VFX Power_FXOR V Power(NV V) Others power plane OVP protection INV ONNTOR LV HMI RT udio (O) udio (MUT) udio (Power) udio (peaker MP) udio (peaker onnector) Mini-PI ard (Mach) V (PI-) /9 V (TRP) /9 V (R) /9 V (R) /9 V (RT/eP) /9 V (LV/HMI) /9 V (PIO) /9 V (XTL) /9 V (POWR/N) 9/9 VRM (R) / VRM (R) / VRM (R) / VRM (R) / VRM (YP) / VRM (YP) / P P/N: (IRI) (Hannstar) Rev. VLU Head F_ R_ NV_ NP_ NM_ NVH_ NV_ N_ F+PM NP VRM-H tuff ummy ummy M90 OM ontrol Table tuff tuff tuff tuff ummy F+PM F+PM NP NM VRM- MVRM-H tuff ummy tuff ummy tuff ummy tuff F+PM NM MVRM- tuff tuff ummy tuff ummy ummy ummy LI witch/et OMO Identify I HOL & MI LL U & UIO onn. 9 U Port 90 HP Jack (/PIF) 9 xt MI Jack 9 Function W & L P. Leader FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision Index Page ize ocument Number Rev ustom R+KU NP VRM-H ummy R+KU R+KU NP NM VRM- MVRM-H ummy ummy ummy tuff tuff tuff tuff heck by M90 (MX-) ummy R+KU NM MVRM- ummy tuff tuff tuff tuff tuff ummy tuff ummy ummy tuff tuff ummy tuff ummy tuff ummy tuff ummy ummy tuff ummy tuff ummy tuff ummy tuff ummy tuff ummy ummy ummy ummy esign by Wednesday, ugust, 009 ate: heet of 9

2 M90 (IRX-00) alpella Platform+ nvii NP/M iscrete raphic HMI Page LV WX Page RT Page ep Page TM LV RT ep dpu nvii NP- NM- 9mm X 9mm Page 0~ PI X rrandale & larksfield (M) Processor Micro-FP-9 (9-pin rp socket). mm X. mm Page ~9 MI X O-IMM 0 00/0/() MHZ 00/0/ MHZ R(III) 0 pin Page 0 O-IMM 00/0/() MHZ 00/0/ MHZ R(III) 0 pin Page Mbus : 0h(W), h(r) K0 LL LP Page 9 Mbus : h X,TL.MHZ HRR Q INPUT _IN YTM / N0009 INPUT TOUT igital Mic M(0.M) Page xt. Mic In Jack Page 9 Headphone w/ PIF Jack Page 90 U.0 ONN.X Page 9 U.0 / et ombo ONN. Page FN Page Int. peaker.0 Walt x Page Pre-MP Page 9 PWM/TH PIO Lid witch Page R VRM NP- Mxbitx NM-Mxbitx Page 9~ Realtek L w/ lass mp. PI Page T Repeater P Page Firmware M bit x Page H TT I Page U Mus T PIO xpander Page Mbus : 0h Mbus : 9h,9h PH Ibex Peak-M (PM/PM-) m mm X mm LP Winbond NPL LQFP- Mus TT ONN Page (U x ) (PI x ) (T x ) Page 0~ Page Mus ual hannel NN interface T T PI P/ PI U ystem IO M bit X Page 0 Thermal ensor WLW (V) Page Mbus : 9h T H T O Touch P Page raidwood Page Page Page mbinet Light ensor TLFN Page 9 Mbus : h(w), h(r) thernet b 0 Marvell Page 9 0/00/000 Ricoh RU ardreader i.link Page xpressard mm Page Mini-PI ard (WLN) Page Mini-PI ard (T-Jet / MH) Page 9 Mini-PI ard (TV) Page luetooth Page 9 Felica Page Transformer LNKom Page 0 L-9P- i.link Page - IR Thermal ensor 09TUF Page (H/W Thermal shutdown) M uo(h) ard Page RJ FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision lock iagram ize ocument Number Rev ustom M90 (MX-) YTM / TP+99 INPUT TOUT YTM / TP INPUT TOUT YTM / INPUT TOUT YTM / INPUT TOUT PU / MX00 INPUT TOUT YTM / MX0 INPUT TOUT Wednesday, ugust, 009 ate: heet of 9

3 MI_TXN[:0] MI_TXP[:0] MI_RXN[:0] MI_RXP[:0] MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP MI_TXP MI_TXP MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP MI_RXP MI_RXP / [VT] elete ipu, Leave N. R0 K_J 00 / [VT] elete ipu, Follow L/. R0 K_J 00 U MI_RX#[0] MI_RX#[] MI_RX#[] MI_RX#[] MI_RX[0] MI_RX[] MI_RX[] MI_RX[] MI_TX#[0] MI_TX#[] F MI_TX#[] H MI_TX#[] MI_TX[0] F MI_TX[] MI_TX[] MI_TX[] FI_TX#[0] FI_TX#[] 9 FI_TX#[] FI_TX#[] FI_TX#[] 9 FI_TX#[] F FI_TX#[] FI_TX#[] FI_TX[0] FI_TX[] 0 FI_TX[] FI_TX[] FI_TX[] 0 FI_TX[] F0 FI_TX[] 9 FI_TX[] F FI_FYN[0] FI_FYN[] FI_INT F FI_LYN[0] FI_LYN[] MI Intel(R) FI OKT_9P FOX_PZ9--0F PI XPR -- RPHI / [VT] hange to 9 socket. P_IOMPI P_IOMPO P_ROMPO P_RI P_RX#[0] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX#[9] P_RX#[0] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX#[] P_RX[0] P_RX[] P_RX[] P_RX[] P_RX[] P_RX[] P_RX[] P_RX[] P_RX[] P_RX[9] P_RX[0] P_RX[] P_RX[] P_RX[] P_RX[] P_RX[] P_TX#[0] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX#[9] P_TX#[0] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX#[] P_TX[0] P_TX[] P_TX[] P_TX[] P_TX[] P_TX[] P_TX[] P_TX[] P_TX[] P_TX[9] P_TX[0] P_TX[] P_TX[] P_TX[] P_TX[] P_TX[] K J J F F 0 J H H F F F L M M M0 L K M9 J K9 H0 H9 F9 9 L M M L0 M K M H K 0 9 F P_OMP P_RI P_RXN P_RXN P_RXN P_RXN P_RXN P_RXN0 P_RXN9 P_RXN P_RXN P_RXN P_RXN P_RXN P_RXN P_RXN P_RXN P_RXN0 P_RXP P_RXP P_RXP P_RXP P_RXP P_RXP0 P_RXP9 P_RXP P_RXP P_RXP P_RXP P_RXP P_RXP P_RXP P_RXP P_RXP0 P_TXN P_TXN P_TXN P_TXN P_TXN P_TXN0 P_TXN9 P_TXN P_TXN P_TXN P_TXN P_TXN P_TXN P_TXN P_TXN P_TXN0 P_TXP P_TXP P_TXP P_TXP P_TXP P_TXP0 P_TXP9 P_TXP P_TXP P_TXP P_TXP P_TXP P_TXP P_TXP P_TXP P_TXP0 R 9.9_F 00 R 0_F 00 P_RXN[..0] P_RXP[..0] P_TXN0 9 0.U_.V_K 00_XR P_TXN 9 0.U_.V_K 00_XR P_TXN 9 0.U_.V_K 00_XR P_TXN 9 0.U_.V_K 00_XR P_TXN 9 0.U_.V_K 00_XR P_TXN 00 0.U_.V_K 00_XR P_TXN 0 0.U_.V_K 00_XR P_TXN 0 0.U_.V_K 00_XR P_TXN 0 0.U_.V_K 00_XR P_TXN9 0.U_.V_K 00_XR P_TXN0 0.U_.V_K 00_XR P_TXN 0.U_.V_K 00_XR P_TXN 9 0.U_.V_K 00_XR P_TXN 0.U_.V_K 00_XR P_TXN 0.U_.V_K 00_XR P_TXN 0.U_.V_K 00_XR P_TXP0 0.U_.V_K 00_XR P_TXP 90 0.U_.V_K 00_XR P_TXP 9 0.U_.V_K 00_XR P_TXP 9 0.U_.V_K 00_XR P_TXP 9 0.U_.V_K 00_XR P_TXP 9 0.U_.V_K 00_XR P_TXP 0 0.U_.V_K 00_XR P_TXP 0 0.U_.V_K 00_XR P_TXP 0 0.U_.V_K 00_XR P_TXP9 0 0.U_.V_K 00_XR P_TXP0 0.U_.V_K 00_XR P_TXP 0.U_.V_K 00_XR P_TXP 0.U_.V_K 00_XR P_TXP 0.U_.V_K 00_XR P_TXP 0.U_.V_K 00_XR P_TXP 0.U_.V_K 00_XR P_RXN_0 P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXN_9 P_RXN_0 P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXN_ P_RXP_0 P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXP_9 P_RXP_0 P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXP_ P_RXN_[..0] 0 P_RXP_[..0] 0 FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision R&F (MI,P,FI) ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

4 Layout Note: In order to minimize resistance, use thick traces to route all OMP signals, use 0-mils (0.-mm) wide trace for routing less than 00 mils (. mm), or 0-mils (0.0-mm) wide trace for routing between 00 mils (. mm) and 000 mils(. mm). Keep 0-mils (0.0-mm) spacing to any other signals in order to minimize crosstalk.,,,, UF_PLT_RT# PM_THRMTRIP# H_PI PROHOT# H_PM_YN H_PUPWR PM_RM_PWR R9 0_F 00 R0 0_F 00 R 9.9_F 00 R 9.9_F 00 0MIL TP0 KTO# H_TRR# H_PI PROHOT# OMP OMP OMP OMP0 H_PURT#_R H_PM_YN PM_RM_PWR VTTPWROO 0MIL TP9 TPPWROO R9.K_F 00 UF_PLT_RT#_R T T T H K T N K P L N N K M M L U OMP OMP OMP OMP0 KTO# TRR# PI PROHOT# THRMTRIP# RT_O# PM_YN VPWROO_ VPWROO_0 M_RMPWROK VTTPWROO TPPWROO RTIN# For isable uburndale raphic / [VT] hange to rray for /. PLL_RF_LK and PLL_RF_LK# can be connected to N on rrandale directly if motherboard only supports discrete graphics. MI THRML PWR MNMNT LOK R MI JT & PM LK LK# LK_ITP LK_ITP# P_LK P_LK# PLL_RF_LK PLL_RF_LK# M_RMRT# M_ROMP[0] M_ROMP[] M_ROMP[] PM_XT_T#[0] PM_XT_T#[] PRY# PRQ# TK TM TRT# TI TO TI_M TO_M R# PM#[0] PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] PM#[] R0 T0 F L M N N P T P N P T T9 R R9 P9 N J K K J J H K H U_LK U_LK# LK_ITP LK_ITP# LK_XP_P_R LK_XP_N_R R_RMRT#_Q M_ROMP0 R 00_F 00 M_ROMP R.9_F 00 M_ROMP R 0_F 00 XP_PRY# XP_PRQ# XP_TLK XP_TM XP_TRT# XP_TI_R XP_TO_R XP_TI_M XP_TO_M XP_RT# PM#0 PM# PM# PM# PM# PM# PM# PM# RP 00_PR 0 LK_PH_PU_LK# LK_PH_PU_LK LK_PU_LK 9 LK_PU_LK# 9 TP 0MIL N_0 TP 0MIL RP 00_PR 0 LK_XP_P LK_XP_N 00_PR RP0 / [VT] elete ipu, hort to N. TP TP TP TP TP TP TP9 TP0 TP PM_XTT#0 PM_XTT# 0MIL +VRUN 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL R9 N J 00 R9 0K_J 00 R N_.K_F 00 +_V_VTT R9 0K_J 00 OVT_# 9 PM_XTT#0 0, PM_XTT# 0, +_V_VTT R_RMRT#_Q RMRT_NTRL +VRUN R.K_J Q N00W R9 00K_J 00 +_V_VTT R N_0_J 00 R _J 00 PROHOT# Q XP_TO_M Q N00PT RMRT_NTRL N00W 09 0P_0V_K 00_XR R_RMRT# +_VU R N_0_J 00 R 0_J 00 R9 K_J 00 R_RMRT# 0, RMRT_NTRL_ RMRT_NTRL_PH (efault : PH PIO ontrol ) / [VT] INTL Power Reduction olution. +_V_VTT R9 0_F 00 OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. XP_TO_R XP_TM XP_TI_R XP_PRQ# R90 _J 00 R N J 00 R9 N J 00 R0 N J 00 R99 0_J 00 R R9 9.9_F 00 N J 00 XP_TLK XP_TRT# R _J 00 R _J 00 XP_TI_M JT Mapping -can hain (efault) H_TRR# +VLW / [VT] hange R to tuff as MOR request. H_PURT#_R 0.U_.V_K R 00_XR 0K_J 00 U PM_RM_PWR_R RUN_PWR H0W R99.K_F 00 +_VU_PU R9 N_.K_F 00 PM_RM_PWR R9 0_F 00,,,, RUN_PWR +VRUN R 0K_J 00 RUN_PWR U +VRUN VTTPW_R H0W 0.U_.V_K 00_XR R K_F 00 VTT_. VR power good signal to processor. ignal voltage level is. V. R VTTPWROO / [VT] INTL Power Reduction olution. K_F 00 FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision R&F (LK,MI,JT) ize ocument Number Rev ustom M90 (MX-) Wednesday, ugust, 009 ate: heet of 9

5 U U 0 M Q[:0] 0 M 0 0 M 0 M 0 M # 0 M R# 0 M W# M Q0 0 M Q 0 M Q M Q M Q 0 M Q 0 M Q 0 M Q M Q M Q9 F0 M Q0 M Q F M Q 9 M Q M Q M Q M Q H0 M Q M Q K M Q9 J M Q0 M Q 0 M Q J M Q J0 M Q L M Q M M Q M M Q L9 M Q L M Q9 K M Q0 N M Q P9 M Q H M Q F M Q K M Q K M Q F M Q M Q J M Q9 J M Q0 J0 M Q J9 M Q L0 M Q K M Q K M Q L M Q K M Q L M Q N M Q9 M0 M Q0 R M Q L M Q M9 M Q N9 M Q T M Q P M Q M M Q N M Q M M Q9 T M Q0 T M Q L M Q R M Q P U 9 _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _[0] _[] _[] _# _R# _W# R YTM MMORY _K[0] _K#[0] _K[0] _K[] _K#[] _K[] _#[0] _#[] _OT[0] _OT[] _M[0] _M[] _M[] _M[] _M[] _M[] _M[] _M[] _Q#[0] _Q#[] _Q#[] _Q#[] _Q#[] _Q#[] _Q#[] _Q#[] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _M[0] _M[] _M[] _M[] _M[] _M[] _M[] _M[] _M[] _M[9] _M[0] _M[] _M[] _M[] _M[] _M[] P Y Y P F9 9 H M M N0 N 9 F J9 N9 H K9 P T F9 H9 M9 H K0 N R Y W V 9 V T Y9 U T U T V9 M M0 M M M M M M M M M M M M M M M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M Q0 M Q M Q M Q M Q M Q M Q M Q M 0 M M M M M M M M M 9 M 0 M M M M M M_#0 0 M_# 0 M_OT0 0 M_OT 0 M Q[:0] M_LK_R0 0 M_LK_R#0 0 M_K0 0 M_LK_R 0 M_LK_R# 0 M_K 0 M M[:0] 0 M Q#[:0] 0 M Q[:0] 0 M [:0] 0 M 0 M M M # M R# M W# M Q0 M Q M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 F M Q F M Q M Q F M Q F M Q M Q H M Q M Q J M Q9 J M Q0 M Q M Q J M Q J M Q J M Q K M Q L M Q M M Q K M Q9 K M Q0 M M Q N M Q F M Q M Q J M Q K M Q M Q M Q J M Q9 H M Q0 K M Q K M Q M M Q N M Q K M Q K M Q M M Q M M Q P M Q9 N M Q0 T M Q N M Q N M Q N M Q T M Q T M Q N M Q P M Q P M Q9 T9 M Q0 T M Q P9 M Q R0 M Q T0 W R Y _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[9] _Q[0] _Q[] _Q[] _Q[] _[0] _[] _[] _# _R# _W# R YTM MMORY - _K[0] _K#[0] _K[0] _K[] _K#[] _K[] _#[0] _#[] _OT[0] _OT[] _M[0] _M[] _M[] _M[] _M[] _M[] _M[] _M[] _Q#[0] _Q#[] _Q#[] _Q#[] _Q#[] _Q#[] _Q#[] _Q#[] _Q[0] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _Q[] _M[0] _M[] _M[] _M[] _M[] _M[] _M[] _M[] _M[] _M[9] _M[0] _M[] _M[] _M[] _M[] _M[] W W9 M V V M H K H L R T F J L H L R R H M L P R U V T V R T R R R R P R F P N M M0 M M M M M M M M M M M M M M M Q#0 M Q# M Q# M Q# M Q# M Q# M Q# M Q# M Q0 M Q M Q M Q M Q M Q M Q M Q M 0 M M M M M M M M M 9 M 0 M M M M M M_LK_R M_LK_R# M_K M_LK_R M_LK_R# M_K M_# M_# M_OT M_OT M M[:0] M Q#[:0] M Q[:0] M [:0] OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. FOXONN R&F (R) HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

6 UF (F V) VHOR (F V) (VTT) +_V_VTT 09 U_.V_M 00_XR 90 U_.V_M 00_XR VHOR U_.V_M U_.V_M N_U_.V_M U_.V_M N_U_.V_M 00_XR 00_XR 00_XR 00_XR 00_XR VHOR 9 0U_0V_M 00_XR 90 0U_0V_M 00_XR VHOR U_.V_M U_.V_M U_.V_M N_U_.V_M 00_XR 00_XR 00_XR 00_XR VHOR U_.V_M U_.V_M U_.V_M U_.V_M 00_XR 00_XR 00_XR 00_XR U_0V_M 0U_0V_M 0U_0V_M N_U_.V_M 00_XR 00_XR 00_XR 00_XR VHOR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR VHOR VHOR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR P_0V_J 00_NPO For RF Noise 9 0U_0V_M 00_XR 99 0U_0V_M 00_XR 9 0U_0V_M 00_XR P_0V_J 00_NPO 0 9 F F F F F F0 F9 F F F Y Y Y Y Y Y0 Y9 Y Y Y V V V V V V0 V9 V V V U U U U U U0 U9 U U U R R R R R R0 R9 R R R P P P P P P0 P9 P P P V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V90 V9 V9 V9 V9 V9 V9 V9 V9 V99 V00 PU OR UPPLY POWR N LIN PU VI.V RIL POWR VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_9 VTT0_0 VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_9 VTT0_0 VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_9 VTT0_0 VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_ VTT0_9 VTT0_0 VTT0_ VTT0_ VTT0_ VTT0_ PI# VI[0] VI[] VI[] VI[] VI[] VI[] VI[] PRO_PRLPVR VTT_LT IN V_N V_N VTT_N V_N_VTT H H H H0 J J H H F F F F F Y0 W0 U0 T0 J J J J N K K K L L M M M N J J VN VN V_N_VTT 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR +_V_VTT_ +_V_VTT_ PI#, +V._VTT +V._VTT +V._VTT_P 9 U_.V_M 00_XR VI0, VI, VI, VI, VI, VI, VI, PM_PRLPVR, H_VTTVI IMVP_IMON VTT_N TP 0MIL 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 99 N_0U_0V_M N_0U_0V_M 00_XR 00_XR 9 0U_0V_M 00_XR (F V) (VTT) R 0_J 00 0 U_.V_M 00_XR R 0_J 00 R9 0_J 00 VHOR R 00_F 00 R9 00_F 00 R 0_J 0 9 0U_0V_M 00_XR +_V_VTT +_V_VTT VN VN U_.V_M 00_XR 0 U_.V_M 00_XR 9 U_.V_M 00_XR +_V_VTT OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. FOXONN R&F (POWR) HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev ustom M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

7 +_V_VTT For isable uburndale raphic VX should be connected to N when disable ipu. +_V_VTT (F V) (VTT) R 0_J 0 / [VT] elete ipu, hort to N. R 0_J 00 U_.V_M 00_XR U_.V_M 00_XR For isable uburndale raphic VX_N and VX_N on rrandale can be left as no connect. For isable uburndale raphic In addition, FI_RXN_[:0] and FI_RXP_[:0] can be left floating on the PH. FI_TX[:0] and FI_TX#[:0] can be left floating on the rrandale. The FX_IMON,FI_FYN[0], FI_FYN[], FI_LYN[0], FI_LYN[], and FI_INT signals on the rrandale side should be tied to N (through -k ±% resistors). U_.V_M 00_XR U_.V_M 00_XR +V._VTT_FI 9 U_.V_M 00_XR +V._VTT_P_MI U_.V_M 00_XR T T9 T T R R9 R R P P9 P P N N9 N N M M9 M M L L9 L L K K9 K K J J9 J J H H9 H H J J H K J J J H F U VX VX VX VX VX VX VX VX VX9 VX0 VX VX VX VX VX VX VX VX VX9 VX0 VX VX VX VX VX VX VX VX VX9 VX0 VX VX VX VX VX VX VTT_ VTT_ VTT_ VTT_ VTT_9 VTT_0 VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ RPHI FI P & MI POWR N LIN RPHI VIs R -.V RIL.V.V VX_N VX_N FX_VI[0] FX_VI[] FX_VI[] FX_VI[] FX_VI[] FX_VI[] FX_VI[] FX_VR_N FX_PRLPVR FX_IMON VQ VQ VQ VQ VQ VQ VQ VQ VQ9 VQ0 VQ VQ VQ VQ VQ VQ VQ VQ VTT0_9 VTT0_0 VTT0_ VTT0_ VTT_ VTT_ VTT_ VTT_ VTT_ VTT_ VPLL VPLL VPLL R T M P N P M P N R T M J F Y W W U T T P N N L H P0 N0 L0 K0 J J0 J H H0 H9 L L M FX_IMON / [VT] elete ipu, Leave to N. +V._VTT_R R0 K_J 00 U_0V_K 00_XR 9 U_0V_K 00_XR U_0V_K 00_XR 9 U_0V_K 00_XR U_0V_K 00_XR R 0_J U_0V_M 00_XR +V._V_ 9 U_.V_M 00_XR VPLL_.V / [VT] INTL White Paper0.9 heck List Request of Q 9 U_0V_K 00_XR 9.U_0V_M 00_XR 0 U_0V_K 00_XR +_V_VTT R9 0_J 00 9.U_0V_K 00_XR ON VRUN +_VU_PU +_V_VTT +_VRUN 00m ON VRUN 0_J R 00 (F V) (VTT) +_VU ON VRUN_Q / [VT] INTL White Paper0.9 Update. R 0_J 00 U_.V_M 00_XR U_.V_M 00_XR U_.V_M 00_XR Q I0P-T- +_VU +_VU_PU +_VU_PU U_V_M_ 00 / [VT] INTL Power Reduction olution. + P N_00U_.V_M 90 0U_0V_M 00_XR 0 U_.V_M 00_XR 0 0.U_0V_K 00_XR 0 0.U_0V_K 00_XR 0 0.U_0V_K 00_XR 0 0.U_0V_K 00_XR OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision R&F (RPHI POWR) ize ocument Number Rev ustom M90 (MX-) Wednesday, ugust, 009 ate: heet of 9

8 UH T0 V T V R V R V R V R V R V R0 V R V9 R V0 R V R9 V R V R V P0 V P V P V P0 V P V9 P V0 P V N V N V N V N0 V N V M9 V M V M V9 M0 V0 M V M V M V M V M V M V L V L V L V9 L0 V0 L V L V L9 V L V L V K9 V K V K V K0 V9 K V0 J V J V J0 V J V J V J V J V J V J V9 H V0 H V H V H V H V H0 V H9 V H V H V H V9 H0 V0 H V H V H9 V H V H V 0 V F V F V F V9 V0 V V V V V V V V V V9 V90 V9 V9 V9 V9 V9 V9 V9 V9 V99 V00 V0 V0 V0 V0 V0 V0 V0 V0 V09 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V0 V V V V V V V V V9 V Y Y Y W W W W W W0 W9 W W W W V0 U U U T T T T T T0 T9 T T T T R0 P P P N N N N N N0 N9 N N N N M0 L L L9 L L L K K K0 UI K V K9 V K V K V J V J0 V J V J9 V H V9 H V0 H V H V H V H V H V H V H V H V H V9 H V0 H V V V 0 V 9 V V V F0 V F V9 F V90 F V9 F9 V9 F V9 V9 V9 9 V9 V9 V9 V99 V00 V0 V0 V0 V0 V0 0 V0 V0 9 V0 V09 V0 V V 9 V V V V 0 V 9 V V9 V0 V V V V V V V V V9 9 V0 V V 9 V V NTF V_NTF V_NTF V_NTF V_NTF V_NTF V_NTF V_NTF T T R TP_MP_V_NTF TP_MP_V_NTF TP_MP_V_NTF TP_MP_V_NTF TP 0MIL TP 0MIL TP0 0MIL TP0 0MIL OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. OKT_9P FOX_PZ9--0F / [VT] hange to 9 socket. FOXONN R&F (N) HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev ustom M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

9 U RV RV J J TP 0MIL TP0 0MIL PI xpress onfiguration elect F0 : ingle P 0 : ifurcation enable F0 R N_.0K_F 00 0 Q_VRF0 Q_VRF Place RP lose to o-imm lot Q_VRF0 Q_VRF N_0 0MIL TP0 0MIL TP0 0MIL TP0 0MIL TP0 0MIL TP0 0MIL TP09 0MIL TP 0MIL Q_VRF0_J TP Q_VRF_H 0MIL TP00 0MIL TP0 0MIL TP0 0MIL TP0 / [VT] upport M/M ommon Motherboard esign TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP0 0MIL TP9 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL F PI xpress tatic Lane Reversal F : Normal Operation 0 : Lane Numbers Reversed ->0, ->,... F R.0K_F 00 Q_VRF0 RMRT_NTRL Q_VRF R 0_J 00 R 0_J 00 Q9 I0 IMM0 IMM RMRT_NTRL Q_VRF0_J Q_VRF_H R99 00K_J 00 / [VT] INTL Power Reduction olution. Q9 I0 R9 00K_J 00 0MIL TP 0MIL TP0 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP F0 F F F TP 0MIL TP9 0MIL TP09 0MIL TP9 0MIL TP 0MIL TP0 0MIL TP09 0MIL TP 0MIL TP0 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL R 0_J 00 0 R 0_J 00 RV 0 RV RV_TP_ TP 0MIL 0MIL TP U9 RV9 RV_TP_ TP 0MIL 0MIL TP T9 RV0 RV_TP_ R TP 0MIL RV_TP_9 TP 0MIL 0MIL TP90 9 RV RV_TP_0 TP 0MIL 0MIL TP9 9 RV RV_TP_ TP 0MIL RV_TP_ TP 0MIL RV_TP_ R9 TP 0MIL RV_TP_ TP9 0MIL 0MIL TP9 RV_NTF_ RV_TP_ TP0 0MIL 0MIL TP9 RV_NTF_ TP 0MIL TP9 0MIL RP 0 00_PR F isplay Port Presence F : isabled ; No Physical isplay Port attached to mbedded isplay Port 0 : nable ; n external isplay Port device is connected to the mbedded isplay Port F R N_.0K_F 00 0MIL TP9 0MIL TP9 0MIL TP9 0MIL TP9 0MIL TP9 0MIL TP9 RP 00_PR P L L L J 9 M L J H 0 RV RV RV RV RV RV RV RV RV9 RV0 RV RV RV RV RV RV RV RV_NTF_ RV RV9 RV_NTF_0 RV_NTF_ RV_NTF_ RV_NTF_ H K L R J J P T T R M0 F[0] M F[] P F[] L F[] L0 F[] M F[] N9 F[] M F[] K F[] K F[9] K F[0] J F[] N0 F[] N F[] J F[] J9 F[] J0 F[] K0 F[] H RV_TP_ 9 RV 9 RV RRV RV L RV L9 RV P0 RV P RV9 L RV0 T RV T RV P RV R RV_NTF_ T RV_NTF_ T RV_NTF_ P RV_NTF_ R RV R RV_TP_9 RV_TP_0 F RV RV RV J RV H J9 J RV RV RV_NTF_ RV_NTF_9 RV_NTF_0 RV_NTF_ RV_TP_ RV_TP_ RV_TP_ RV_TP_9 RV_TP_0 RV_TP_ RV_TP_ RV_TP_ RV_TP_ RV_TP_ V V V N W W N 9 P TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP9 0MIL TP0 0MIL TP 0MIL TP 0MIL OKT_9P FOX_PZ9--0F R 0_J PI xpress Interface May Not Meet PI xpress.0 Jitter pecifications Intel has determined that the workaround (.0K pull down to Vss on signal F[]) is not robust. Intel recommends not implementing this workaround at this time (F[] should not be pulled down). Intel recommends not to test for PI- xpress.0 Jitter specification compliance for the affected steppings. F R9 N_.0K_F 00 / [VT] hange to 9 socket. FOXONN / [VT] tuff R HON HI Precision Ind. o., Ltd. P - R& ivision R&F (RRV) M90 (MX-) ize ocument Number Rev ate: Wednesday, ugust, 009 heet 9 of 9

10 MFIX MFIX MFIX MFIX RTRT# The traces inside this block should be wider. VccRT ~m 00 P_0V_K_N RT_KX +VRUN tpc0b_0 TP +V H00H-0PT R0 0_F 00 R M_J 00 VRT U_.V_M 00_XR R9 0K_F 00 9 U_.V_K 00_XR Y.KHZ_.P_0PPM QM00000 P_0V_K_N 00 0 JP OPN_JUMP_OPN RT_KX_R R 0_J 00 VRT mils RTRT# M_INTRUR# R9 0M_J 00 RT_KX RTRT# R9 0K_F 00 INTVRMN U9 RTX RTX RTRT# RTRT# INTRUR# INTVRMN RT LP FWH0 / L0 FWH / L FWH / L FWH / L FWH / LFRM# LRQ0# LRQ# / PIO F RIRQ 9 LP_0 LP_ LP_ LP_ LP_FRM# LP_RQ#0 TP0 0MIL INT_RIRQ LP_0, LP_, LP_, LP_, LP_FRM#, LP_RQ#0 INT_RIRQ, INT_RIRQ T0P R90 0K_J 00 TP R 0K_J 00 R9 0K_J 00 [H_OK_N#/PIO] Low (0) Flash escriptor ecurity will be overridden. lso, when this signals is sampled on the rising edge of PWROK then it will also disable Intel M and its features. High () ecurity measure defined in the Flash escriptor will be enabled +V +VRUN R N RT FOX_H0-LH HR_P H_OK_RT# +VLW RT R9 0K_J 00 R9 0_F 00 IH_ITLK IH_RT# tuff for No-reboot Low=efault High=No-reboot RP9 00_PR H_PKR R 0K_J 00 +VRUN R9 N_0K_J 00 H_O_ITLK H_O_RT#, U_.V_M 00_XR H_PKR H_O_TIN0 0MIL TP 0MIL TP 0MIL TP 0MIL TP0 0MIL TP9 IH_ITLK IH_YN H_PKR IH_RT# 0MIL TP 0MIL TP TP_H_IN IH_TO H_OK_N# H_OK_RT# JT_TK JT_TM JT_TI 0 9 P 0 0 F0 F 9 H J0 M K K H_LK H_YN PKR H_RT# H_IN0 H_IN H_IN H_IN H_O IH H_OK_N# / PIO H_OK_RT# / PIO JT_TK JT_TM JT_TI T T0RXN T0RXP T0TXN T0TXP TRXN TRXP TTXN TTXP TRXN TRXP TTXN TTXP TRXN TRXP TTXN TTXP TRXN TRXP TTXN TTXP TRXN TRXP TTXN TTXP K K K K9 H H H9 H F F9 F F H H F F 9 T_RXN0 T_RXP0 T_TXN0 T_TXP0 T_RXN T_RXP T_TXN T_TXP T_RXN T_RXP T_TXN T_TXP T_RXN0 T_RXP0 T_TXN0 T_TXP0 T_RXN T_RXP T_TXN T_TXP T_RXN T_RXP T_TXN T_TXP +V._V_T R 00_J 00 FW_HW R N_.K_J 00 K_J R 00 0_J 00 Q MN00 For MP, ummy N,, U,R, tuff R XTRNL PI0 ROM INTRF(FOR U9) H_OK_N# R N_K_J 00 When int. PLL VR is enabled, H_YN is VVRM.V/.V strap (default: L for.v) / [VT] Reduce the OM Q'ty for /. H_O_YN H_O_TOUT RP9 00_PR IH_YN IH_TO / [VT] Reduce the OM Q'ty for /. +VRUN R99 N_K_J 00 PI0_LK 0MIL TP 0MIL TP 0MIL TP9 R 0_J 00 JT_TO JT_RT# PI_LK_L PI_ROM_0# PI_MOI_L PI_MIO_L PI_LK_W J J V Y Y V JT_TO JT_RT# PI_LK PI_0# PI_# PI_MOI PI_MIO Ibexpeak-M PI JT TIOMPO TIOMPI TL# T0P / PIO TP / PIO9 F F T Y9 V V_T T0P TP R._F 00 T_L# M_FLH0_N +V PI0_LK PI0_MOI PI0_MIO_R PI_ROM_0# M_FLH0_N R_INRT0 9 0 N FOX_RF0-0-H FP ONN_P +V V0 R K_J 00 HOL0# V0.U_0V_K U_0V_K 00_XR 00_XR U9 PI ROM-0 V0 R9.K_J 00 R N_K_J 00 +VRUN PI0_# PI0_MIO_R WP#0 PI0_MOI PI0_MIO_R R 0_J 00 N_H00H-0PT V0 U9 # V O/IO HOL# WP#/ LK N I/IO0 V0 HOL0# PI0_LK PI0_MOI PI ROM (IO)(M-it) FLH_OP-_MHZ MXL0MI- R 0_J 00 R _F 00 PI_MOI_W PI_MIO_W PI_O PI_LK_L PI_LK_W PI_O PI_MOI_L PI_MOI_W FT witch For PI us Isolation +VLW PI_O U O# V PI_O O# PI0_#_R PI_ROM_0#_R N 0.U_V_Y NQ0PW 00_YV +VLW U PI0_#_R PI_ROM_0#_R O# V PI_O O# PI_MIO_W PI_MIO_L N 0.U_V_Y NQ0PW 00_YV R 00_J 00 R N_0_J 00 R N_0_J 00 PI0_# PI_ROM_0# For W ebug PI_#_JP V0 R.K_J 00 R 0K_J 00 R_INRT0 PI_ROM_0# PI_#_JP PI_MIO_W PI_LK_W PI_MOI_W V0 U V N Y PI0_# MHTT R N_0_J 00 TP9 tpc0b_0 TP tpc0b_0 TP tpc0b_0 TP tpc0b_0 TP tpc0b_0 TP tpc0b_0 0.U_V_Y 00_YV X PI0_# trap for PH PI Program (W) - (ON) Normal Operation Programing PI0 (U9) / [VT] hange U9 to MXL0MI-. FOXONN PH (H,JT,T) HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev ustom M90 (MX-) Wednesday, ugust, 009 ate: heet of 0 9

11 +VLW PI- Port Table Port Function Port WLN Port Ricoh RU Port b LN Port I-T Tuner (JP) Port Port Port Port Mach/Tsubaki xpressard/ (PI) N N WLN_RXN WLN_RXP WLN_TXN WLN_TXP R_RXN R_RXP R_TXN R_TXP LN_RXN LN_RXP LN_TXN LN_TXP TV_RXN TV_RXP TV_TXN TV_TXP MINI_RXN MINI_RXP MINI_TXN MINI_TXP XPR_RXN XPR_RXP XPR_TXN XPR_TXP U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0.U_.V_K00_XR 0MIL TP9 0MIL TP 0MIL TP 0MIL TP0 WLN_TXN_ WLN_TXP_ R_TXN_ R_TXP_ LN_TXN_ LN_TXP_ TV_TXN_ TV_TXP_ MINI_TXN_ MINI_TXP_ 0 J0 F9 H9 W U0 T0 U V F H J W XPR_TXN_ XPR_TXP_ T U U V U9 PRN PRP PTN PTP PRN PRP PTN PTP PRN PRP PTN PTP PRN PRP PTN PTP PRN PRP PTN PTP PRN PRP PTN PTP PRN PRP PTN PTP PI-* Mus ontroller Link MLRT# / PIO MLK MT ML0LRT# / PIO0 ML0LK ML0T MLLRT# / PIO MLLK / PIO MLT / PIO L_LK L_T L_RT# P LKRQ# / PIO LKOUT_P N LKOUT_P P 9 H J M 0 T T T9 H WK_I# M_LK_R M_T_R PIO0 ML0_LK ML0_T LP_PI_INTR# M_THRM_LK M_THRM_T P_LKRQ# LK_P# LK_P WK_I# PH PROM/K/IMM/xpressard M_THRM_LK,0,,, M_THRM_T,0,,, RP9 NV_0 00_PR P_LKRQ# 0 PI_RFLK# 0 PI_RFLK 0 /THM/L/dPU (Mus ddress: 9h,9h) PIO0 WK_I# LP_PI_INTR# / [VT] - hange to LW Power Rail as and L. ML0_LK ML0_T P_LKRQ# R9 0K_J 00 R9 0K_J 00 R90 0K_J 00 R90.K_J 00 R90.K_J 00 NV_0K_J R VLW +VU +VLW +VRUN +VRUN +VU R 0K_J 00 R N_0K_J 00 WLN_LKRQ# R9 0K_J 00 R_LK_RQ# R_LK_RQ# R 0K_J 00 LK_RQ_LN# R 0K_J 00 MINI_TV_LKRQ# WLN_LKRQ# N_0K_J R 00 R_LK_RQ# LK_RQ_LN# 9 MINI_TV_LKRQ# LK_PI_WLN# LK_PI_WLN LK_PI_R# LK_PI_R 9 LK_PI_LN# 9 LK_PI_LN LK_PI_MINI_TV# LK_PI_MINI_TV 9 9 LK_PI_MINI_Mach# LK_PI_MINI_Mach 0MIL TP 0MIL TP 0MIL TP 0MIL TP RP9 0 00_PR R_PI_WLN# R_PI_WLN WLN_LKRQ# RP 0 00_PR R_PI_R# R_PI_R R_LK_RQ# RP 0 00_PR R_PI_LN# R_PI_LN LK_RQ_LN# RP0 0 00_PR R_PI_MINI_TV# R_PI_MINI_TV MINI_TV_LKRQ# RP 0 00_PR R_LK_PI_MINI_Mach# R_LK_PI_MINI_Mach J J K K P9 M M U M M N H H M M PRN PRP PTN PTP LKOUT_PI0N LKOUT_PI0P PILKRQ0# / PIO LKOUT_PIN LKOUT_PIP PILKRQ# / PIO LKOUT_PIN LKOUT_PIP PILKRQ# / PIO0 LKOUT_PIN LKOUT_PIP PILKRQ# / PIO LKOUT_PIN LKOUT_PIP From LK UFFR P LKOUT_MI_N LKOUT_MI_P LKOUT_P_N / LKOUT_LK_N LKOUT_P_P / LKOUT_LK_P LKIN_MI_N LKIN_MI_P LKIN_LK_N LKIN_LK_P LKIN_OT_9N LKIN_OT_9P LKIN_T_N / K_N LKIN_T_P / K_P RFLKIN LKIN_PILOOPK XTL_IN XTL_OUT N N T T W P P F H H P J H H LK_P_N LK_P_P XTL_IN XTL_OUT LK_XP_N LK_XP_P TP9 TP90 0MIL 0MIL LK_MI_PH# 9 LK_MI_PH 9 LK_MH_LK# 9 LK_MH_LK 9 RFLK# 9 RFLK 9 LK_PI_T# 9 LK_PI_T 9 RF_M_PH 9 LK_PI_F +_VRUN_V R9.K_J 00 M_LK_R M_T_R +VRUN / [VT] elete ummy Parts and hange Net name. R9.K_J 00 M_LK_R 9,0,, M_T_R 9,0,, +VU R0 0K_J 00 MINI_Mach_LKRQ# MINI_Mach_LKRQ# 9 LK_PI_XPR# LK_PI_XPR MINI_Mach_LKRQ# RP 0 00_PR R_PI_XPR# R_PI_XPR M9 J0 J PILKRQ# / PIO LKOUT_PIN LKOUT_PIP XLK_ROMP LKOUTFLX0 / PIO F T XLK_ROMP LKOUTLX0 R 90.9_F 00 TP 0MIL +_0VRUN +VLW R N_0K_J 00 R 0K_J 00 XPR_LKRQ# XPR_LKRQ# +VLW 0MIL TP 0MIL TP R 0K_J 00 XPR_LKRQ# P LKRQ# H K K P PILKRQ# / PIO LKOUT_P N LKOUT_P P P LKRQ# / PIO Ibexpeak-M lock Flex LKOUTFLX / PIO LKOUTFLX / PIO LKOUTFLX / PIO +VRUN P T N0 LKOUTLX LKOUTLX LKOUTLX TP9 TP9 TP0 0MIL 0MIL 0MIL R 0_J 00 XTL_IN XTL_OUT R N_M_J 00 N_MHZ_0P_0PPM ITTI_L Y R N_0_J 00 U V WP M_LK_R M_T_R L 0 V PROM_OP-_x HTL0 Mus ddress: H 0.U_V_Y 00_YV alpella Platform esign uide - ddendum / Update Rev.. (oc #0).). XTL_IN should be pulled to N via a 0ohm by default. This pull-down resistor on XTL_IN should only be un-stuffed when MHz crystal is used. FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision PH (PI-,MU,LK) ize ocument Number Rev ustom 9 N_P_0V_J N_P_0V_J 00_NPO 00_NPO M90 (MX-) Wednesday, ugust, 009 ate: heet of 9

12 U9 For isable uburndale raphic In addition, FI_RXN_[:0] and FI_RXP_[:0] can be left floating on the PH. FI_TX[:0] and FI_TX#[:0] can be left floating on the rrandale. The FX_IMON,FI_FYN[0], FI_FYN[], FI_LYN[0], FI_LYN[], and FI_INT signals on the rrandale side should be tied to N (through -k ±% resistors). +V._V_XP MI_RXN0 MI_RXN0 MI_RXN MI_RXN MI_RXN MI_RXN MI_RXN MI_RXN MI_RXP0 MI_RXP0 MI_RXP MI_RXP MI_RXP MI_RXP MI_RXP MI_RXP MI_TXN0 MI_TXN0 MI_TXN MI_TXN MI_TXN MI_TXN MI_TXN MI_TXN MI_TXP0 MI_TXP0 MI_TXP MI_TXP MI_TXP MI_TXP MI_TXP MI_TXP R 9.9_F 00 MI_OMP J W0 J0 0 0 F 0 H 0 H F MI0RXN MIRXN MIRXN MIRXN MI0RXP MIRXP MIRXP MIRXP MI0TXN MITXN MITXN MITXN MI0TXP MITXP MITXP MITXP MI_ZOMP MI_IROMP MI FI FI_RXN0 FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXN FI_RXP0 FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_RXP FI_INT FI_FYN0 FI_FYN FI_LYN0 H J F W J F H J / [VT] elete ipu, Leave N. / [VT] dd the Q as MOR request. PI_WK#_F FI_LYN, U_PWR Q TU,,,, RUN_PWR +VRUN R9 N_0K_J 00 _RT#, IMVP_PWR R9 0_J 00 PM_RM_PWR PM_RMRT# U_PWR_K PWRTN# _Present MPWROK_R R9 N_0_J 00 LN_RT# PM_RMRT#_R U_PWR_K PM_RI# _RT# PWROK MPWROK_R PM_RMRT#_R PI_WK#_F PM_LKRUN# PM_U_TT# PM TT# PM_LP_# PM_LP_# PM_LP_# PM_LP_LN# PM_LKRUN# PI_WK#_F PWRTN# P PM_LP_M# PM_RI# LP_M# K R90 PWRTN# PM_LP_M# 0K_J 00 PM_LP_LN# R9 N_0K_J 00 PM_TLOW# R9.K_J 00 _Present 0_J _Present_R P PM_LP_W# U_PWR_K PRNT / PIO TP N R90.K_J 00 TP 0MIL R90 00 _Present R9 N_0K_J 00 PM_TLOW# H_PM_YN TLOW# / PIO PMYNH J0 H_PM_YN / [VT] Reserve R90 for Leakage heck PT R9 N_0_J 00 LW_PWR,0 T M K R90 N_0_J 00 LN_RT# 0 R9 0K_J 00 R9.K_J 00 R9.K_J 00 9 M F Y_RT# Y_PWROK PWROK MPWROK LN_RT# RMPWROK RMRT# U_PWR_K / PIO0 RI# Ibexpeak-M ystem Power Management WK# LKRUN# / PIO U_TT# / PIO ULK / PIO LP_# / PIO LP_# LP_# LP_LN# J Y P F H P F PM_LP_M# PM_LKRUN#, PM_U_TT# TP0 0MIL PM_LP_# PM_LP_# PM_LP_# TP 0MIL TP 0MIL,,9 PI_WK# / [VT] hange R9 to 0Kohm as MOR request. _RT# _RT# R9.K_J 00 R9.K_J 00 R9 0K_J 00 R9 N_.K_J 00 PM_RMRT# R9 0K_J 00 PWROK R 0K_J 00 +VRUN +VLW / [VT] ummy the R9 for M function support and avoid the leakge concern. (Optional if Intel M FW is IntelR M Ignition Firmware) PWROK 9 PT FOXONN PH (MI,FI,PIO) HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

13 U9 T T L_KLTN L_V_N VO_TVLKINN VO_TVLKINP J Y Y V L_KLTTL L LK L T L_TRL_LK L_TRL_T VO_TLLN VO_TLLP VO_INTN VO_INTP J F H P9 P LV_I LV_V VO_TRLLK VO_TRLT T T / [VT] elete ipu, Leave N. T T V V Y V 0 Y9 V P P Y T9 U T Y T U0 T V V LV_VRFH LV_VRFL LV_LK# LV_LK LV LV_T#0 LV_T# LV_T# LV_T# LV_T0 LV_T LV_T LV_T LV_LK# LV_LK LV_T#0 LV_T# LV_T# LV_T# LV_T0 LV_T LV_T LV_T RT_LU RT_RN RT_R RT LK RT T igital isplay Interface P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP P_0N P_0P P_N P_P P_N P_P P_N P_P P_TRLLK P_TRLT P_UXN P_UXP P_HP J U J 0 0 W Y9 9 V0 0 0 F H U0 U T / [VT] elete ipu, Leave N. R K_ 00 alpella Platform esign uide - ddendum / Update Rev.. (oc #0).). RT_IRF Y Y RT_HYN RT_VYN _IRF RT_IRTN RT P_0N P_0P P_N P_P P_N P_P P_N P_P J0 0 J F H Ibexpeak-M FOXONN PH (LV,I) HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev ustom M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

14 +VRUN +VRUN +VRUN +VRUN RP.K 00_PR RP.K 00_PR R00 0K_J 00 W PI0_# PI0_# PI_#_JP PI_TOP# PI_IRY# INT_PIRQ# PI_RQ# PI_RQ#0 INT_PIRQ# INT_PIRQF# PI_RQ# PI_PRR# PI_VL# PI_RR# PI_LOK# trap_io PI_#_JP PI0_# 0 PI_#_JP 0 +VRUN +VRUN,,,9,,9,0 INT_PIRQ# INT_PIRQ# INT_PIRQ# INT_PIRQ# trap for oot-io (W) NT# (Q) NT0# (Q9) LP - (ON) LOW LOW PI X Hi Hi RP.K 00_PR H0-_W-M trap for PH PI Program (W) X - (ON) RP.K 00_PR Normal Operation Programing PI0 (U9) RP PI_RQ# PI_FRM# PI_TRY# INT_PIRQH#.K 00_PR Q9 MN00 R 00K_J 00 R K_J 00 PLT_RT# PI_NT# R9 K_J 00 Q MN00 R N_.K_J 00 PLK_JI 0MIL TP LK_KPI 0MIL TP9 LK_PI_F PLT_RT# INT_PIRQ# INT_PIRQ# INT_PIRQ# INT_PIRQ# PI_RQ#0 PI_RQ# PI_RQ# PI_RQ# PI_NT#0 PI_NT# 0MIL PI_NT# TP PI_NT# 0MIL TP0 0MIL TP R 0MIL TP 0MIL TP 0MIL TP 0MIL TP9 0MIL TP 0MIL TP99 0MIL TP0 0MIL TP00 0MIL TP0 0MIL TP9 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP9 0MIL TP 0MIL TP0 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP0 0MIL TP9 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP 0MIL TP _J00 INT_PIRQ# INT_PIRQF# INT_PIRQ# INT_PIRQH# +VLW PI_RT# PI_RR# PI_PRR# PI_LOK# PI_TOP# PI_TRY# PM#_IH PLT_RT# UF_PLT_RT# R 00K_J 00 U9 H0 0 N J 0 H M M F M0 M J K F0 9 0 K M J K L F J0 F 9 M 0 H J0 /0# /# H /# /# PIRQ# H PIRQ# PIRQ# PIRQ# F RQ0# RQ# / PIO0 RQ# / PIO M RQ# / PIO PIRT# Ibexpeak-M PI NVRM U UF_PLT_RT#,,, uffer to reduce loading on PLT_RT#. K PI_IRY# 0MIL PI_PR TP H PI_VL# F PI_FRM# 0MIL TP R _J00 R _J00 U0 H0W F NT0# K NT# / PIO F NT# / PIO H NT# / PIO PIRQ# / PIO K PIRQF# / PIO PIRQ# / PIO PIRQH# / PIO RR# 0 PRR# 9 M IRY# PR VL# FRM# PLOK# TOP# TRY# PM# PLTRT# LK_PI_JI N LKOUT_PI0 P LK_PI_K LKOUT_PI P LKOUT_PI P LK_PI_F_R LKOUT_PI P LKOUT_PI 9 0.U_.V_K 00_XR NV_#0 Y9 NV_# NV_# P NV_# NV_Q0 V9 NV_Q NV_Q0 / NV_IO0 P NV_Q / NV_IO P NV_Q / NV_IO T NV_Q / NV_IO T9 NV_Q / NV_IO NV_Q / NV_IO V NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO NV_Q9 / NV_IO9 NV_Q0 / NV_IO0 NV_Q / NV_IO NV_Q / NV_IO NV_Q / NV_IO J NV_Q / NV_IO J NV_Q / NV_IO NV_L NV_L Y NV_ROMP NV_R# U V NV_WR#0_R# Y NV_WR#_R# Y NV_W#_K0 V NV_W#_K F UP0N H UP0P J UPN UPP UPN N0 UPP P0 UPN J0 UPP L0 UPN F0 UPP 0 UPN 0 UPP 0 UPN M UPP N UPN UPP UPN H UPP J UP9N UP9P F UP0N UP0P UPN UPP H UPN L UPP M UPN UPP +VLW / [VT] Remove the raidwood function. U_PN0 U_PP0 U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN U_PP U_PN9 U_PP9 U_PN0 U_PP0 U_PN U_PP U_PN U_PP U_PN U_PP URI URI# URI O0# / PIO9 N O# / PIO0 J O# / PIO F O# / PIO L O# / PIO O# / PIO9 O# / PIO0 F O# / PIO T R0 0_F 00 U_O#0 U_O# U_O# U_O# U_O# U_O# U_O# U_O# RP U_O# U_O# U_O# U_O# 9 0 U_PN0 U_PP0 U_PN U_PP TP0 0MIL TP 0MIL U_PN U_PP U_PN U_PP TP 0MIL TP 0MIL TP99 0MIL TP0 0MIL TP 0MIL TP9 0MIL TP0 0MIL TP9 0MIL U_PN9 U_PP9 U_PN0 U_PP0 U_PN U_PP U_PN U_PP U_PN 9 U_PP 9 U_O#0 U_O# U_O# / [VT] hange value from.ohm to 0ohm. 0K 0_0PR U_O# U_O# U_O# U_O#0 +VLW MI Termination Voltage et to Vss when LOW NV_Let to Vcc when HIH Intel nti-theft Technology isabled when Low, N R nabled when High,tuff R U PORT PORT-0 PORT- PORT- PORT- PORT- PORT- PORT- PORT- PORT- PORT-9 PORT-0 PORT- PORT- PORT- FOXONN Function On oard Port xternal Port xpressard/ (U) xternal Port amera IR Receiver (JP) Felica Wireless LN (WiMX) luetooth HON HI Precision Ind. o., Ltd. P - R& ivision PH (PI,U,NVRM) ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

15 +VLW R9 K_J 00 R9 0K_J 00 PIO PIO R9 0K_J 00 PIO RP90 0K 00_PR PH_PIO PIO / [VT] Reduce the OM Q'ty for /. U9F +VRUN R9 0K_J 00 R9 N_0K_J 00 PIO RMRT_NTRL_PH PIO MUY# XTMI# TP_PI# H_RIN# PIO9 R N_0K_J 00 TLKRQ# R 0K_J 00 H_0T RUNTIM_I# / [VT] Follow INTL heck List 0.9. (PI) R9 0K_J 00 R9 0K_J 00 R9 0K_J 00 R 0K_J 00 RP9 0K 00_PR / [VT] Reduce the OM Q'ty for /. XTMI# I_LP_PI# 0 M_FLH0_N 0 INV_N PT LI0 LI LI MUY# XTMI# I_LP_PI# RUNTIM_I#_ PIO PIO PIO IPLY_L INV_N PIO M_FLH0_N PIO PIO TP_PI# TLKRQ# LI0 LI LI PIO9 PIO Y J F0 K9 T F Y H0 V M V V P H MUY# / PIO0 TH / PIO TH / PIO TH / PIO PIO MM_L / PIO PIO PIO PIO MI LN_PHY_PWR_TRL / PIO PIO TP / PIO TH0 / PIO LOK / PIO TP_PI# / PIO TLKRQ# / PIO TP / PIO TP / PIO LO / PIO TOUT0 / PIO9 PILKRQ# / PIO PU LKOUT_PIN LKOUT_PIP LKOUT_PIN LKOUT_PIP 0T LKOUT_LK0_N / LKOUT_PIN LKOUT_LK0_P / LKOUT_PIP PI RIN# PROPWR THRMTRIP# TP TP TP TP TP H H F F U M M 0 T 0 0 W Y Y TP TP TP TP H_0T LK_PH_PU_LK# LK_PH_PU_LK H_PI H_RIN# H_PUPWR TP9 TP9 TP9 TP9 TP0 0MIL 0MIL 0MIL 0MIL H_0T LK_PH_PU_LK# LK_PH_PU_LK H_PI H_RIN# H_PUPWR R9 _J 00 0MIL 0MIL 0MIL 0MIL 0MIL +_V_VTT R9 _J 00 PM_THRMTRIP#, RMRT_NTRL_PH / [VT] INTL Power Reduction olution. RIT_TMP_RP# PIO RIT_TMP_RP# PH_PIO F F PILKRQ# / PIO TOUT / PIO TP / PIO9 PIO TP TP TP TP9 V V F M TP99 TP0 TP00 TP0 0MIL 0MIL 0MIL 0MIL R9 0K_J 00 INV_N R9 0K_J 00 M_FLH0_N R9 N_0K_J 00 R9 N_0K_J 00 PIO PIO R 0K_J 00 TLKRQ# R9 0K_J 00 RMRT_NTRL_PH / [VT] Follow INTL heck List 0.9. (PO) +VRUN RP9 I_LP_PI# IPLY_L PIO RUNTIM_I#_ 9 0 +VRUN LI LI RIT_TMP_RP# LI0 V_NTF_ 9 V_NTF_ V_NTF_ 0 V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_ V_NTF_9 V_NTF_0 V_NTF_ V_NTF_ F V_NTF_ F V_NTF_ H V_NTF_ H V_NTF_ H V_NTF_ H V_NTF_ J V_NTF_9 J V_NTF_0 J V_NTF_ J9 V_NTF_ J V_NTF_ J0 V_NTF_ J V_NTF_ J V_NTF_ V_NTF_ V_NTF_ V_NTF_9 V_NTF_0 V_NTF_ Ibexpeak-M NTF RV TP0 TP TP TP TP TP TP TP TP TP9 N_ N_ N_ N_ N_ INIT_V# TP N J K K M N M0 N0 H T9 P 0 TP0 TP0 TP0 TP0 TP0 TP09 TP0 TP TP TP TP TP TP TP TP TP0 TP9 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0MIL 0K 0_0PR FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision PH (PIO,V_NTF,RV) ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

16 efault is use Internal VRM For isable uburndale raphic PIO floating as Internal VRM and there is no need external supply +_0VRUN +._V_LK +_0VRUN (VIO). R 0_J 00 +_0VRUN R9 P_0V_J 00_NPO N F 00 0m For RF Noise R 0_J 00 +._V_LK_ +_V_VTT +_0VRUN U_.V_M_ 00 P_0V_J 00_NPO m L +VRTXT For RF Noise N_0UH_00 L0-00K 0.U_0V_K 00_XR R0 N_0_J 00 R0 0_J 00 U_.V_M_ 00 +_VRUN_V m m m 9 N_0U_.V_Y 00_YV U_.V_Y 00_YV +VRUN.U_.V_K 00_XR R 0_J 00 VRT VM 0.U_0V_K 00_XR 9m m 9m +VLW 0.U_0V_K 00_XR V_PU_IO 9 N_U_.V_Y 00_YV VLN TP_PH_VW 0.U_0V_K 00_XR 9 0.U_0V_K 00_XR 0.U_0V_K 00_XR N_U_.V_Y 00_YV U_.V_Y 00_YV U_.V_Y 00_YV U_.V_Y 00_YV +_V_V_V_RUN +_VRUN_PLL +_VRUN_PLL 0.U_0V_K 00_XR U_.V_Y 00_YV 0.U_0V_K 00_XR 9 0.U_0V_K 00_XR 0.U_0V_K 00_XR P P F F Y0 9 F F F V9 V V Y9 Y Y V9 U H J H F H F V Y P U9 U0 U V V Y T U U9J VLK[] VLK[] VLN[] VLN[] PUYP VM[] VM[] VM[] VM[] VM[] VM[] VM[] VM[] VM[9] VM[0] VM[] VM[] PRT VVRM[] VPLL[] VPLL[] VPLL[] VPLL[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] PT PU VU_[9] VU_[0] VU_[] VU_[] V_[] V_[] V_[] V_PU_IO[] V_PU_IO[] VRT Ibexpeak-M POWR lock and Miscellaneous RT PU PI/PIO/LP T PI/PIO/LP U H VIO[] VIO[] VIO[] VIO[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[9] VU_[0] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[9] VU_[0] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VU_[] VIO[] VRF_U VRF V_[] V_[9] V_[0] V_[] V_[] V_[] V_[] VTPLL[] VTPLL[] VIO[9] VVRM[] VIO[0] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[9] VIO[0] VM[] VM[] VM[] VM[] VUH V V Y Y V U U U P P N N M M L L J J H H F F U V F K9 J L M N P U K K H T0 H9 0 F 9 F0 F9 H0 9 0 Y Y L0 +_0VRUN +VLW +VLW +_0VRUN +VRUN U_.V_Y 00_YV +V._VPLL +_V_V_V_RUN (VIO) m 0.U_0V_K 00_XR m 0.U_0V_K 00_XR (VIO) m 0.U_0V_K 00_XR 9 N_0U_.V_Y 00_YV R9 0_J 00 R9 0_J 00 R9 0_J 00 R9 0_J 00 +VRUN +_0VRUN +VLW m 0.U_0V_K 00_XR U_.V_Y 00_YV +VUH. R 0_J 00 0.U_0V_K 00_XR +_0VRUN H00H-0PT R 0_J 00 U_.V_Y 00_YV +VLW +VLW m m +VRUN +_VRUN_PLL +_VRUN_PLL / [VT] elete ipu, elete ummy Parts. L 0UH_00 L0-00K L9 +_VRUN_VPLL_R N_0UH_00 L0-00K N_U_.V_Y +_0VRUN 00_YV +V._V_T +_0VRUN +VRUN FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision ize PH (POWR) / ocument Number Rev ustom m m efault is use Internal VRM For isable uburndale raphic PIO floating as Internal VRM and there is no need external supply R 0_J 00 L 0UH_00 L0-00K 9 U_.V_Y 00_YV R99 N_0_J 00 H00H-0PT (VIO) U_.V_Y_Y 00 9 U_.V_Y_Y 00 R 0_J 00 R N_0_J 00 R N_NV_0_J 00 R N_NV_0_J 00 VUH can be either.v or.v Resume well power, regardless ihmi is implemented or not. However, external codec/m must have the same voltage level as PH VUH power. M90 (MX-) Wednesday, ugust, 009 ate: heet of 9

17 / [VT] elete ipu, elete ummy Parts. +_0VRUN R9 0_J 0 +_0VRUN +V._VPLL_XP_R +_0VRUN (VIO) efault is use Internal VRM For isable uburndale raphic PIO floating as Internal VRM and there is no need external supply (VIO) 9 P_0V_J 00_NPO For RF Noise m For RF Noise R N_0_J U_.V_Y 00_YV T P_0V_J 00_NPO +_0VRUN +VFIPLL +_V_V_V_RUN L R9 N_0_J N_UH_ FL0-R0M R N_0U_.V_Y 00_YV efault is use Internal VRM U_.V_Y 00_YV T L N_UH_00 FL0-R0M R U_.V_Y 00_YV 00m. 9 0U_.V_Y 00_YV +V._VPLL_XP +VRUN U_.V_Y 00_YV +V._V_XP m 0.U_0V_K 00_XR +_0VRUN U_.V_Y 00_YV +_0VRUN 99 N_0U_.V_Y 00_YV U_.V_Y 00_YV F F F0 F H H H0 H J0 J K J N0 N N N N N J J T T U U V V W W H N0 N N T J M U9 VOR[] VOR[] VOR[] VOR[] VOR[] VOR[] VOR[] VOR[] VOR[9] VOR[0] VOR[] VOR[] VOR[] VOR[] VOR[] VIO[] VPLLXP VIO[] VIO[] VIO[] VIO[] VIO[9] VIO[0] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[9] VIO[0] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[] VIO[9] VIO[0] VIO[] VIO[] VIO[] VIO[] VIO[] V_[] VVRM[] VFIPLL VIO[] POWR V OR PI * FI RT LV HVMO MI NN / PI V[] V[] V_[] V_[] VLV V_LV VTX_LV[] VTX_LV[] VTX_LV[] VTX_LV[] V_[] V_[] V_[] VVRM[] VMI[] VMI[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[] VPNN[9] VM_[] VM_[] VM_[] VM_[] 0 F F H H9 P P T T T T U M K K0 K9 K K M M M M M9 P P9 VM_ 9 0U_.V_Y 00_YV +VRUN 0.U_0V_K 00_XR 0.U_0V_K 00_XR +V_ +VRUN +_V_V_V_RUN +_V_V_V_RUN +_0VRUN +VPNN m U_.V_Y 00_YV R0 N_NV_0_J 00 00m +VMI R0 0_J 00 +VRUN +_V_VTT +VRUN. m m 0m / [VT] elete ipu, hort to N. /[VT] V_LV leave N. R 0_J 00 R N_0_J +_VRUN 00 R 0_J 00 L 0R-00MHZ_00 TI00U R N_0_J 00 R N_0_J 00 R 0_J 00 +_VRUN +_VRUN For isable uburndale raphic PIO floating as Internal VRM and there is no need external supply Ibexpeak-M 0.U_0V_K 00_XR FOXONN PH (POWR) / HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

18 ize ocument Number Rev ate: heet of HON HI Precision Ind. o., Ltd. P - R& ivision FOXONN M90 (MX-) PH (V) 9 Wednesday, ugust, 009 ize ocument Number Rev ate: heet of HON HI Precision Ind. o., Ltd. P - R& ivision FOXONN M90 (MX-) PH (V) 9 Wednesday, ugust, 009 ize ocument Number Rev ate: heet of HON HI Precision Ind. o., Ltd. P - R& ivision FOXONN M90 (MX-) PH (V) 9 Wednesday, ugust, 009 U9H Ibexpeak-M U9H Ibexpeak-M V[] 9 V[] 0 V[] V[] V[] V[] V[] 0 V[9] V[0] V[] V[] V[] V[] 0 V[] V[] V[] 9 V[] V[9] V[0] V[] V[] V[] V[] V[] V[] V[] V[] 0 V[9] V[0] V[] V[] V[] V[] 9 V[] V[] V[] V[9] F V[] F V[] P V[] F V[] F V[] F9 V[9] F V[0] F V[] V[] V[] H V[] H V[] H V[] H V[] H V[9] H V[0] H V[] H V[] J9 V[] J V[] J0 V[] J V[] J V[] J V[] J V[9] J V[0] J V[] T V[] J V[] K V[] K V[] K V[] K V[9] K V[0] K0 V[] K V[] K V[] K V[] K V[] K V[] K V[] K V[] K9 V[9] K V[90] K V[9] L V[9] L V[9] M V[9] M0 V[9] M V[9] M V[99] M V[00] M V[0] M0 V[0] M V[0] M V[0] M V[0] M V[0] M V[0] M9 V[09] M V[0] U0 V[] M V[] V V[] M9 V[] M V[] 0 V[] N V[] N0 V[9] N V[0] P V[] P V[] P V[] P9 V[] P V[] P V[] R V[] R V[] T V[] T V[] T V[] T V[] T V[] T V[] V V[] V V[] V0 V[9] V V[0] V0 V[] V V[] V V[] V V[] V V[] V9 V[] V V[] V V[] W V[9] W V[0] W V[] F9 V[] W V[] W V[] W0 V[] W V[] Y V[] Y V[] Y V[0] Y V[] U V[] N V[] 0 V[0] V[] V V[] U V[] M9 V[] M V[] N9 V[] H9 V[9] V[0] H V[0] V[9] V[9] U9I Ibexpeak-M U9I Ibexpeak-M V[9] Y V[0] V[] V[] 9 V[] V[] V[] V[] 9 V[] V[] V[9] V[0] V[] V[] V[] 0 V[] V[] 0 V[] V[] V[] V[9] 9 V[0] V[] 0 V[] V[] V[] V[] V[] V[] V[] 0 V[9] V[90] V[9] H9 V[9] V[9] 9 V[9] V[9] V[9] V[9] 0 V[9] V[99] 0 V[00] V[0] V[0] V[0] V[0] V[0] 0 V[0] V[0] V[0] F V[09] F9 V[0] F V[] V[] V[] V[] 0 V[] H V[] H V[] H9 V[] H V[9] H V[0] H V[] H9 V[] H V[] H V[] H V[] V[] 0 V[] V[] V[9] V[0] 0 V[] V[] 0 V[] V[] V[] V[] V[] V[] K V[] K V[] L V[] L V[] L V[9] L V[0] L V[] L V[] L0 V[] L V[] M V[] M V[] M0 V[] N V[] M V[9] M V[0] M V[] M V[] M9 V[] M V[] M V[] N V[] P V[] P V[9] P0 V[90] P V[9] P V[9] P V[9] P V[9] P V[9] R V[9] R V[9] T V[9] T V[99] T V[00] T9 V[0] T V[0] T V[0] U0 V[0] U V[0] U V[0] U V[0] P V[0] V V[09] P V[0] V9 V[] V0 V[] V V[] V0 V[] V V[] V V[] V V[] V[9] V[0] F9 V[] F V[] 0 V[] V[] V[] V[] V[] V[] V[9] 0 V[0] V[] V[] V V[] V V[9] V V[0] V V[] V V[] V V[] V9 V[] V V[] V V[] V V[] W V[] W V[9] Y V[0] Y V[] Y V[] Y9 V[] Y V[] Y V[] Y0 V[] Y V[] Y V[] Y V[9] Y V[0] Y V[] Y V[] Y V[] Y V[] P9 V[] P V[] V[] F9 V[] H V[] H0 V[] H0 V[] H V[] H V[] H V[] T V[] V[] T V[9] V[0] Y V[] T V[] M V[] T V[] M V[] K V[] K9 V[] V V[] K V[] K V[9] H9 V[0] H V[] J

19 +VRUN L +V_LK +_0VRUN L V_LK_IO 0R-00MHZ_00 M000HR 0U_.V_M 00_XR 0 0.U_.V_K 00_XR 0.U_.V_K 00_XR 0.U_.V_K 00_XR 0 0.U_.V_K 00_XR 90 0.U_.V_K 00_XR 0R-00MHZ_00 M000HR 9 0U_.V_M 00_XR 0.U_.V_K 0.U_.V_K 00_XR 00_XR 9 0.U_.V_K 00_XR M_LK_R,0,, M_T_R,0,, R 0_J 00 U_XTLOUT PU_L RF_M_PH +_V_VTT 00 _F R R0 Y N_0M_J ITTI_L MHZ_0P_0PPM U_XTLIN P_0V_J P_0V_J 00_NPO 00_NPO RFLK RFLK# MU ddress: 0000 (h) For NP, ILO -LP (F-LP-00) For NM, LI -LL (F-L-00) heck it by Model bit0 0 RP9 00_PR OT9_OR_R0 OT9#_OR_R0# R_RFLK_OR_M R_RFLK#_OR_M_ LK_PI_T LK_PI_T# LK_MI_PH LK_MI_PH# +V_LK V_OT V_OT OT9 OT9# V N _ V_ RP 0 00_PR LK_PI_T_R LK_PI_T#_R U_XTLIN U_XTLOUT LK_MI_PH_R LK_MI_PH#_R LK_PWR THRMLP LK T RF0/F 0 V_RF 9 XTL_IN XTL_OUT V_RF KPWR/P# V_T R0/T R0#/T# V_R R R# V_R_IO PU_TP# 9 RP 0 00_PR 0 TP_PU# U V_PU PU0 PU#0 V_PU PU 0 PU# 9 V_PU_IO V_R LL +V_LK / VT - dd RP ummy for MI oncern. LK_PU_LK_R LK_PU_LK#_R LK_MH_LK_R LK_MH_LK#_R V_LK_IO 00_PR RP N_0 / [VT]U hange to LI - version. IMVP_PWR_PWM +VRUN 0 RP9 00_PR LK_PU_LK LK_PU_LK# LK_MH_LK LK_MH_LK# R N_0_J 00 R 00K_J 00 PU_L 9 0.U_V_Y 00_YV LK_PWR +VLW N V N R0 N_K_J 00 R 0K_J 00 H:00 MHz L: MHz (efault) U0 HW LK_N# R9 0K_J 00 TP_PU# F Frequency elect Pin (F) PU Power On R T OT9 MHz RF 0 MHz 00MHz efault 00MHz 00MHz 9MHz MHz.MHz R_RFLK#_OR_M_ R_RFLK_OR_M R _J 00 R9 _J 00 R_XTLIN R_NV_XTLIN FOXONN LOK N HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet 9 of 9

20 M M[0..] M Q[..0] M Q#[..0] M [0..] RP9 0K 00_PR M [:0] M 0 M M M_#0 M_# M_LK_R0 M_LK_R#0 M_LK_R M_LK_R# M_K0 M_K M # M R# M W# 0_IM0 _IM0,9,, M_LK_R,9,, M_T_R M_OT0 M_OT M M[:0] / [VT] Reduce the OM Q'ty for /. M Q[:0] M Q#[:0] N M 0 9 M 0 9 M 9 M 9 M 9 M 9 M 90 M M 9 M 9 M M 0/P M M /# 9 M 0 M # # 0 K0 0 K0# 0 K 0 K# K0 K # 0 R# W# L 00 OT0 0 OT M M0 M M M0 M M M M M M M M M M M M M M M 0 M M M M M Q0 M Q Q0 9 M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q#0 Q 0 M Q# Q#0 M Q# Q# M Q# Q# M Q# Q# M Q# Q# M Q# Q# 9 M Q# Q# Q# Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q 9 M Q M Q M Q M Q9 0 M Q M Q0 0 M Q M Q M Q 9 M Q M Q 9 M Q0 M Q M Q9 M Q 0 M Q 9M Q M Q M Q M Q 0M Q M Q 0M Q M Q9 M Q 9M Q M Q 9M Q M Q M Q0 M Q 0M Q M Q M Q9 M Q M Q M Q M Q M Q M Q0 M Q M Q0 9M Q 9M Q 0M Q M Q 9M Q9 9M Q +_VU M Q[:0] N V V V V V V 9 V V9 V V0 V V 0 9 V V 9 V V 99 RIMM_VRF V9 V 00 V0 V 0 V V 0 V V R9 V V 0_J +VRUN V V9 00 V V0 R_VRF V V V V 9 V V V 99 9.U_0V_Y 0.U_V_Y VP V 0 0.U_V_M 00 V 00_YV (0 mil) 00 N V N V R9 N_0_J 00 NTT V9, PM_XTT# R N_0_J 00 T#_IMM0 V0, PM_XTT#0 9 VNT# V, R_RMRT# 0 RT# V V M_VRF0_Q Q_VRF0 V R 0_J VRF_Q V For R, M Path common design R_VRF 00 VRF_ V 9 Place these divider near o-imm0 V 0 0.U_V_Y V.U_0V_Y V V9 9 00_YV 00 V V _VRUN +_VU V V 9 9 V V 9 V V NPTH 0 9 V NPTH 0 0 R9 V For F, M Path common design K_F V9 V0 VTT 0 00 V VTT 0 M_VRF0_Q V V 0 Q_VRF0 V 0 R9 9 Q_VRF0 V K_F OKT_x0P 00 FOX_0-NN-H.U_0V_Y 0.U_V_Y 00 00_YV +_VU / [VT] upport M/M ommon Motherboard esign +0_VRUN Place these aps near o-imm0 OKT_x0P FOX_0-NN-H Mus ddress: 0H(W)/H(R) P N_0U_.V_K.x.x N_0U_0V_M 0U_0V_M 0U_0V_M 00_XR 00_XR 00_XR U_0V_M 0U_0V_M 0U_0V_M 00_XR 00_XR 00_XR 0 P_0V_J 00_NPO 9 U_0V_K 00_XR 9 U_0V_K 00_XR 9 U_0V_K 00_XR 9 U_0V_K 00_XR +_VU P_0V_J 00_NPO 9 0.U_0V_K 00_XR 9 0.U_0V_K 00_XR 9 0.U_0V_K 00_XR 99 0.U_0V_K 00_XR For RF Noise FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision RIII(O-IMM_0) / ize ocument Number Rev ustom M90 (MX-) ate: Wednesday, ugust, 009 heet 0 of 9

21 +VRUN M [:0] M 0 M M M_# M_# M_LK_R M_LK_R# M_LK_R M_LK_R# M_K M_K M # M R# R M W# 0K_J 00 R 0K_J 00,9,0, M_LK_R,9,0, M_T_R M_OT M_OT M M[:0] M Q[:0] M Q#[:0] N M 0 9 M 0 9 M 9 M 9 M 9 M 9 M 90 M M 9 M 9 M M 0/P M M /# 9 M 0 M # # 0 K0 0 K0# 0 K 0 K# K0 K # 0 R# 0_IM W# 9 _IM L 00 OT0 0 OT M M0 M M M0 M M M M M M M M M M M M M M M 0 M M M M M Q0 M Q Q0 9 M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q#0 Q 0 M Q# Q#0 M Q# Q# M Q# Q# M Q# Q# M Q# Q# M Q# Q# 9 M Q# Q# Q# OKT_x0P FOX_0-J-H Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q Q Q Q Q Q Q9 Q0 Q Q Q M Q M Q0 M Q M Q M Q M Q M Q M Q M Q M Q9 M Q0 M Q M Q M Q M Q M Q 9 M Q M Q M Q M Q9 0 M Q M Q0 0 M Q M Q M Q 9 M Q M Q 9 M Q0 M Q M Q9 M Q 0 M Q 9M Q M Q M Q M Q 0M Q M Q 0M Q M Q9 M Q 9M Q M Q 9M Q M Q0 M Q M Q 0M Q M Q9 M Q M Q M Q M Q M Q M Q M Q0 M Q M Q0 9M Q 9M Q 0M Q M Q 9M Q 9M Q9 +_VU M Q[:0],0 PM_XTT#,0 R_RMRT# R_VRF 9 Q_VRF +VRUN For F, M Path common design.u_0v_y 00 T#_IMM M_VRF_Q R 0_J Q_VRF 00 VRF_Q VRF_.U_0V_Y 00 Q_VRF.U_0V_Y 00 R N_0_J 00 0.U_V_Y 00_YV 0.U_V_Y 00_YV 0.U_V_Y 00_YV +_VU N V V V V V V 9 V 9 V 99 V9 00 V0 0 V 0 V V V V V V V 99 VP N N NTT 9 VNT# 0 RT# V V V 9 V V V 9 V 0 V V9 V0 V V V V V V V V 9 V9 V0 V 0 V V V V V V V V9 V0 V V 9 V V V 0 V V V V9 V0 V V V V V V 9 V V V9 9 V0 90 V 9 V 9 NPTH 0 NPTH 0 VTT 0 VTT 0 OKT_x0P FOX_0-J-H +0_VRUN / [VT] upport M/M ommon Motherboard esign P_0V_J 00_NPO M_VRF_Q +_VU Place these aps near o-imm M M[0..] M Q[0..] M Q[..0] M Q#[..0] M [0..] For R, M Path common design Place these divider near o-imm 9 U_0V_K 00_XR 9 U_0V_K 00_XR R9 K_F 00 R99 K_F 00 9 U_0V_K 00_XR +0_VRUN 9 U_0V_K 00_XR 0U_0V_M 00_XR 90 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 0U_0V_M 00_XR 9 9 N_0U_0V_M 0U_0V_M 00_XR 00_XR + P N_0U_.V_K.x.x.9 For RF Noise +_VU P_0V_J 00_NPO For RF Noise 9 0.U_0V_K 00_XR 9 0.U_0V_K 00_XR 99 0.U_0V_K 00_XR 90 0.U_0V_K 00_XR FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision RIII(O-IMM_) / ize ocument Number Rev ustom M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

22 elete M Path (Intel Revised) FOXONN O-IMM_VRF / HON HI Precision Ind. o., Ltd. P - R& ivision ize ocument Number Rev M90 (MX-) ate: Wednesday, ugust, 009 heet of 9

23 _VPT _IPT KXLKO KXLKI,,9 _IPT _VPT 0, LIIN# T_WLN_W# FN_TH 0 L_INT PM_LP_# IN_ HR_TRL,0 LW_PWR TT_PR# +V U_PWR_K 00_RT#, U_PWR RIT_TMP_RP# 0 KO HW_POP_MUT_ TX RX PM_LP_# +V PWRW#_R YTM_I YTM_I0 / [VT] - dd 0.0uF ap for avoid the abnormal behavior. / [VT] - / change to PF. P_0V_J 00_NPO 0 0.0U_0V_K 00_XR R9 K_J U_0V_K 00_XR Y R 0M_J U_.V_Y 00_YV 0.U_V_M 00_XR 0.U_V_M 00_XR 0.U_V_M 00_XR 0.U_V_M 00_XR 9 0.U_V_M 00_XR 0 U_0V_K 00_XR KO VRF 0/PIO90 /PIO9 /PIO9 /PIO9 PIO0 PIO0 PIO0 PIO0 0/PIO9 /PIO9 /PIO9 PIO9 / / PIO TK/PIO PIO PIO/TM (wake-up PIO/TI capability) PIO0/TO PIO/RY# PO/TT# PO/TRIT# VORF 9 V V V V V PIO (no wake-up capability) R OUT_R/PO/XORTR# PIO/IN_R PIO0 U N N N N N N 9 V 0 V LP M PI IR FIR H_RIN#_ H_0T_ FW_HW M_FLH_N T_M_XT LK_M_XT T_M_R LK_M_R M_THRM_T M_THRM_LK KXLKI KXLKO KX/KLKIN 9 KO0 KO0 P_0V_J MOL_I0 KX KOUT0/JNK# 0 KO KO 00_NPO LKOUT/PIO KOUT/TK KO KOUT/TM KO KO KOUT/TI 0 KO.KHZ_.P_0PPM KO FN_PWM KOUT/JN0# 9 KO QM00000 _PWM/PIO 0 UPN_L KO _PWM/PIO KOUT/TO KO KO 0 POWR_L _PWM/PIO KOUT/RY# KO 0 NUMLOK_L# KO _PWM/PIO KOUT KO,,,, RUN_PWR KO _PWM/PIO K KOUT KO KO9 L_TRL_ F_PWM/PIO0 KOUT9/P_VI# KO9 KO0 HR_L _PWM/PIO KOUT0_P0_LK 0 KO0 0 RLOK_L# KO H_PWM/PIO KOUT_P0_T 9 KO KO KOUT/PIO KO KO 9 T_PR# T/PIO KOUT/PIO KO IMVP_VR_ON KO T/PIO KOUT/PIO KO NH# KO T/PIO0 KOUT/PIO/XOR_OUT KO KO UF_PLT_RT# PM_LP_# T/PIO0 KOUT/PIO0 KO KO PWRTN# KO,0,,9 LW_ON LW_ON_R KOUT/PIO 00 PIO.K_J R0 PIO Q XT_INT# KI0 KIN0 PM90 PT/PIO KI0 0, KI +_V_VTT,,,, RUN_ON PLK/PIO KIN KI 0, KI 9 PWRLIMIT# PT/PIO KIN KI 0, R KI M_RT_T# 0 PLK/PIO KIN KI 0, KI T_TP PT/PIO KIN KI 0, KI LK_TP PLK/PIO P/ KIN 9.K_J KI 0, KI KIN 0 00 KI 0, KI KI 0, PI_ROM_I FIU KIN, PI_ROM_I PI_ROM_O_R F_I PM_THRMTRIP#, PI_ROM_O F_O, PM_THRMTRIP# R _J 00 RT#, PI_ROM_# 90 RT# PI_ROM_LK_R F_0# V_POR#, PI_ROM_LK 9 R _J 00 F_K N 0 0U_.V_Y 00_YV U LPP#/PIO0 LRT# LLK LFRM# PIO L0 L L L RIRQ LKRUN#/PIO KRT#/PIO PIO/0 I#/PIO 9 MI#/PIO 9 PWURQ#/PIO PIO PIO /PIO L/PIO /PIO L/PIO /PIO L/PIO PIO PO/HM PIO PIO 9 PIO/TRT# PIO PIO PIO0 PIO PIO PIO NPL0X 00 U_.V_M 00_XR MOL_I L_OFF# 0 0.U_V_M 00_XR,0 PWRW# UF_PLT_RT#,,, LK_KPI LP_FRM# 0, LK_00 LP_0 0, LP_ 0, LP_ 0, LP_ 0, INT_RIRQ 0, PM_LKRUN#, RUNTIM_I# XTMI# WK_I# PWRW# PM_RMRT# IMVP_PWR, U_ON,,,, PLOK_L# 0 T_00 OVT_FX#, OVT_# +V / [VT] INTL Power Reduction olution. R90 N_0_J 00 RP9 0 00_PR T I(LK) RMRT_NTRL_ N_XT_V_N FW_HW 0 M_FLH_N L_OFF# 0 RUN_ON,,,9 IMVP_OK R0.K_J 00 PM_LP_# PM_LP_# PM_LP_# H_RIN#_ H_0T_ T_M LK_M M_THRM_T,0,,, M_THRM_LK,0,,, T I(T) 0.U_V_M_ 00 L_OFF# PWRW#_R 00 LK_KPI (Reserved Path) / [VT] Reduce the OM Q'ty for /. +V +V H_RIN# H_0T PIOs xpander T PH/L/THM/mp/dPU TP TP TP 0MIL 0MIL 0MIL R 0_J 00 H00H-0PT H00H-0PT R.K_J 00 RT# T_TP LK_TP LK_00 T_00 LK_M T_M _PWRLIMIT_TRL PM_LP_# PM_LP_# PM_LP_# RUN_ON U_ON LW_ON RUN_ON T_TP LK_TP T_WLN_W# R0 0K_J 00 T_PR# R 0K_J 00 K_PRN# I_FN_MON# OVT_# XT_INT# M_FLH_N +VRUN Identify TT I +VLW MU hannel RMRT_NTRL_ +VLW / [VT] - dd P 0Kohm for avoid the abnormal behavior. Q MN00 R.K_J 00 R N_0K_J 00 N_0.U_V_M_ 00 R N J 00 N_P_0V_K_N 00 RP.K 00_PR Touch Pad RP N_0K 00_PR +VRUN M_THRM_T M_THRM_LK R9 0K_J 00 R 0K_J 00 R 0K_J 00 R 0K_J 00 +V LIIN# +VU +VRUN R 00K_J 00 R 00K_J 00 R 00K_J 00 R 00K_J 00 R 00K_J 00 R9 00K_J 00 R 00K_J 00 R 00K_J 00 R 0K_J 00 R N_00K_J 00 / [VT] INTL Power Reduction olution. RP 0K 00_PR +V RP0 0K 00_PR LI witch MU hannel +VRUN R 00K_J K_J RP NPL0X LK_M_XT R 0K_J 00 T_M_XT R 0K_J 00 PI_ROM_# R9.K_J 00 +V LK_M_XT T_M_XT +V +V MOL I0- +V YTM I0- P_0V_J_N 00 P_0V_J_N 00 WLN_N 9 T_ON _OFF,9 _PWRLIMIT_TRL +V U LK_M_XT T_M_XT LK V RT# T RT# XT_INT# L0/P0 INT# L/P 0/P L/P /P 0 L/P /P 9 V P/P WL0 _Present K_PRN# PM_LP_M# I_FN_MON# RT# R 0K_J 00 U_0V_Y 00_YV R0 NM_0K_J 00 MOL_I0 R9 NP_00K_J 00 R9 N_0K_J 00 YTM_I0 R9 00K_J 00 Mus ddress: 0x0h R 00 N_0K_J MOL_I R 00K_J 00 R9 N_0K_J 00 YTM_I R9 00K_J 00 I (Reserve) I0 KU 0 0 LI+NP- 0 ILO+NM- 0 I I0 ku 0 0 M90 0 Reserve 0 Reserve Reserve FOXONN HON HI Precision Ind. o., Ltd. P - R& ivision +K(NPL) ize ocument Number Rev ustom M90 (MX-) ate: Wednesday, ugust, heet of