Canary2 Block Diagram

Transcription

1 anary lock iagram 0- V_0 0V_0 Line Out R II IN LK N. IT V RJ- RIL PORT, RT HOT U lviso-m MI I/F IH-M PT Port Replicator ( PIN) PRINTR MHz 00MHz ROM 0 P PI U LP U MI LIN IN LIN OUT TV OUT K TM R 00/MHz 00/ MHz P NVII LV, R II 00/ MHz, Line In Int. MI In INT.PKR odec L OP MP MOM M ard 00/MHz LINK H 0 Mobile PU othan,,,,0,,, U PORT MINI U lue-tooth VO IITIZR H0 M,,,,, 0,, PI RU MTR R /M/MM (TI), LN 0/00/ RTL0L, uper IO FIR H-HFV 0 TVOUT Mini-PI 0.// TXFM IO ROM M IT Touch INT_K Pad VI ONN RT ONN L X TVOUT PMF00T-V VI PIeX MU PMI PWR W TP0 ON LOT ONN /MM/M ard lot in RJ LP U ONN. OM(+) LOK IRM YTM / TP0 0, INPUT OUTPUT TOUT INPUT TOUT Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev ustom NRY ate: Thursday, January, 00 heet of V_ V_ V_0 V_0(LO) PLK-TR MXIM HRR MX+Max PU / ILV-T INPUT YTM / IL INPUT TOUT TOUT OUTPUT 0V_0 V_ OUTPUT V_OR 0.~.V YTM / OUTPUT H_PWR.V. UP+V V 00m FN INPUT OUTPUT TOUT NVV(V_0)

2 lviso trapping ignals and onfiguration page Pin Name F[:0] IH-M Integrated Pull-up and Pull-down Resistors Z_IT_LK, PRLP#, _IN, _OUT, NT[]#/PO[], NT[]#/PO[], LRQ[]/PI[], L[:0]#/F[:0]#, LRQ[0], IH internal 0K pull-ups 0 0 own. F[:] F F F F[:] F[:] F[:] F F F PM#, PWRTN#, TP[] F F0 VORTL _T trap escription F Frequency elect Reversed MI x elect R I / R II PU trap Reversed XOR/LL Z test straps Reversed F ynamic OT Reversed PU core V elect PU VTT elect Reversed VO Present onfiguration 000 = Reserved 00 = F 00 = F00 0- = Reversed 0 = MI x = MI x (efault) 0 = R II = R I 0 = Prescott = othan (efault) 00 = Reserved 0 = XOR mode enabled 0 = ll Z mode enabled = Normal Operation (efault) 0 = ynamic OT isabled = ynamic OT nabled (efault) 0 =.0V =.V (efault) 0 =.0V (efault) =.V 0 = No VO device present (efault) = VO device present NOT: ll strap signals are sampled with respect to the leading edge of the lviso MH PWORK In signal. YZ pread pectrum elect page pread Mode pread mount% own own PI Routing MiniPI LN IL own enter enter enter enter IRQ.F RQ/NT 0 LN_RX[:0] Z_RT#, Z_IN[:0], Z_YN, Z_OUT,Z_ITLK, PRLPVR, PKR, _, U[:0][P,N] [], RQ LN_LK [:0], IOW#, IOR#, RQ, K#, IOR, [:0], #, #, IIRQ IH internal 0K pull-ups IH internal 0K pull-downs approximately ohm IH-M 0 0.V IH internal K pull-downs IH internal.k pull-downs IH internal 00K pull-downs IH-M I Integrated eries Termination Resistors Wistron orporation OM(+) ITP F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

3 V_0 R V_PWR_0 0R-U 0 UV U0VZY UV V_0 R V_MPWR_0 0R-U UV U0VZY UV V_0 R 0R-U UV 0UVMX V_LKN_0 0 UV UV UV 0 UV 0 UV UV UV RFLK RFLK# RN RN--U RFLK RFLK#, _POO IN (V_0) H X V_LKN_0 R KR R UMMY-R N (_POO) L R UMMY-R R KR H / R UMMY-R R0 UMMY-R K K V_0 R 0KR VTT_PWR# Q TU-U OUT (VTT_PWR#) H Hi - Z F_ F_ F_ F F_ F_ PLK_IO PLK_MINI PLK_LN PLK_PM 0 PLK_K PLK_FWH LK_IHPI V_0 F PU R 0KR M 0 0 M M 0 M 0 0 M 0 00M 0 00M Reserved R P P PLK_PM & PLK_IO need equal length R 0KR ITP_N _L R R R R R R0 R R, M_IH, M_IH X X-M- LK_PI_P LK_PI_P# LK_PI_IH LK_PI_IH# RFLK# RFLK RFLK RFLK# R R R R R R R PM_TPPI# RFLK RFLK# LK_IH LK_IO H/L: 00/MHz _L ITP_N H/L : PU_ITP/R R R R R R RF VTT_PWR# LK_IH & LK_IO need equal length R R R R R R R R RF RF RF RF RF RF RF RF RN RN--U PI0 PI PI PI PIF/L00/# PIF0/ITP_N L OT OT# 0 XTL_IN XTL_OUT RF IRF 0 U0 PI_TOP# _PI _PI LK_PU_LK LK_PU_LK# LK_MH_LK LK_MH_LK# LK_MH_PLL LK_MH_PLL# LK_XP_PU VTT_PWR#/P _RF _PU _R ITVP LK_XP_PU# LK_PI_OK LK_PI_OK# LK_PI_OK LK_PI_OK# R R R LK_PI_P LK_PI_P# LK_PI_IH LK_PI_IH# LK_MH_PLL LK_MH_PLL# LK_XP_PU LK_XP_PU# F F_ F_ LK_PI_OK_ RN LK_PI_OK_# LK_PI_OK_ RN LK_PI_OK_# V_LKN_0 V_PWR_0 V_MPWR_0 LK_IH LK_IO PLK_FWH PLK_PM PLK_MINI R RF PLK_K R R R R R R0 R R LV LV# R R# 0 R R# R R# R R# R R# 0 R R# PU_ITP/R PU_ITP#/R# PU0 PU0# PU PU# PU_TOP# F/TT_L F/TT_MO U/F V_R V_R V_PI V_PI V_RF V_PU V V V_R RF RF RF RF RF RF RF RF RF RF RF LK_PU_LK LK_PU_LK# LK_MH_LK 0 LK_MH_LK# R R LK_IHPI LK_IH OM(+) RN RN0 RN RN RN RN R R MI capacitor 0 RN--U RN--U RN--U RN--U RN--U RN--U RN--U RN--U LK_IH LK_RU LK_PI_OK LK_PI_OK# LK_PI_OK LK_PI_OK# LK_PI_P LK_PI_P# LK_PI_IH LK_PI_IH# LK_MH_PLL LK_MH_PLL# LK_XP_PU LK_XP_PU# LK_PU_LK LK_PU_LK# LK_MH_LK LK_MH_LK# PM_TPPU#, Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. lock enerator - IT ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

4 R ROUP R ROUP 0 HLK THRM XTP/ITP INL ONTROL U TP -KT--U TP 0V_0 H_# H_#[..] P H_# # # N H_# U H_# # NR# L H_NR# V H_# # PRI# J H_PRI# R H_# # V H_# # FR# L H_FR# R W H_# # R# H RJ H_R# T H_#0 # Y# M H_Y# W H_# 0# Y Place testpoint on H_# # R0# N H_RQ#0 Y H_IRR# with a H_# # U H_IRR# 0." away H_# # IRR# H_# # INIT# H_INIT# Y H_# # # LOK# J H_LOK# H_T#0 U T#0 H_PURT# H_RQ#[..0] H_RQ#0 RT# H_R#[..0] R H_R#0 H_RQ# RQ0# R0# H H_R# U P H_RQ# RQ# R# K H_#[..0] T H_R# H_RQ# RQ# R# L -KT--U P H_#0 H_# H_RQ# RQ# TR# M H_TR# H_# 0# # Y H_INV#[..0] T H_# RQ# H_# # # H_# H_HIT# H_# HIT# K H_# # # T H_TN#[..0] F H_# H_HITM# H_# # HITM# K H_# # # U H_# H_# # XP_PM#0 H_# # # V H_TP#[..0] H_# H_#0 PM#0 TP TP # XP_PM# H_# # # R H_# H_# PM# TP TP0 0# XP_PM# H_# # # R H_# H_# PM# TP TP # 0 XP_PM# H_# # # R H_#0 H_# # PM# TP TP 0 XP_PM# H_# # 0# H_# H_# # PR# 0 TP TP XP_PM# H_#0 # # U H_# H_# # PRQ# 0 TP TP XP_TK H_# H_# H_# # TK 0# # V TP TP XP_TI H_# # # U H_# H_# # TI TP TP XP_TO H_# H_# H_# # TO # # V TP TP XP_TM H_# H_# H_# # TM # # Y TP TP XP_TRT# H_# # # F H_# H_#0 # TRT# TP TP XP_RT# H_TN#0 # # Y H_TN# H_# 0# R# TP TP H_TP#0 TN0# TN# W F H_TP# # PU_PROHOT# H_INV#0 TP0# TP# W H_INV# H_T# T# PROHOT# TP TP INV0# INV# T THRM H_THRM H_0M# 0M# THRM H_THRM H_# H_# H_FRR# FRR# PM_THRMTRIP-# H H_# # # H_# H_INN# INN# THRMTRIP# R 0R-0 PM_THRMTRIP-I#, H_# # # L H_#0 0R-0 H_TPLK_R LK_XP_PU# H_# H_# H_TPLK# R # 0# TPLK# ITP_LK M LK_XP_PU H_#0 # # 0 H_# H_INTR LINT0 ITP_LK0 H LK_PU_LK# H_# 0# # H_# H_NMI LINT LK F LK_PU_LK H_# # # H_# H_MI# MI# LK0 H_# # # J H_# H_# # # M H_# PM_THRMTRIP# H_# # # F J H_# Layout Note: should connect to H_# # # L H_# omp0, connect with Zo=. ohm, make IH and lviso H_# # # F0 N H_# trace length shorter than 0.". without T-ing H_# # # M H_#0 omp, connect with Zo= ohm, make ( No stub) H_# # 0# H H_# trace length shorter than 0.". H_#0 # # F N H_# H_# 0# # F K H_# H_TN# # # F K H_TN# H_TP# TN# TN# L H_TP# H_INV# TP# TP# J H_INV# R INV# INV# 0 0V_0 To V-OR WITH OMP0 R RF PI# OMP0 P OMP R RF UMMY-R OMP P R OMP R PU_L0 0R-U RF L0 OMP OMP R RF L OMP R TP TP 00RF 0V_0 0V_0 MI PRTP# H_PRLP# H_PLP# TP TP RV PLP# F H_PWR# PU_PROHOT# TP TP RV PWR# R RF R H_PWR, TP TP RV PWROO H_PULP#, XP_TI TP TP RV LP# R0 0RF KRF XP_TM R0 RF TLRF0 TT TLRF0 TT TT Layout Note: TT F XP_TO R0 RF R 0." max length. KRF H_PURT# R0 RF R R V_0 L[:0] Freq.(MHz) NO TUFF NO TUFF ( tepping) XP_RT# R 0RF L L 00 L H XP_TK R0 RF L[:0] Freq.(MHz) OM(+) ( tepping) XP_TRT# R 0RF L H 00 L L ll place within " to PU Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. T RP 0 T RP T RP T RP PU ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

5 V_OR_0 U -KT--U V_OR_0 0 U -KT--U 00 0 V0 V 0 V V0 H 0 0 V V H 0 V V J 0 V V J 0 V V K V V U V_V_0 0 V V V 0 V V V V V W V0 V W 0 V V0 Y V V Y V 0 F 0 V V0 F F V V Place these 0 F V V N 0V_0 PM_LP_#_IH,, and dummy F V V V_V_0 KRF for F V PU_0 0 F V VP0 0 R 0R-0 V_V_0 F V0 VP R F V VP F V VP F V VP I max = 0 m F 0 V VP F V VP U 0 V VP F0 V VP F V_0 HN# T V VP F 0 V VP0 F IN OUT V0 VP K H V VP L R 0 H V VP L H V VP M V VP M H U0VZY U0VZY J V VP N 0 J F0 V VP N J F V VP P J F V VP P 0 J F V VP0 R K F V0 VP R K F V VP T K V VP T 0 V_0 V_V_0 V_0 V_V_0 K V VP U K V L V VQ0 P R R0 0 L V VQ W L V V VI0 H_VI0 L 0R-U 0 M V VI F H_VI M V0 VI F H_VI V VI H_VI M M V VI H_VI 0 M F V VI H H_VI N F0 V F 0V_0 N V F TP_VN V VN 0 N N F V 0 TP_N V N F N 0 P P F P F P R R F R F R F R F 0 R F R F T F Layout Note: 0 T F VN and N lines V_OR_0 T should be of equal length. T T U Layout Note: U Provide a test point (with U no stub) to connect a 0 U differential probe V between VN and V N at the location 0 V where the two.ohm V resistors terminate the V 0 ohm transmission line. V_OR_0 W W W W 0 W Y Y 0 Y Y V_OR_0 OM(+) 0UVKX 0 0U0VZY 0 U0VMX- 0U0VZY U0VMX- U0VMX- 0U0VZY U0VMX- U0VMX- 0U0VZY U0VMX- 0 U0VMX- 0U0VZY U0VMX- U0VMX- 0 0U0VZY U0VMX- UMMY-R U0VMX- 0U0VZY U0VMX- U0VMX- 0U0VZY U0VMX- U0VMX- 0U0VZY U0VMX- U0VMX- 0U0VZY U0VMX- U0VMX- 0U0VZY U0VMX- T 0U0VZY 0U0VZY 0U0VZY 0U0VZY 0U0VZY 0 0U0VZY 0U0VZY 0U0VZY 0 0U0VZY 0U0VZY 0U0VZY 00 0U0VZY 0U0VZY 0U0VZY 0U0VZY Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PU ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

6 H_XROMP R0 RF H_#[..0] H_#0 H_# H_# H0# H# H_# H_# H# H# F H_# H_# H# H# H H_# H_# H# H# H_# 0V_0 H_# H# H# 0 F H_# H_# H# H# F H_# H_# H# H# H_#0 H_# H# H0# 0 K H_# H_# H# H# 0 F H_# R H_#0 H# H# 0 J H_# H_# H0# H# H_# RF J H_# H# H# H H_# H_# H# H# F0 F H_# H_# H# H# K H_# H_XOMP H_# H# H# H H_# H_# H# H# 0 H H_# H_# H# H# H H_#0 H_# H# H0# K H_# 0V_0 H_# H# H# K H_# H_#0 H# H# J H_# H_# H0# H# H_# H_# H# H# F H H_# R H_# H# H# J H_# H_# H# H# H_# 0V_0 RF L H_# H# H# K H_# H_# H# H# J H_# H_XWIN H_# H# H# P H_#0 H_# H# H0# L H_# R H_# H# H# F J 00RF R0 H_#0 H# P 00RF H_# H_# H0# H# F L H_T#0 H_# H# HT#0 UV U H_T# H_# H# HT# V H_VRF H_# H# HVRF J R H_NR# H_# H# HNR# R H_PRI# H_# H# HPRI# P R0 H_RQ#0 H_# H# HRQ0# T 00RF H_PURT# H_# H# HPURT# H0 R H_# H# UV R H_#0 H# U H_YROMP H_# H0# R LK_MH_LK# H_# H# HLKINN T LK_MH_LK H_# H# HLKINP T H_# H# R H_Y# R H_# H# HY# T H_FR# H_INV#[..0] H_# H# HFR# H_INV#0 RF V H_# H# HINV#0 H U H_INV# H_# H# HINV# K W H_INV# H_# H# HINV# T U H_INV# H_#0 H# HINV# U V H_PWR# H_# H0# HPWR# W H_R# H_TN#[..0] H_# H# HR# F W H_TN#0 H_# H# HTN#0 U H_TN# 0V_0 H_# H# HTN# K U H_TN# H_# H# HTN# R Y H_TN# H_TP#[..0] H_# H# HTN# V Y H_TP#0 H_# H# HTP#0 V H_TP# H_# H# HTP# K Y H_TP# R H_# H# HTP# R H_TP# W H_#0 H# HTP# W TP_H_R# TP TP RF W H_# H0# HR# F Y H_HIT# H_# H# HHIT# Y H_HITM# H_# H# HHITM# W H_LOK# H_YOMP H# HLOK# TP_H_PRQ# H_RQ#[..0] H_XROMP HPRQ# H_RQ#0 TP TP H_XOMP HXROMP HRQ#0 H_RQ# H_XWIN HXOMP HRQ# H_RQ# 0V_0 H_YROMP HXWIN HRQ# T H_RQ# H_YOMP HYROMP HRQ# L H_RQ# H_R#[..0] H_YWIN HYOMP HRQ# P H_R#0 HYWIN HR0# H_R# R HR# H_R# HR# H_PULP#_ RF HPULP# R 0R-0 H_PULP#, HTR# H_TR# UMMY FOR OTHN TPPIN H_YWIN H_#[..] U HOT R 00RF UV.0MH.0XU OM(+) Place them near to the chip Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

7 When M replace to PM VO_TRLLK VO_TRLLK P_RXN[..0] VO_TRLT VO_TRLT P_RXP[..0] P_TXN[..0] P_TXP[..0] U V_PI_0 lviso will provide VO_TRLLK MI_TXN0 F0 MI_TXN0 and TRLT pulldowns on-die MI_TXN MIRXN0 F0 F U MI_TXN MI_TXN MIRXN F H F MI_TXN MI_TXN MIRXN F F VO_TRLT P_OMP MI_TXN TP TP RF R MIRXN F F H F TP0 TP VO_TRLLK VOTRL_T XP_OMPI P_OMP MI_TXP0 F F H F VOTRL_LK XP_IOMPO MI_TXP0 Y MI_TXP MIRXP0 F F LK_MH_PLL# LKN P_RXP MI_TXP MI_TXP MIRXP F F LK_MH_PLL LKP XP_RXN0 0 P_RXP MI_TXP MI_TXP MIRXP F F XP_RXN F P_RXP MI_TXP MIRXP F J F MH_TV_OMP TV_ XP_RXN 0 P_RXP MI_RXN0 F F0 MH_TV_L TV_ XP_RXN H P_RXP MI_RXN0 MI_RXN MITXN0 F0 F MH_TV_RM TV_ XP_RXN J0 P_RXP0 MI_RXN MI_RXN MITXN F J F TV_RFT XP_RXN K P_RXP MI_RXN MI_RXN MITXN F R F VYN P_RXP MI_RXN R R R R00 TV_IRTN XP_RXN L0 MITXN F H F 0R-0 0R-0 0R-0 0R-0 0R-0 TV_IRTN XP_RXN M P_RXP MI_RXP0 F F TV_IRTN XP_RXN N0 P_RXP MI_RXP0 Y MI_RXP MITXP0 F H F XP_RXN P P_RXP MI_RXP MI_RXP MITXP F J R 0ohms F HYN XP_RXN0 R0 P_RXP MI_RXP MI_RXP MITXP F H F 0R-0 XP_RXN T P_RXP MI_RXP MITXP F F XP_RXN U0 P_RXP F F0 XP_RXN V P_RXP F0 XP_RXN W0 P_RXP0 M_LK_R0 M M_K0 RV 0ohms 0ohms MH_LK LK XP_RXN Y Lane Reversal enable M_LK_R L M_K RV MH_T P_RXN M_K RV J R T MH_LU LU XP_RXP0 0 P_RXN M_LK_R J M_K RV 0R-0 P_RXN M_LK_R 0ohms R LU# XP_RXP F M_K RV 0 MH_RN 0 0R-0 RN XP_RXP F0 0 P_RXN M_K RV 0 R RN# XP_RXP P_RXN RV MH_R UMMY P_RXN0 M_LK_R#0 0V_N_0 R 0R-0 R XP_RXP H0 N M_K0# 0R-0 VYN P_RXN M_LK_R# MH_VYN R R# XP_RXP J K M_K# H HYN P_RXN MH_HYN R VYN XP_RXP K0 0 M_K# RTIRF P_RXN M_LK_R# VT_PWR P_RXN M_LK_R# R R0 HYN XP_RXP L J R M_K# J0 RFT XP_RXP M0 F M_K# 0 R XP_RXP N R0 P_RXN M_K# 0R-0 UMMY 0KR R P_RXN UMMY 0V_N_0 0R-0 XP_RXP0 P0 P_RXN, M_K0 P XP_RXP R M_K0 XP_RXP T0 P_RXN, M_K M M_K 0ohms LKLT_RTL XP_RXP U P_RXN, M_K H M_K M_UY# J PM_MUY# PM_XTT#0 LKLT_RTL XP_RXP V0 P_RXN0, M_K K M_K XT_T0# J PM_XTT# 0 MH_L_ON F LTL_LK LKLT_N XP_RXP W XT_T# H LTL_T LTL_LK VO_RN_ P_TXN0, M_#0 N PM_THRMTRIP-# UV M_0# THRMTRIP# F VT_PWR, L_N_LK VO_N_ P_TXN Layout Note:, M_# M UV M_# PWROK 0 LTL_T XP_TXN0 F PLT_RT#_MH PLT_RT#,,0,,,, L_N_T L_LK XP_TXN F VO_N_ P_TXN Route as short, M_# H UV M_# RTIN# F R 00R L_T XP_TXN VO_LKN_ P_TXN as possible, M_# MH_LV_ON UV M_# F RFLK# LI TXN UV P_TXN M_OOMP0 RF_LKN LV_N XP_TXN H F RFLK TP TP L_LV TXN 0 UV P_TXN M_OOMP M_OOMP0 RF_LKP LI XP_TXN J F RFLK# TP TP L_VRFH TXN UV P_TXN M_OOMP RF_LKN LV XP_TXN K F RFLK TP TP L_VRFL LVRFH XP_TXN L TXN UV P_TXN R R0 RF_LKP F LVRFL XP_TXN M TXN 0 P_TXN, M_OT0 P UV M_OT0 XP_TXN N TXN P_TXN, M_OT L 0 MH_TXLK- UV 0RF 0RF M_OT N P 0 LLKN XP_TXN P TXN0 P_TXN0, M_OT M MH_TXLK+ UV M_OT N N LLKP XP_TXN0 R TXN P_TXN, M_OT N0 UV M_OT N P LLKN XP_TXN T TXN UV P_TXN M_ROMPN N P LLKP XP_TXN U K0 TXN UV P_TXN R_VRF M_ROMPP MROMPN N P XP_TXN V K TXN P_TXN MH_TXOUT0- UV MROMPP N N LTN0 XP_TXN W F When High K Ohm TXN P_TXN MH_TXOUT- UV MVRF0 N V_0 LTN XP_TXN Y MH_TXOUT- MXLW MVRF N LTN VO_RP_ UV P_TXP0 MXLWIN N R UMMY-R F XP_TXP0 VO_P_ UV P_TXP MYLW MXLWOUT N0 XP_TXP F VO_P_ P_TXP MH_TXOUT0+ UV MYLWIN N R UMMY-R F LTP0 XP_TXP F F0 VO_LKP_ P_TXP MH_TXOUT+ UV MYLWOUT LTP XP_TXP TXP P_TXP MH_TXOUT+ UV R UMMY-R F0 LTP XP_TXP H TXP 0 UV P_TXP XP_TXP J TXP UV P_TXP R UMMY-R F LTN0 XP_TXP K TXP 0 UV P_TXP 0.0MH.0XU LTN XP_TXP L TXP 00 UV P_TXP R UMMY-R F LTN XP_TXP M TXP UV P_TXP XP_TXP N TXP0 0 UV P_TXP0 V_0 0V_0 R0 UMMY-R F LTP0 XP_TXP0 P TXP UV P_TXP LTP XP_TXP R TXP UV P_TXP V_0 R KR F LTP XP_TXP T TXP UV P_TXP XP_TXP U TXP UV P_TXP V_0 R R R0 UMMY-R F V_0 XP_TXP V TXP UV P_TXP R0 KR 0R XP_TXP W PM_XTT#0 R R R UMMY-R F LTL_LK R 0KR F R F LTL_T VO_RN_ F UMMY-R R VO_RN R.0MH.0XU VO_N_ VO_N PM_XTT# R UMMY-R F0 L_N_LK R KR VO_N_ 0 VO_N Q FWH_INIT_Q VO_LKN_ HT VO_LKN 0KR F L_N_T V_ For stepping R UMMY-R R KR R UMMY-R F VO_RP_ VO_RP VO_P_ VO_P R0 PU_L0 R0 UMMY-R F MH_L_ON R 00KR VO_P_ 0 0RF VO_P F VO_LKP_ VO_LKP F0 R UMMY-R F LKLT_RTL R0 00KR M_ROMPN R R0 Q R R0 UMMY-R F LI R KRF M_ROMPP R0 UMMY-R F R R0 UMMY-R F 0RF For stepping When Low choice F[:0] Freq.(MHz) lower than.k 0 00 Ohm 00 OM(+) P_RXP R VO_INTP VO_INTP P_RXP R VO_TLLP VO_TLLP UVMX- UV UVMX- UV KR UMMY-R UMMY-R KR MI R MUXIN LK PM N F/RV P_RXN R P_RXN R Place near,,, VO_INTN VO_TLLN Place near U0 MI TV V LV PI-XPR RPHI VO_INTN VO_TLLN Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) ize ocument Number Rev ustom NRY ate: Thursday, January, 00 heet of

8 U U M Q[..0] M Q[..0] M Q0 M Q0 M Q Q0 _0# K M #0, M Q Q0 _0# J M #0, H M Q Q _# K M #, M Q Q _# M #, L M Q Q _# L M #, M Q Q _# M #, L M Q Q M M[..0] M M0 M Q Q M M[..0] H M M0 M Q Q _M0 J M M M Q Q _M0 F J M M M Q Q _M P M M M Q Q _M K K M M M Q Q _M L F M M M Q Q _M K L M M M Q Q _M P F0 M M M Q Q _M K M M M M Q Q _M P H M M M Q Q _M J0 N M M M Q0 Q _M P H M M M Q0 Q _M K P M M M Q Q0 _M J K M M M Q Q0 _M M M M M Q Q _M 0 M Q Q _M M M Q Q M Q[..0] M Q0 M Q Q M Q[..0] M M Q0 M Q Q _Q0 K M Q M Q Q _Q0 F L M Q M Q Q _Q P H M Q M Q Q _Q K M M Q M Q Q _Q N J M Q M Q Q _Q J N M Q M Q Q _Q P K0 M Q M Q Q _Q K P M Q M Q Q _Q M J0 M Q M Q Q _Q M0 N M Q M Q Q _Q M H M Q M Q Q _Q H P M Q M Q0 Q _Q J H M Q M Q0 Q _Q F L0 M Q M Q Q0 _Q K M Q Q0 _Q M0 M Q#[..0] M Q#[..0] M Q Q H0 M Q#0 M Q Q M M Q#0 M Q Q _Q0# K H M Q# M Q Q _Q0# F L M Q# M Q Q _Q# P M Q# M Q Q _Q# K P M Q# M Q Q _Q# N0 F M Q# M Q Q _Q# K M M Q# M Q Q _Q# N M Q# M Q Q _Q# J M M Q# M Q Q _Q# N J M Q# M Q Q _Q# L0 M M Q# M Q Q _Q# M K M Q# M Q Q _Q# H L M Q# M Q Q _Q# H H M M Q# M Q Q _Q# F M Q# M Q0 Q _Q# H N M [..0], M Q0 Q _Q# M [..0], M Q Q0 P M 0 M Q Q0 M 0 M Q Q _M0 L J M M M Q Q _M0 H M M Q Q _M P 0 L M M Q Q _M K M M Q Q _M P L M M Q Q _M H M M Q Q _M M P M M Q Q _M J M M Q Q _M N H P M M Q Q _M K M M Q Q _M M H P0 M M Q Q _M J M M Q Q _M L H0 L M M Q Q _M K M M Q Q _M P0 J M M M Q Q _M H M M Q0 Q _M M K N M M Q0 Q _M J0 M M Q Q0 _M L0 J N M 0 M Q Q0 _M H0 M 0 M Q Q _M0 M K N M M Q Q _M0 J M M Q Q _M N0 J P M M Q Q _M M M Q Q _M M0 H P M M Q Q _M 0 M M Q Q _M M K M M Q Q _M M Q Q J L M #, M Q Q M Q Q _# N J M M R#, M Q Q M #, M Q Q _R# P K K _RVNIN# TP TP M Q Q _# H M R#, M Q Q _RVNIN# F K _RVNOUT# TP TP M Q Q _R# K _RVNIN# TP0 TP M Q0 Q _RVNOUT# F M W#, M Q0 Q _RVNIN# F _RVNOUT# TP TP M Q Q0 _W# P M Q Q0 _RVNOUT# F M W#, M Q Q M Q Q _W# H L M Q Q H M Place Test P Near to hip M Q Q M Q Q H M Q Q as could as possible Place Test P Near to hip M Q Q M Q Q ascould as possible M Q Q F M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q Q M Q0 Q F M Q0 Q M Q Q0 F M Q Q0 M Q Q M Q Q M Q Q M Q Q Q Q R YTM MMORY R YTM MMORY.0MH.0XU.0MH.0XU OM(+) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

9 V_RLL_0 V_0 0R-U 00UV0MX- V_PI_0 V_0 R 0R-U UMMY 0 ohms V_0 V_0 UMMY V_0 R 0 R V_LV_0 V_TV_0 0R-U R 0R-0 U0VMX- 0U0VZY R R V_TV_0 R V_0 V_LV_0 U0VMX- 0R-0 o Not tuff R V_QTV_0 V_0 R 0R-U V_TV_0 0R-0 U0VMX- 0UVKX 0R-0 V_TV_0 V_0 R V_0 V_TXLV_0 R R 0R-U V_TV_0 0R-U U0VMX- 0U0VZY U0VMX- U0VZY 0R-0 V_TV_0 U0VMX- V_LV_0 V_ Note: ll VM pins shorted internally 0R-U U0VMX- V_0 R U0VMX- 0 ohms V_TXLV_0 U0VMX- U0VMX- V 0 When M replace to PM 0R-U V_0 U0VMX- Note: ll VM pins shorted internally V_PLL_0 V_0 MH_V_YN VP_MH_P VP_MH_P VP_MH_P VP_MH_P V._R_P V._R_P V._R_P UMMY V._R_P V._R_P V._R_P V_LV_0 0R-0 Route TV gnd from MH to decoupling cap groung lead and then connect to the gnd plane V 0_0 for low speed graphic clock.v_0 for high speed clock.default use 0V_0 Route gnd from MH to decoupling cap groung lead and then connect to the gnd plane 0V_N_0 raphic Freq. /Memory Freq. 0V V L Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) ize ocument Number Rev V_HPLL_0 Layout Notes: _RT Route _RT gnd from MH to U0VZY 00MHZ/R Route caps within 0mil decoupling cap ground lead and then Y Y IN-UH of lviso. Route F connect to the gnd plane. OM(+) 0 within " of lviso. 00MHZ/R 0U0VZY U0VMX- -00/ Y Y L0 V_MPLL_0 0MHZ/R IN-UH NO Y -00/ U0VZY U0VMX- V_0 V_HMPLL_0 V_PLL_0 V_PLL_0 V_RT_0 UMMY 0 ohms 0R-U U0VMX- 0V_N_0 V_0 L IN-UH U0VMX- V_0 R L IN-UH 0V_0 U0VZY U0VZY R 0RJ- NRY ate: Thursday, January, 00 heet of 0 UVZY UVZY 0 UVMX- T R N M K J V U T R P N M L K J H V U T R P N M L K J H K H K J K K K K W0 U0 T0 K0 V U K W V T K K F H0 K J K W V U T R P N M L K W0 V0 U0 T0 R0 P0 N0 M0 K0 J0 Y W U R P N M L J N M N M N M N M N M N M N M V N M V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V V V V V V V V0 V V V V V V V V VH_MPLL VH_MPLL0 V_PLL V_PLL V_HPLL V_MPLL V_RT0 V_RT _RT V_YN VTT0 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT0 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT0 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT0 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT0 VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT0 VTT V_TV0 V_TV V_TV0 V_TV V_TV0 V_TV VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM VM VM VM VM VM VM0 VM VM VM VM F F V_TV H _TV V_TV VQ_TV H V_LV0 V_LV V_LV V_LV VHV0 VHV VHV VTX_LV0 VTX_LV VTX_LV V_M0 V_M V_M V_M V0 V V V V V V V_PLL0 V_PLL V_PLL M H P P N M L K J H F P N M L K J H F 0 P N M L K J H F P N M L K J H F 0 P M F0 P F F W U R N L J Y Y Y U.0MH.0XU V_ F _ R POWR R 0R-0 R U0VMX- 0 0U0VZY 0 0U0VZY 0U0VZY U0VMX- 0U0VZY 0U0VZY U0VMX- U0VMX- 0 0U0VZY 0U0VZY 0U0VZY 0U0VZY 0 0U0VZY 0U0VZY 0U0VZY R0 R U0VMX- U0VMX- U0VMX- 0 U0VMX- 0U0VZY U0VMX- R KR ML

10 0V_0 0V_N_0 V_ ize ocument Number Rev ate: heet of Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) 0 Thursday, January, 00 NRY OM(+) ize ocument Number Rev ate: heet of Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) 0 Thursday, January, 00 NRY OM(+) ize ocument Number Rev ate: heet of Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. MH ( of ) 0 Thursday, January, 00 NRY OM(+) Place these Hi-Freq decoupling caps near MH 0 U0VMX- 0 U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- UV UV UV UV UV UV UV UV 0 Y V T P M K H N 0 L J F 0 Y W V U T R P N M L 0 K J H F N H 0 L F W V 0 U T R P N M L K J H 0 F N J 0 Y L W V U T 0 R P N M L K J H F 0 P Y0 0 M 00 J W 0 V 0 U 0 P 0 L 0 H 0 F W 0 N L J F W J N L Y F J L 0 N J F J K 0 J L N K H K L 0 F J N U L 0 H J T W N F0 0 0 V0 K0 F F N 0 J H L H F F J 0 J P T V H L N 0 J H L P U 0 Y F N W L P J L 0 P T J V 0 K N L P Y L H 0 K 0 T 0 V H 0 N L0 00 Y0 0 F H LV 0 L J 0 Y UF.0MH.0XU UF.0MH.0XU VM_NTF0 VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF0 VM_NTF VM_NTF 0 VM_NTF 0 VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF0 VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF VM_NTF0 VM_NTF V_NTF P V_NTF0 N V_NTF M V_NTF L V_NTF Y0 V_NTF R0 V_NTF P0 V_NTF N0 V_NTF M0 V_NTF L0 V_NTF Y V_NTF0 R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF Y V_NTF R V_NTF P V_NTF N V_NTTF M V_NTF0 L V_NTF W V_NTF V V_NTF U V_NTF T V_NTF P V_NTF N V_NTF M V_NTF L V_NTF0 W V_NTF V V_NTF U V_NTF T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF0 V V_NTF U V_NTF T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF0 U V_NTF T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF U V_NTF0 T V_NTF R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF U V_NTF T V_NTF0 R V_NTF P V_NTF N V_NTF M V_NTF L V_NTF W V_NTF V V_NTF U V_NTF T _NTF Y _NTF _NTF Y _NTF _NTF L _NTF M _NTF N _NTF P _NTF0 R _NTF T _NTF U _NTF V _NTF W _NTF Y _NTF _NTF _NTF L _NTF M _NTF0 N _NTF P _NTF R _NTF T _NTF U _NTF V _NTF W _NTF Y _NTF _NTF _NTF0 L _NTF M _NTF N _NTF P _NTF R _NTF T _NTF U _NTF V _NTF W _NTF Y _NTF0 _NTF _NTF R _NTF Y _NTF _NTF _NTF _NTF _NTF _NTF _NTF0 0 _NTF 0 _NTF R _NTF Y _NTF _NTF _NTF Y _NTF _NTF _NTF Y _NTF0 _NTF _NTF Y _NTF _NTF _NTF Y _NTF _NTF _NTF Y _NTF _NTF0 VTT_NTF L VTT_NTF M VTT_NTF N VTT_NTF P VTT_NTF R VTT_NTF T VTT_NTF U VTT_NTF0 V VTT_NTF W VTT_NTF L VTT_NTF M VTT_NTF N VTT_NTF P VTT_NTF R VTT_NTF T VTT_NTF U VTT_NTF V VTT_NTF0 W NTF UH.0MH.0XU NTF UH.0MH.0XU 0U0VZY 0U0VZY

11 MH MH MH MH, M [..0] M M 0, M [..0] M Q[..0] 0 M 0 M Q0 M 0 /R 0 M R#, 0 M 0 Q0 0 M Q M /W 0 M W#, 0 M Q 00 M Q M / M #, 00 M Q M Q M M Q 0 M Q M /0 0 M_#0, M Q M Q M / M_#, M Q M Q M M Q M Q M K0 M_K0, M Q M Q#[..0] M Q#0 M K 0 M_K, M Q0# M Q# M 0 M 0 Q# 0 M Q# M 0/P K0 0 M_LK_R0 0 M 0/P Q# 0 M Q# M /K0 M_LK_R#0 0 M Q# M Q# M M Q# M Q# K M_LK_R Q# M Q# /K M_LK_R# Q# M Q# M M[..0] M M0 Q#, M # / M0 0, M # M M _ M M M M M[..0], M #0 0 M M0 0 M M M M0 0, M # 0 M M M, M #0 0 M M 0 M M M M Q0 M 0, M # 0 M M M M M M Q Q0 M M M M Q[..0] M Q0 M M M M Q Q M 0 M M M Q Q0 M 0 M M M Q Q M M Q[..0] M Q Q M M M M Q Q M_IH M Q Q M 0 M M M Q Q M_IH M Q Q M M Q Q L M Q Q M_LK_R M Q Q V_0 M Q Q K0 0 M_LK_R# M Q Q VP M Q Q K0# M_LK_R M Q Q M Q Q K M_LK_R# V_0 M Q0 Q 0 M Q Q K# UV UVMX- M Q Q0 00 M Q0 Q M Q Q M Q Q0 0 R 0 M Q Q N#0 0 M Q Q 00 M Q Q N# 0 M Q Q R R 0KR M Q V_0 M Q Q V_P Q N# 0KR 0KR M Q Q N#0 0 M Q Q M Q Q N#/TT M Q Q UV M Q M Q Q V Q M Q M Q Q V R Q M Q0 M Q Q V 0KR Q V M Q M Q0 Q V Q0 V M Q M Q Q0 V Q V M Q M Q Q V Q V M Q M Q Q V 0 Q V M Q M Q Q V 0 Q V M Q M Q Q V Q V 0 M Q M Q Q V Q V 0 M Q M Q Q V Q V M Q V_ M Q Q V Q V M Q0 Q V V_ M Q Q M Q M Q0 Q Q0 V M Q M Q Q0 Q M Q M Q Q Q M Q M Q Q Q M Q M Q Q Q M Q Place near M M Q Q Q M Q M Q Q Q M Q M Q Q Q Place near M M Q M_LK_R0 M Q Q Q M Q0 M Q Q Q M Q M Q0 Q Q0 M_LK_R M Q M Q Q0 Q M Q M Q Q Q M Q M_LK_R#0 M Q Q Q 0 M Q M Q Q 0 Q 0 M Q M_LK_R M Q Q Q M_LK_R# M Q M Q Q Q M Q M Q Q Q M_LK_R M Q 0 M Q Q Q M Q0 M Q Q Q M Q M_LK_R# M Q0 Q Q0 M Q M Q Q0 Q M Q M Q Q 0 Q 0 M_LK_R# M Q M Q Q Q 0 0 M Q M Q Q Q M Q M Q Q Q M Q M Q Q Q M Q M Q Q Q M Q M Q Q Q M Q0 M Q Q Q 0 M Q M Q0 Q Q0 0 M Q M Q Q0 Q M Q M Q Q Q M Q Q Q M Q#0 Q M Q# /Q0 M Q[..0] 0 M Q# N#0 /Q M Q# N# /Q M Q# N# /Q 0 M Q# N#0 /Q M Q# N#/TT 0 /Q M Q# /Q 0, M_# 0 0# /Q, M_# M Q0 #, M_K M Q K0 Q0 M Q#[..0], M_K 0 M Q K Q, M R# 0 M Q R# Q 0, M # M Q # Q, M W# 0 M Q W# Q M Q Q, M_IH M Q L Q, M_IH Q, M_OT0 OM(+), M_OT OT0 OT0, M_OT, M_OT OT 0 OT R_VRF 0 R_VRF Wistron orporation R_VRF VRF VRF F,, ec., Hsin Tai Wu Rd., Hsichih, 0 Taipei Hsien, Taiwan, R.O UVMX- UV 0 UVMX- UV R-00P- KT-OIMM000U M RVR TYP TN I TOP I NORML TYP R ocket ize ocument Number Rev ustom NRY ate: Thursday, January, 00 heet of

12 PRLLL TRMINTION ecoupling apacitor Put decap near power(0.v) and pull-up resistor R_VRF M [..0], R R R R R R R RJ R RJ M R RJ R RJ R RJ M M M R0 RJ M 0 RN RN- M M_K, M_OT, M W#, M #, M_OT, M_#, M_K0, M R#, M_#, M_OT, M [..0], R_VRF V_ Put decap near power(0.v) and pull-up resistor UV Place these aps near M RN M M M 0 M #, UVMX- UVMX- UVMX- UVMX- UVMX- RN- RJ RJ RJ RJ RJ RJ UV UV UV UV UV UV UV UV 0 UV UV UV UV 0 UV UV UV UV 0 UV RN RN- R RJ R RJ R RJ R RJ RN RN- M M M M M M M_K, M #0, M #, M R#, M_#0, M_OT0, V_ UVMX- 0 Place these aps near M UVMX- 0 UVMX- 0 UVMX- UVMX- RN M M M 0 RN- RN RN- M #, M_#, M #, M W#, M #0, RN RN- M M M M #, RN0 M_K, OM(+) M M M RN- RN RN- M 0 M M M Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. R Termination Resistor NRY ize ocument Number Rev ate: Thursday, January, 00 heet of

13 0 TY_L 0 NUM_L 0 P_L 0 PWR_L 0 HR_L 0._T 0 WL_L 0 T_L R 00KR / Q OUT R IN R TU-U Q OUT R IN R TU-U Q OUT R IN R TU-U Q OUT R IN R TU-U Q OUT R IN R TU-U Q OUT R IN R TU-U / Q OUT R IN R / TU-U Q0 OUT R IN R TU-U Layout 0 mil TY_L# NUM# P# PWR_L# HR_L# WLNONL# T_L# LV INVRTR INTRF,0, M_K,0, M_K U UV P_UP_T P_N_T TK_NOT_T R V_0 0R-0 HR_L# V_ P# T_L# PWR_L# V_0 V_0 MI_ 0 UV UV 000P0V INV MP-ONN V_0 UV MIL NTR_T LT T _L_ON I_L# NUM# WLNONL# TY_L# RIHTN INT_MI L_T LV 000P0V UV 0P0VKX _L_ON 0 V_ L ONN 0UV0ZY-U 000P0V V_0 000P0V 0 UV Layout 0 mil I_L# 0 RIHTN L_T U0VKX R0 0RJ- P# NUM# T_L# 000P0V HR_L# TY_L# PWR_L# TOUT 000P0V 00P0VJN 00P0VJN 00P0VJN 000P0V 0 UV UV MH_LV_ON 0 NV_LV_ON LV_ LV_0 LV_ LV_ LV_ LV_ LV_ LV_ LV_ON R Place them as close to L as possible KR R o Not tuff 0R-0 R R o Not tuff R o Not tuff R o Not tuff R o Not tuff R o Not tuff R o Not tuff R o Not tuff R o Not tuff LV_ON_ U0VKX LV_ON MH_TXLK+ MH_TXLK- MH_TXOUT+ MH_TXOUT- MH_TXOUT- MH_TXOUT+ MH_TXOUT0- MH_TXOUT0+ OUT ON/OFF# 0 U LV_ LV_0 LV_ LV_ LV_ LV_ LV_ LV_ IN IN T0IU--T R 0R-0 R 0R-0 R0 0R-0 R 0R-0 R 0R-0 R 0R-0 R 0R-0 R 0R-0 Place them as close to L as possible 0 U0VKX NV_TXLK+ 0 NV_TXLK- 0 NV_TXOUT+ 0 NV_TXOUT- 0 NV_TXOUT- 0 NV_TXOUT+ 0 NV_TXOUT0-0 NV_TXOUT0+ 0 L IPX-ON0-U MH MH LV_ LV_ LV_0 LV_ LV_ LV_ LV_ LV_ 0UVMX PIRT# TX _RX _TR# _RT# _T# 0 UV PNL_I PNL_I PIRT#_I_T 0 UV V_0 R 0R-0 R UMMY-R UMMY- 0 UV _TX _RT# _T# _TR# _RX PIRT#,,,,, OM(+) 0P0VKX 0P0VKX 0P0VKX L/Inverter onnector Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev NRY ate: Thursday, January, 00 heet of 0P0VKX 0P0VKX

14 RT_R_Y RT I/F &TV ONNTOR Ferrite bead impedance: L RT_R_Y 0 Ohm Impedance Ohm Impedance RT_R MK00L- V_0 V_RT_0 ext. RT side 0UVKX _LK & T level shift V_0 V_0 RT Y RT Y RT Y RT Y R 0RF R 0RF R0 0RF P0VN P0VN LM0 L LM0 L LM0 P0VN P0VN RT_ RT_ P0VN RT_R T P0VN RT_ JV_H RT_ JV_V LK R 0KR R KR R KR RT RT_IN# P0VJN 00P0VJN 00P0VJN VIO P0VJN 00P0VJN MH_T NV_T NV_LK MH_LK R For MH For MH R R KR KR R 0R-0 For NV LK T R R 0R-0 For NV R 0R-0 R For MH Q N00 R KR Q N00 LK T T LK P L TV NV_HYN MH_HYN NV_VYN Hsync & Vsync level shift R 0R-0 R R 0R-0 RT_VYN V_0 RT_HYN U 0 UV U THT R R JV_H RJ JV_V RJ V_0 RT_HYN RT_R RT_VYN For ystem RT U RT_ RT_ TV_RM_Y TV_L_Y TV_OMP_Y R 0RF R 0RF 0P 0 0P IN-UH P L IN-UH P L RM_ 0P0VJN L_ 0P0VJN OMP_ TVONN_ R 0R-0 MININ- Protection iode L_ V_0 VLT MH_VYN R THT PN00 R 0RF 0P IN-UH / 0P0VJN RM_ VLT VYN_ R RJ HYN_ R RJ VYN_ For ock RT HYN_ 0 Ohm close to connector MHz Low-Pass filter close to ONN OMP_ / VLT OM(+) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. RT onnector ize ocument Number Rev ustom NRY Thursday, January, 00 ate: heet of

15 V_UX_ RT_UX_ R0 H_PLP# 0MR HH-0-U U0VZY U 0 RT circuitry LP_L[0:] 0,, V_0 RT_X Y LP_L0 RT_X L[0]/FWH[0] P P0V RTX Y LP_L RTX L[]/FWH[] N LP_L T_ RT_RT# L[]/FWH[] N R0 0KRF LP_L LP_LRQ R0 RTRT# L[]/FWH[] N R0 HH-0-U R MR INTRUR# LP_LRQ#0 0KR INTVRMN LRQ[0]# N KR INTRUR# LP_LRQ RT_RT# LRQ[]#/PI[] P INTVRMN TP TP UV INTRUR# LFRM#/FWH[] P LP_LFRM# 0,, R _ Open R for othan step 0V_0 RT_N# HLK hunt for othan step RT_N# 0 _OUT 0T F K0T 0 F & all Yonah H_0M# 0R-0 _IN 0M# F F H_PULP# PULP# R LN_LK H_PULP#, R RJ R H_PRLP# PRLP# R LN_RTYN 0R-0 H_PRLP# PLP# H_PLP# 0KR LNRX[0] H_FRR_R LNRX[] FRR# F R0 RJ H_FRR# LNRX[] PUPWR/PO[] H_PWR, LNTX[0] RT LNTX[] INN# H_INN# LNTX[] INIT_V# ON FWH_INIT# INIT# F H_INIT# R Z_ITLK 0R-U 0 H_INTR R Z_YN_R Z_IT_LK INTR 0V_0, Z_YN RJ Z_YN KRIN# 0 RT_N# Z_RT#_R RIN# 000P0V R, Z_RT# RJ 0 Z_RT# NMI F H_NMI H_MI# T Z_TIN0 F Z_IN[0] MI# R0 00 0UVKX Z_TIN F0 RF Z_IN[] 0 H_TPLK# TP TP Z_IN[] TPLK# R R Z_TOUT_R H_THRMTRIP_R, Z_TOUT RJ Z_O THRMTRIP# PM_THRMTRIP-I#, T XTL-K-P X T_L# Layout Note: R needs to placed [0] I_P0 0 RJ TP TP TL# within " of IH, R must be placed [] I_P 0 within " of R w/o stub. T[0]RXN [] I_P 0 T_TXN0_ T[0]RXP I_P# 0 TP TP T_TXP0_ T[0]TXN # F I_P# 0 TP TP T[0]TXP # T[]RXN [0] I_P0 0 I_P 0 T_TXN_ T[]RXP [] F F I_P 0 TP TP T_TXP_ T[]TXN [] F I_P 0 TP TP T[]TXP [] I_P 0 RT_UX_ [] T_LKN [] I_P 0 T_LKP [] I_P 0 [] I_P 0 [] I_P 0 R TRI# F [] F TRI I_P 0 P.H. for internal VU_ [0] I_P0 0 [] I_P 0 [] I_P 0 I_P 0 INTVRMN 0 I_PIOR F IOR [] 0 INT_IRQ IIRQ [] I_P 0 0 I_PK# K# [] I_P 0 0 I_PIOW# IOW# 0 I_PIOR# IOR# RQ I_PRQ 0 R0 0R-0 IH-M 0 P0V RT LN LP PU T -/ZLI I 0V_0 NO_TUFF R00 OM(+) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IH-M ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

16 U Layout Note: PI coupling caps U V_0 need to be within 0 mils of the driver.,, PI_[..0] Need heckpm_ri# T PI_0 PI_RQ#0 RI# PRn[] H PI_RXN0 PI_ [0] RQ[0]# L PI_RQ#0 PI_RXP0 PI_NT#0 T0_R0 PI_ [] PI NT[0]# PI_NT#0 R 0KR PRp[] H F PI_TXN0 PI_RQ# T0_R PI_ [] RQ[]# PI_RQ# R 0KR PTn[] T[0]P/PI[] UV PI_TXP0 F T0_R PI_ [] NT[]# PI_NT# R 0KR PTp[] T[]P/PI[] UV F PI_RQ# PI_RQ# R 0KR T0_R T[]P/PI[0] F PI_ [] RQ[]# M T[]P/PI[] PRn[] K PI_RXN PI_ [] NT[]# F PI_NT# PI_RQ# PRp[] K PI_RXP F M_LK UV PI_ [] RQ[]# Y PI_TXN M_T UV PI_ NT[]# TP MLK PTn[] J [] W PI_TXP PI_RQ# M_LINK_LRT# PI_ RQ[]#/PI[0] F TP MT PTp[] J [] Y TP MLINK0 LINKLRT# PI_0 [] NT[]#/PO[] W TP TP00 PI_RQ# TP MLINK MLINK[0] PRn[] M PI_ [0] RQ[]#/PI[] U TP TP0 PI_NT# MH_YN# MLINK[] PRp[] M PI_ [] NT[]#/PO[] F TP TP PI_RQ# MH_YN# PTn[] L PI_ [] RQ[]#/PI[0] PI_NT# Z_PKR F TP TP PKR PTp[] L H PI_ [] NT[]#/PO[] PI_ [] 0, PM_U_TT# W PRn[] P TP TP U_TT#/LPP# J PI_/#0,, PI_ [] /[0]# J RT# PRp[] P TP TP K PI_/#,, PI_ [] /[]# H U PTn[] N TP TP Y_RT# K PI_/#,, PI_ [] /[]# PTp[] N TP TP0 PI_/#,, PI_ [] /[]# PM_MUY# MUY# L MI_RXN0 PI_0 [] MI[0]RXN T PI_IR#,, MI_RXP0 PI_ [0] IR# 0 I# Layout Note: PI_PR,, PI_ PR PI[] MI[0]RXP T H [] 0 MI# R MI_TXN0 H PI coupling caps PIRT#,,,,, MI_TXP0 PI_ PIRT# R R [] 0R-0 PI[] MI[0]TXN R M_LRT# MI[0]TXP R H need to be within 0 mils of the driver. PI_VL#,, PI_ [] VL# W MLRT#/PI[] PI_PRR#,, MI_RXN PI_ [] PRR# M PI_LOK# IH_PI MI_RXP PI_ PLOK# TP0 TP MI[]RXN V [] M PI[] MI[]RXP V PI_RR#,, PI_ [] RR# 0 WI# R PI[] MI[]TXN U MI_TXN K PI_TOP#,, MI_TXP PI_ [] TOP# J MI[]TXP U K PI_TR#,, PI_ [] TR# J PM_TPPI# TP_PI# MI_RXN PI_0 [] L R0 TP TP IH_PO MI[]RXN Y MI_RXP PI_ [0] PLT_RT#_ PO[] MI[]RXP Y K [] PLTRT# R 0R-0 PLT_RT#,,0,,,, MI_TXN PILK MI[]TXN W LK_IHPI, PM_TPPU# TP_PU# MI[]TXP W MI_TXP,, PI_FRM# J FRM# PM# P IH_PM#,0 Int. PH TP TP IH_PO 0 MI_RXN Interrupt I/F TP TP IH_PO PO[] MI[]RXN V_0 MI_RXP INT_PIRQ# INT_PIRQ# PO[] MI[]RXP N INT_PIRQ#, MI_TXN INT_PIRQ# INT_PIRQ# PIRQ[]# PIRQ[]#/PI[] L INT_PIRQF# INT_PIRQF# IH_PIO Place within 00 mils of IH MI_TXP INT_PIRQ# PIRQ[F]#/PI[] TP TP MI[]TXN PIRQ[]# V INT_PIRQ# PIO[] MI[]TXP M INT_PIRQ# INT_PIRQ# PIRQ[]# PIRQ[]#/PI[] L INT_PIRQH# TP TP IH_PIO LK_PI_IH# R PIRQ[]# PIRQ[H]#/PI[] M P TP0 TP IH_PIO PIO[] MI_LKN R RF LK_PI_IH PW_LR# PIO[] MI_LKP RRV T TP TP TP TP0 PIO[],,0, PM_LKRUN# TP TP RV[] RV[] F TP TP TP TP IH_PIO LKRUN# MI_ZOMP F TP TP RV[] RV[] F F0 F TP TP0 IH_PIO MI_IROMP_R V_ TP TP RV[] RV[] TP TP PIO[] TP TP MI_IROMP F RP PIO[] U_O# TP TP RV[] TP[] U 0 IH_WK# U_O# U_O# U_O# U_O# RV[] U WK# O[]#/PI[] U_O# U_O# U_O# O[]#/PI[0] U_O# U_O#0 U_O#,,0, INT_RIRQ 0 IH-M RIRQ O[]#/PI[] U_O# U_O# V_ V_0 O[]#/PI[] V_ IH Pullups THRM# 0 THRM# U_O#0 U_O#0 PM_RI# PI_RQ# O[0]# RP0K R 0KR R 0KR U_O#, VT_PWR F VRMPWR O[]# RP U_O# V_0 U_O# PI_IR# 0 M_LRT# PI_RQ# O[]# R 0KR R 0KR U_O# PI_TR# INT_PIRQ# LK_IH 0 LK O[]# INT_PIRQ# INT_PIRQF# M_LINK_LRT# R 0KR PI_RQ# R 0KR UPN0 PI_FRM# INT_PIRQ# LK_IH LK UP[0]N V_0 UPP0 PI_TOP# MLINK0 I# UPN V_0 R UP[0]P 0KR R 00KR RF PM_U_LK V UP[]N 0 R ULK UPP TP TP Z_PKR RP0K MLINK UP[]P 0 R 0KR TP TP,, PM_LP_#_IH T UP[]N LP_# UPN RP V_0 PI_VL# IH_WK# 0,,, PM_LP_# T UPP 0 R PM_LP_# LP_# UP[]P KR T UPN PI_LOK# PI_RQ# TP TP LP_# UP[]N UPP RF PI_PRR# INT_PIRQH# PM_TLOW#_R UP[]P TP TP R KR UPN PI_RR# PM_LKRUN# PWROK UP[]N TP TP R PWROK PI_NT# UPP PI_RQ# RT# R PM_PRLPVR_R UPN V_0 MI# R PM_PRLPVR 00R UP[]P R 0KR 0 00KR PRLPVR UP[]N UPP TP TP0 RP0K WI# R 00KR PM_TLOW#_R UP[]P V UPN TP TP UPN RF RP PW_LR# R UPP PI_NT# V_0 0KR TLOW# UP[]N R PI_RQ#0 0 PM_PWRTN# UPP 0 PWRTN#_IH- UP[]P U UPN INT_PIRQ# INT_RIRQ PWRTN# UP[]N UPP TP TP R INT_PIRQ# THRM# LN_RT# UP[]P R V TP TP PWROK INT_PIRQ# MH_YN# PM_LP_#_IH LN_RT# T- R PI_RQ# PM_LP_#,0,,0, URI# U_RI_PN 0KR V_0 0 RMRT#_K Y RMRT# URI 0R-0 RP0K R RF PM_PRLPVR_R R R IH-M Place within 00 mils of IH 00KR 0KR V_ R0 R KR T=ms wap RMRT#_TO_K 0 W ON RF Override NO_TUFF TUFF 0 K NL# R RT_RT# RF oot IO 00KR U0VZY PW_LR# OM(+).. NO_TUFF TUFF W-IP---U Q Low ctive Wistron orporation oot block - ON F,, ec., Hsin Tai Wu Rd., Hsichih, R (PI0) HW_HUT Taipei Hsien, Taiwan, R.O.. RT_RT# - ON R Password clear - ON (PIO) IH-M ( of ) ize ocument Number Rev T- PIO PI-XPR irect Media Interface POWR MT LOK U IH-M trapping Options RF RF FUNTION No Reboot FULT NO_TUFF NRY OPTIONL OVRRI TUFF ate: Thursday, January, 00 heet of

17 V_0 Layout Note: Place above caps within 00 mils of IH near F, P, V_0 U 0 U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- Layout Note: Place near pin tuff tuff tuff Not Not Not o o o V V F V V U T 0 V V U T0UVM U0VMX- U0VMX- U0VMX- V V U 0 V U 0 V V V U U0VMX- V T V F V T V F V V P F V V P V V M V V M Layout Note: V V L I decoupling V V L H V_0 V V L H V V L J LL NO_TUFF aps do V V L J not have layout 0 V V K Place within 00 requirements but if V_0 V V 0 K mils of IH pin V_0 layout allows then place V V L, next to IH NO_TUFF V L V V_ 0 M V_ V M 0 V V_ *Within a given well, VRF needs to be up before the N U0VMX- U0VMX- V V_ corresponding.v rail N Layout Note: V V_ N PI decoupling V V_ N V_0 V V_ N V V_ P Layout Note: V_0 V_0 V_0 NO_TUFF NO_TUFF NO_TUFF NO_TUFF V V_ P istribute in PI section V V_ P near pin - near -H V P V V_ P R R0 V_ M V R 0 V V_ L U0VMX- U0VMX- U0VMX- HH-0-U 0R T V V_ L T V_ J.R00.0F V U V_IH_ VRF_0 V V_ H U V_INT_ V_ H R V V V V_ 0R-U V V_ V W U0VZY V_ UV V W U0VMX- U0VMX- V_0 V Y V VU_ U Y V VU_ R V_INT_ V_ V_ V Place within 00 V VU_ V_0 mils of IH V Layout Note: R0 near pin V 0 0 V Place near IH V V F0 0 U0VMX- 0R V HH-0-U V U0VMX- U0VMX- V.R00.0F V VRF_ V V F Place both V_0 V V within 00 mils V V 0 of IH near Place within 00 V U0VZY mils of IH V UV V near pin V V V_PLL_IH_0 V V V_0 V V_PI_I V_0 R V V V R 0R-U V V_ V_IH_0 Place within 00 V V_ P F 0R-U mils of IH V U0VMX- Layout Note: 0UVMX V Place near Place within 00 V_IH_ VRF mils of IH V_0 VRF U VMIPLL VRF_0 M0IM-U V_ VRF_ V_IH_ 0UVKX VRF_U F V_0 V_IH_0 VTPLL VOUT R 0 Place within 00 V_ VUPLL mils of IH U0VMX- VU_ Place within 00 near, 0R-U VLN_/VU_ F mils of IH VLN_/VU_ VRT Place within 00 U0VMX- VLN_/VU_ V_INT_ U0VMX- V_ mils of IH VLN_/VU_ V_0 pin VLN_/VU_ VU_ VLN_/VU_ 0 U Place within 00 RT_UX_ VU_ V U0VMX- mils of IH Place within 00 VU_ V_PU_IO V pin 0 Layout Note: mils of IH VU_ V_PU_IO W Place near pin 0 U0VMX- VU_ V_PU_IO Y 0V_0 V_ VU_ 0 VU_ U0VMX- U0VMX- VU_ VU_ VU_ VU_ F U0VMX- Layout Note: OM(+) VU_ VU_ F F V_0 VU_ VU_ Place near Place within 00 U0VMX- U0VMX- VU_ VU_ mils of IH VU_ VU_ Wistron orporation 0 0 pin V_IH_ V_ F,, ec., Hsin Tai Wu Rd., Hsichih, IH-M R0 Taipei Hsien, Taiwan, R.O.. V_ V_VPU 0R-U 0R-U R Place within 00 IH-M ( of ) mils of IH Place within 00 ize ocument Number Rev U0VMX- U0VMX- pin V U0VMX- NO_TUFF NO_TUFF mils of IH pin NRY ate: Thursday, January, 00 heet of U0VMX- U0VMX- U0VMX- U0VMX- 0UVKX U0VMX- U0VMX- U0VMX- U0VMX- U0VMX- PI T OR I PI U OR U PI/I RF IN

18 U F Y V_ K suspend clock output F Y F Y F Y U W,0,,0, PM_LP_# O V W PM_U_LK R0 W KHZ Y _K W W NZ- 0R V V 0 V V R U 0KR U 0.. U U U T 0 T T T T T T T T T R R R V_0 R U 0 R R R R R,,0,,,, PLT_RT# RTRV#_ 0 R F R R F R THT F P R F P 0KR F0 P F P P P N PIRT# V to V level shift for H & ROM N N N N 0 N N N N M M 0 M M M M M M M L L 0 L L L K MU K 0 K K K V_ J V_0 V_0 J J J H H R R H RN0KJ RN KR KR Q N00 0 M_LK M_IH, IH-M M_T M_IH, Q & Q connect MLINK and MU in ) for Mus.0 Q compliance N00 OM(+).00.0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. IH-M ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

19 *Layout* mil FN_V V_0 FN_V *Layout* mil FN TY-ON- V_0 R 00RF etting T as 00 egree V_R =(((egree-)*0.0)+0.)*v *Layout* 0 mil V_0 V 0 LRT# _THRM# V_R V K M_K,0, M_K,0, _XP _XP _XN _XN ystem ensor Place near PU PWROK _RT# XP:0 egree XP:H/W etting XP: egree Place near chip as close as possible H_THRM H_THRM HW thermal shut down tempature setting degree. Put Near PU. V_0 UV 0 T- 00P0VKX 0U0VZY R KR 000P0V 0 UV R KRF R KRF U0VZY UV 0 0 UV U TLX 0 U V V XP XP XP LRT# THRM# THRM_T RT# FX FN F LK L N 0 P-LO P-LO 00P0VKX 00P0VKX 0P0VKX Q N0-U 0P0VKX Q 0 N0-U 00P0VKX R 0KR LRT# R 0R-0 THRM# HW Thermal Throttling V_UX_ R 0KR R THR_HUT# UMMY-R _THRM# / ummy when enhanced T function V_UX_ Q N00 INTRUR# V_UX_ U HW thermal shut down tempature setting degree. Put Near PU. R PU_THT KRF T_HW_HUT# OUT#: U T OUT# 0TU Hi active / mount R Low active / mount R 0 0UVKX V HYT R 0RF V_UX_ PU_TH_HYT R 0R-0 R V_UX_ V_UX_ R0 0KR T- U TLX-U T_HW_HUT# T_HW_HUT / HW_HUT U PUR_HW_HUTOWN TLX-U T- PUR_HW_HUTOWN / R 0KR PUR_HW_HUTOWN# 0, OM(+) R 00KR HW_HUT TLX-U Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. Thermal/Fan ontrollor ize ocument Number Rev ustom NRY ate: Thursday, January, 00 heet of

20 R 0R H onnector I_P I_P I_P0 I_P I_P I_P I_P I_P HL PI I_P I_P# V_0 UV H MH MH I_L# P-ONN--U UV 0U0VZY 0 0 0P0VJN R R PRTRV#_ RTRV#_ I_P RTRV#_ I_P V_0 I_P I_P I_P I_P I_P R R R I_P0 KR I_PRQ KR KR I_PIOW# I_PIOR# I_PIOR I_PK# INT_IRQ I_P I_P0 I_P# H_L# R KR V_0 FJTP HU-U PI H_L# ROM_L#_ V_0 R 0KR / _R ROM_V_0 Y_I0 Y_I 0U0VZY 0 MH PKR_L- PKR_L+ PKR_R- PKR_R PKR_L- PKR_L+ PKR_R- PKR_R+ ROM_P ROM_P ROM_P0 ROM_P ROM_P ROM_P ROM_P ROM_P ROM_PRQ ROM_PIOR# ROM_PK# Y_I0 Y_I ROM_P ROM_P# HK PI/I I# PIN -ROM onnector UV UV _ 00P0VJN 0 00P0VJN RTRV# R R ROM_P ROM_P ROM_P ROM_P ROM_P R ROM_P UMMY-R ROM_P ROM_P0 Type evice YI escription 0 _RT# ROM_PIOW# ROM_PIOR ROM_IRQ ROM_P ROM_P0 / ROM_P# ROM_L#_ R 0R-0 ROM_L#_ ON_Y_IN# ON_Y_IN# 0 ROM_PI R0 0R-0 ROM_PI V_0 ROM_V_0 0U0VZY T Y Option Table ROM_L# -ROM V-ROM -RW V+RW nd-h 0 N TTRY R _L _ HOT WP IRUIT TRI-TT WITH FOR ROM HOT WP / V_0 Layout 0 mil U OUT ON/OFF# IN IN Layout 0 mil V_0 R 0R-0 00P0VJN MH P-ONN0-0 P-LO ROM_V_0 R 0KR ON_Y_ON/OFF# 0U0VZY V_0 0 UV V_0 UV V_0 R00 00RF 0 ON_Y_ON/OFF# U V RT# V_0 _RT# 0 ON_Y_RT# Q HT U0VKX U THT ROM_V_0 _RT# MM R 0R-0 U T0IU--T R RTRV#_ 0R-0 0 ON_I_ON R 00KR / V_0 U0VKX R 0KR ROM_N# HT Q I_P0 I_P I_P I_P I_P I_P I_P I_P I_P I_P I_P0 I_P I_P I_P I_P I_P I_P0 I_P I_P ROM_N# ROM_N# 0 0 U N 0 N 0 PI V # 0 0 V # 0 0 ROM_N# ROM_P0 ROM_P ROM_P ROM_P ROM_P ROM_P ROM_P ROM_P ROM_P ROM_P ROM_N# ROM_P0 ROM_P ROM_P ROM_P ROM_P ROM_P ROM_P0 ROM_P ROM_P I_PIOR# I_PRQ I_PIOW# I_PIOR I_PK# INT_IRQ I_P# I_P# OM(+) U PI N V ROM_L# 0 # / / PI ROM_N# ROM_PI ROM_L#_ ROM_PIOR# ROM_PRQ ROM_PIOW# ROM_PIOR ROM_PK# ROM_IRQ ROM_P# ROM_P# Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. H and ROM ize ocument Number Rev NRY ate: Thursday, January, 00 heet 0 of

21 V_U_0 00 mil V_U_0 U PORT V_U_0 0 UV 000P0V 00 mil T T00UVM- V_0 R 0KR U V N#/N N#/N O# OUT OUT O# V_U_0 U_O#0 U_O# UPN0 UPP0 L LWHN00Q V_U_0 U_0- U_0+ U KT-U--U R 0 UV 0 000P0V T T00UVM- V_U_0 R V_U_0 00 mil UV 000P0V T T00UVM- V_0 R 0KR U IN IN N#/N PU OUT OUT OUT FL /0 Place near U U_O# UPN UPP / L V_U_0 U_- U_+ U KT-U--U LUTOOTH MOUL ONNTOR U V_0 LWHN00Q R R 0 T_NL N ON/OFF# IN OUT V_T_0 / V_U_0 T 0 T0-U / Place near T UPN UPP L LWHN00Q U_- U_+ U KT-U--U T_UX T_PIO T_PIO T_LINK_L V_T_0 TP TP TP TP UPN UPP UV R0 0R-0 R 0R-0 T_OX T_OX R R / MOLX-ON- M. ONNTOR MH M TP0 TP, Z_TOUT, Z_YN Z_TIN, Z_RT# Z_TOUT Z_YN R0 R TIN_ 0 Z_RT# MH P0VJN- MP-ONN TP TP V_LN TLK_M_ U0VZY R 00KR R 0R-0 UMMY- Z_TLK_M OM(+) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. U & M & TOOTH ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

22 V_LN_ V_ V_LN_ lose to Pin,Pin Need heck R is used only at LN_X R KR R RTL0() application 0RJ- VH V_LN_ R and only at is PI_[..0],, U _ used. LN_X K V VH I K L UV O I OR LM0 UMMY-R O 0 X V_LN_ M-W- XTL-MHZ- 0/00 R R V_LN_ 0/00 P0VJN P0VJN TRL TRL Q Q V_ V PT-U R R V_LN_ V KRF 0 0R-U LO TO LN HIP U0VZY-U MI0+ RFR R MI+ I max = 0 m V_LN_ R U R U HN# T IN OUT R R U0VZY U0VZY Vout =.*(+ R/R) PI_ MI0+ MI0+ PI 0 MI0- VL MI0- PT 0 V_LN_ VL 00 V V PI_ MI+ MI+ PI PI_ MI- VL MI- PI PI_ TRL VL PI PI_ TRL PI TRL V_LN_ VH V 0 PI_ VH PI R PI_/#0 PI_/#0,, V 0 Q0 0R-0 VH PT PT-U PI_ VL PI 0 PI_ 0/00 MI+ MI+ PI L0 MI- V_LN_ VL MI- MN PI_0 VL PI0 PI_ 00 0 PI 0 PI_ MI+ MI+ PI MI- VL MI- V 0 PI_ VL PI PI_ PT PI IOLT PT V IOLT# 0 PI_ LN_INT# V PI R V, INT_PIRQ# 0R-0 INT# V PI_/# V_LN_ V PI_/#,,,,,,, PIRT# PIRT# PR PI_PR,, V PLK_LN PILK RR# PI_RR#,, PI_NT# NT# N# R PI_RQ# 0 VH 0RJ- PM#_LN RQ# V PM# N# V_0 PI_ V V PI_PRR#,, V PI_0 PI PRR# 0 PI0 TOP# PI_TOP#,, PI_VL#,, PI_ VL# L 0/00 PI_TR#,, PI_ PI TR# PI PT R PT LKRUN# PM_LKRUN#,,0, KRF IOLT RFR R 0UVKX RFR R R KR RFR R 0UVKX Q,0 IH_PM# OM(+) PM#_LN MI+ RFR 0 MI- MI- RFR 0UVKX MI+ RFR R 0 MI0- MI- V_LN_ RFR 0UVKX K TU-U R0 UMMY-R K RTL0L- LN_RTT RT V_LN_,, PI_/# V_ V TRL PI_ PI_ TRL PI_ PI_ PI_/# V LN_IL PI_ R 00R PI_ LN_X XTL LN_X XTL PI_ PI_ VH VH 0 PT PI_0 V PI_ LN_T_L# V 00M_L# 0M_L# _L# L0 V L L L PI_ PI_ PI_ PI_/# PI_FRM# K V I O K V 0 I 0 PI PI V PI PI V IL PI PI PI PT PI0 V PI V PI PI PI FRM# IR# V PI_IR# V _ O 0 V 0 0 LNWK 0 PI_0 PI_ 0 0 PI0 PI PI_IR#,, PI_FRM#,, PI_/#,, 00M_L#, 0M_L# LN_T_L#, _L# U0VMX- U0VMX- PIN NM V VH V V VL V_P UV V_ UV UV 0L 00L (iga) (0/00) INL NM.. V_LN_. N.. VH.. V.. V_.. VL.. V_P LN RTL0L NRY Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ize ocument Number Rev ate: Thursday, January, 00 heet of UV UV UV UV UV UV UV UV

23 R0 0/00 _RTP _RTN XRF_R XRF_T _TTP0 _TTN0 0/00 VL 0/00 _TP MI+ 0 0 _TN MI- _TP MI+ _TN MI- 0 _RTP MI+ YTM _RTN V_LN_ MI- _TTP0 MI0+ _TTN0 MI0- R V_LN_ 0R-0 U T MT R TT MT RJ onnector MT 0R TT MT MT TT MT 0 MT V_LN_ TT MT _TP RJ- RJ _TN T+ MX+ RIN RJ- L LMH0N T- MX- MLXON TIP _TP RJ- TIP_ RIN _TN T+ MX+ 0 L RJ_ RJ- RIN_ RIN TIP T- MX- RJ_ LMH0N LN_L_YN R _RTP RP_RJ- LN_T_L# _RTN RN_RJ-, LN_T_L# 0R T+ MX+ TP_RJ- T- MX- RJ_ TN_RJ- RJ TTP0 TP_RJ- _TTN0 T+ MX+ TN_RJ- RP_RJ- T- MX- RJ_ o-layout with L RJ- RJ_ RJ- RJ_ For Modem able from M RN_RJ- RJ_ XFORM- RJ- RJ_ R R R R RJ- RJ_ R R R R 0M_L# LN_LINKL 00M_L# LN_TRMINL 00M_L#, 00M_L# 00M_L# KPKV KT-RJ+RJ-U R0 0/00 0 T- Link: reen - 0Mbps/0.b LN_T_L# U Orange - 00Mbps/0.a _L# 00M_L# _L# T-U Yellow - bps 0M_L# OM(+) ctivity: Yellow 0M_L# 0M_L# 0M_L# Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. 000P0V 000P0V 000P0V T- 0/00M Lan Transformer U R R T N N T T T 0/00 RX RX T N N T TX 0 TX RP_RJ- RN_RJ- TP_RJ- TN_RJ- iga Lan Transformer.route on bottom as differential pairs..tx+/tx- are pairs. Rx+/Rx- are pairs..no vias, No 0 degree bends..pairs must be equal lengths..mil trace width,mil separation..mil between pairs and any other trace..must not cross ground moat,except RJ- moat. reen L: peed 00: ON / peed 0:OFF Yellow L: Link: ON, TX/RX: Flash(0Hz) RJ signal must leave the other signal or power plane 00mil. O_TIP,O_RIN,TIP,RIN: W/ : urface layers Inner layers MI LN switch U PIL0 Function n to n n to n 0 N L V V V V V L L H _TP _TN _TP _TN _RTP _RTN _TTP0 _TTN0 OK_ON_ V_LN TP _TN _TP _TN OK _RTP _RTN _TTP0 _TTN0 U0VMX- OK_ON_ LN onnector ize ocument Number Rev ustom NRY ate: Thursday, January, 00 heet of

24 V_0 U of INT# RU INT# RU INT# INT# R RR W VP MFUN0 N INT_PIRQ# W0 U- VP MFUN M INT_PIRQ#,, PI_[..0] MFUN P INT_PIRQF# PI_ MFUN P INT_RIRQ,,0, U INT_PIRQ# V_0 PI_0 MFUN P V _MFUN PI_ 0 MFUN N R 0KR V _MFUN PI_ MFUN R R 0KR U PI_ W PI_ V PI_ LK_ M LK_RU U PI_ V V_PLL_0 PI_ V PI_ U PI_ R U- V R PI_0 V R P PI_ 0 V V W PI_ R V PI_ VPLL_ V Place it near to chip U PI_ PLL P 0R-0 R UV PI_ V PI_ VPLL_ T U * ll signals must be routed on top side only PI_ PLL T R * ifferential pairs of each ports should have equal trace length PI_ N R * tubs must be keep as short as possible PI_ V0 KR PI_0 R0 U U0 PI_ 0 R U R0 PI_ N0 _TPI0 PI_ TPI0 U V PI_ U _TP0P PI_ TP0P V R _TP0N PI_ TP0N W W PI_ V _TP0P ypass/ecupoling apacitors PI_ TP0P V U _TP0N PI_ TP0N W N hould be places as close to PI_0 W R KR 0 PHY_TT_M R P M V_0 PI as possible R R R R,, PI_/#0 W R0 KR /0# N P RF RF RF RF,, PI_/# W /#,, PI_/# W /# XO R V_0,, PI_/# W /# XI R P0VJN X P0(TT) R X-M-,, PI_PR P PR P(TT) U 0,, PI_FRM# V FRM# P(TT) V R 0 0P0VJN 0,, PI_TR# R KR TR# U0VKX 000P0V UV UV,, PI_IR# U IR#,, PI_TOP# W R0 P0VJN TOP# N,, PI_VL# N V_0 PI_ R 00R VL# U W IL U 0KR P[:0],, PI_PRR# V PRR# 0 V_0,, PI_RR# U RR# TPI U W PI_RQ#0 U RQ# PI_NT#0 T NT# TPP V PLK_PM P PLK TPN W,,, PIRT# R PRT# T R KR UV R 0R-0 RT# TPP V R 000P0V UV,0 U_PM# T KR RI_OUT#/PM# TPN W UV UV V_0 R R R 0KR UPN# M_PWR_TRL-0 0R-0 M_PWR_TRL# M_PWR_TRL_0 F M_PWR_TRL- TP V_0 _T N U- T M_PWR_TRL_ F TP _LOK L LOK _LTH N LTH PI_PKR L PKROUT _# _#? V_0 M_# F M_# M/M_pro M_# F M_LK M_LK/_LK/M_L_WP# UV UV R _U_N# M_/_M/M_W# F M KR U-0 _U_N# V_0 M_T/_T/M_ H M_ M M_T/_T/M_ M_ M/M_pro M U- L M_T/_T/M_ M_ V_0 TP TP TP TP TP R 0R-0 TP TP OM(+) _MFUN Q0 R TP W N#W T RV P TT0 L RV L RV K RV K RV K RV L RV L RV PI UNU TRMINL R U U- U- /IO M_IO(T0)/_T0/M_0 _LK/M_R# J _M/M_L J _T0/M_ H _T/M_ J _T/M_ J _T/M_ J _WP/M_ H M_L J M_R/# K M_PHY_WP# K MIO _WP _# X M_PWR_TRL# R 0KR V_0 R 0KR Q HT M_PWR_TRL V_0 R00 0R-U 0U0VZY V_PLL_0 Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. TI PI HK ( of ) ize ocument Number Rev NRY 000P0V ate: Thursday, January, 00 heet of U0VZY

25 Power switch VPP_KT_0 V_KT_0 V_KT_0 of 0 U U _[0..] of _[0..] V 0UVKX RV V RV K _0 RV _/_0 _ RV _0/ RV _/ RV _/ 0 RV _/_0 _0 RV _/_0 _ RV _/ RV _/ RV _/ RV _/ RV U V_KT_0 _/ RV F _0/ RV H _T _ RV H T V _/ LOK U- _ RV LOK V 0 _/ LTH _ RV K LTH _/_,,,,, PIRT# RV L RT# _/_ 0 V_0 VPP_KT_0 _/_IOWR# IOWR# RV K 0KR HN# VPP V_0 _/_ RV L R0 _/_IOR# IOR# RV L RV L.V O# _/_ U- V_0 _/_O# _O# RV L _0/_# _0 _# RV M _ RV M V _/_0 U0VZY _/ RV M V N _/ RV N N _/_ F _ RV N N _/ RV N 0 V N 0 _/ RV M U0VZY V N _/ RV P N _/ RV P N _/ RV P N N _0/_ RU RU RV F _/#/_R# _R# _ RV TP0 _/#/_ F _ RV K _/#/_ 0 RV M _/0#/_# _# _ RV K _PR/_ 0 _ RV _FRM#/ RV H _TR#/ RV J _IR#/ 0 RV J V_0 _TOP#/_0 _ RV H _VL#/ RV J _LOK#/_ 0 U of V_0 _ RV J _PRR#/_ F0 RV H V _RR#/_WIT# _WIT# H RV V H0 _INPK# RV J V _RQ#/_INPK# H V VR_PORT M _NT#/_W# _W# H RV F V VR_PORT H R J _V# RV V _TH/_V(TH#/RI#) M _WP _ RV H V _LKRUN#/_WP(IOI#) J V VR_N# H _LK/_ M R0 R RV V M0 _INT#/_R(IRQ#) _R RV F V M R _RT#/_RT _RT RV V K V K 0R-0 from spec : this pin is _UIO/_V(PKR#) _V# RV N V N active low RV V _#/_# _# RV _#/_# _# RV F _V/_V# _V# _V/_V# _V# RV N _ RV H _RV/ RV K J _RV/_ J0 Place it near to chip RV/_ 0 J PI K K0 U- K PI L L L0 L L M OM(+) PI POWR TRMINL UV UV UV R 00KR UV Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. TI PI HK ( of ) ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

26 U PMI ocket onnector # 0 _# 0 _# V_KT_0 _O# _V# _ 0 _IOR# _ ardbus I/F _IOWR# [0..] [0..] _ U IOR# L IOWR# _TP0P _O# _W# _W# TP0+ 000P0V _0 _R# TP0- _TP0N _R LWN00Q-U TP0+ R 0 L _WP TP0- VPP_KT_0 _RT _TP0P _WIT# _INPK# _TP0N MLX-ONN-R-U _ LWN00Q-U # _ 0 _# U _V# V# # # _V# V# _V# _RT _ /MM/M ONN. _V# _0 UMMY- _V# V_R_0 _0 0 KT MH _0 M WP M_ lock termination _# M_LK R M_LK_R M MHz clock for -bit M_LK 0R-0 M_ M_ M_# ardbus card I/F V_KT_0 M_# R R-KT-U M_ M LK_R M_LK PMI--U MIO MIO 0R-0 M_ M_ MIO M M M_ R 0 UMMY-R MH K _# _# 0 _WP _WP R0 _WIT# UMMY-R INPK# 0 R# Place close to pin. _ 0U0VZY UV 0 UV 0U0VZY RU-KT U0VZY 0UVKX U POWR WITH V_0 V_R_0 M_PWR_TRL N ON/OFF# OUT IN T0-U OM(+).00.0F 0 U0VZY UV Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. PMI LOT / ONN. ize ocument Number Rev NRY ate: Thursday, January, 00 heet of

27 PI_PKR 0 PI_PKR R L UIO O U0VZY KR Z_PKR Z_PKR R0 UIO_P UIP_P_P U0VZY KR U0VMX- 0 K_P R 0 U0VZY R 0R-U _ K_P R 00P0VKX R_ U0VZY R_ R0 0R-U _R _R 0 U0VZY KR KRJ L_ U0VZY L_ R 0R-U _L _L 0, Z_RT# MI_IN, Z_YN 0 OUNR _TLK YN FRONT-OUT-R OUNL OUNR ITLK FRONT-OUT-L OUNL R U0VZY O_XTLL LININ_R LIN_IN_R XTLL LIN-R LIN_IN_R LININ_L LIN_IN_L J0/PIO0 LIN-L LIN_IN_L U0VZY UMMY-R 000P0V 000P0V PON, Z_TOUT Z_TIN0 _IN OUT URR-OUT-R R R IN URR-OUT-L F- 0PF 0PPM _XTLOUT _XTLIN V_0 PIF U0VMX- _# PIF V_0 VRFOUT FLT FLT VR VRFOUT 000P0V 000P0V U0VZY 0 0 U0VZY UV ias Voltage ource U0VZY UV L_VRF L_VRF _# Reserved for MI OP+V POWR NRT U0VZY V_0 RT# PHON P-P LF-OUT N-OUT MONO-OUT-R - -R 0 -L MI MI U L-U MI R R0 R 00KR 00KR 00KR MI_IN U0VZY P0VJN- P0VJN- X X-MHZ--U U0VMX- PIFI/P PIFO XTL-OUT XTL-IN U0VMX- 0 U0VMX- V V V V N#0 N# 0 FRONT-MI VRFOUT VRF VR VR FILT FILT 0 J/PIO J UX-R UX-L R R Q R U HN# T IN OUT -0TU- U0VZY V_0 R0 KRF P0VJN- V_TPIN R0 *Layout* 0 mil 0KRF 0 UVZY _TLK Z_RT# U V Y R _TLK 0R-0 V_0 R R R R MI_IN Z_ITLK Z_TLK_M VRFOUT R OM(+) Wistron orporation F,, ec., Hsin Tai Wu Rd., Hsichih, Taipei Hsien, Taiwan, R.O.. ' O - L ize ocument Number Rev NRY ate: Thursday, January, 00 heet of