University of Pennsylvania Department of Electrical and Systems Engineering ESE 319 Microelectronic Circuits. Final Exam 10Dec08 SOLUTIONS


 Austin Jenkins
 1 years ago
 Views:
Transcription
1 University of Pennsylvania Department of Electrical and Systems Engineering ESE 319 Microelectronic Circuits Final Exam 10Dec08 SOLUTIONS This exam is a closed book exam. Students are allowed to use a calculator and a single page reference sheet (two sided). Please show all work, justify all approximations and give the units for all calculated parameters. 1. In the circuit given in Fig. P1 let V CC 1 V, I E1 10 ma, V R3 1.7 V, I R1 1 ma and R 1 kω. Transistors Q 1 and Q are matched and assumed to be forward active such that V BE1 V BE 0.7 V and β 1 β very large. Also, V CEsat 0 V for both Q 1 and Q. (40 pts) Fig. P1 a. Determine the values of resistors R E, R 1 and R 3. (10 pts) b. Determine the voltage gain of the Q amplifier stage v o /v i. (10 pts) c. Let v O1 V O1 + V o1 sin ωt, determine the value of V O1 that will permit the largest signal swing, and determine maximum value of V o1. d. Determine the value of R C that permits the largest peaktopeak signal swing. e. Determine the voltage gain of the overall amplifier v o1 /v i. (10 pts) SOLUTION: a. Determine the values of resistors R E, R 1 and R 3. R 3 V R3 1.7V I R1 1mA 1.7k! V RE 1.7V! 0.7V 1.0V " R E V RE 1V I E 10mA 100# V R I R1 * R 1mA *1k! 1V " V B1 1.7V + 1V.7V
2 R 1 1V!.7V 1mA 9.3k" b. Determine the voltage gain of the Q amplifier stage v o /v i. G Q v o v i! " R in1 R E v o v e1!r " i b1 where i b1 i e1! + 1 i c! + 1 " v # r $ e1! + 1 i r i e1 e e1 R in1 v e1!i e1 r e " G Q! r e R E! V T / I E 100#!.5 100!0.05 V / V c. Let v O1 V O1 + V o1 sin ωt, determine the value of V O1 that will permit the largest signal swing, and determine maximum value of V o1. For Q to remain forwardactive V CE1 V O1! V O > V CEsat 0 where V O V B1! V BE.7V! 0.7V V " V # v O1 # V CC 1V 1V! V V o1max 5V " v O sin#t 1V! V To allow for maximum signal swing V O1 + V 7V d. Determine the value of R C that permits the largest peaktopeak signal swing. 1V! V 1V! 7V V O1 + V 7V V CC! I C R C " R C 10mA 500# e. Determine the voltage gain of the overall amplifier v o1 /v i. i c i e1!i b!v i r " +! + 1 ( ) R E! v i R E
3 3 v o1!i c1 R C!i c R C " G Q1 v o1 v i! R C R E! !5 V / V. The following set of questions require brief, to the point answers. (0 pts) a. Draw the schematic for the Widlar current source, and relate its advantages to a current sources implemented using a conventional current mirror. b. A closedloop amplifier with loopgain A(s)! F is unstable for large values of Γ F where the closedloop gain approaches unity. Describe a design solution to stabilizing the closedloop amplifier. c. The allpass (AP) filter plays an important role in data communications. Write the gain function G(s) for a nd order AP filter in terms of ω 0, Q and dc gain K. Sketch the gain G(jω) and phase φ(jω) vs. frequency d. The Sallen and Key LP stage where R 1 C 1 R C RC has a symbolic gain function ( ) K 1 / RC G(s) s + 3! K RC s + " 1 % # $ RC & ' design?. What are the practical advantages and disadvantages of this LP stage Qualitative Descriptions do not involve specific numerical calculations and are largely accomplished with text. Descriptive adjectives like small or large are appropriate to use. Also appropriate are comparative phrases that involve approximately, less than, greater than, etc. If helpful to your description, you are welcome to use an equation and/or a sketch. SOLUTION: a. Draw the schematic for the Widlar current source, and relate its advantages to a current sources implemented using a conventional current mirror. Advantages: 1. Much increased output impedance
4 4. Low current can be realized with smaller resistors. b. A closedloop amplifier with loopgain A(s)! F is unstable for large values of Γ F where the closedloop gain approaches unity. Describe a design solution to stabilizing the closedloop amplifier. Compensation of A(s) in order to pull the lowest frequency pole to a lower frequency. Miller compensation pulls the lowest frequency pole lower and the highest frequency pole higher, i.e. ploe splitting. High frequency gain is traded for stability. c. The allpass (AP) filter plays an important role in data communications. Write the gain function G(s) for a nd order AP filter in terms of ω 0, Q and dc gain K. Sketch the gain G(jω) and phase φ(jω) vs. frequency G(s) # K s! " 0 Q s + " & 0 $ % ' ( s + " 0 Q s + " 0 d. The Sallen and Key LP stage where R 1 C 1 R C RC has a symbolic gain function ( ) K 1 / RC G(s) s + 3! K RC s + " 1 % # $ RC & ' design?. What are the practical advantages and disadvantages of this LP stage 1. Advantage: ω 0 1/RC, Q 1/(3K) > component spreads independent of Q.. Disadvantage: sensitivities high for highq, i.e. high Q > K > 3 realized by the small difference of two large numbers.
5 3. Consider the power amplifier stage in Fig. P. (40 pts) 5 Fig. P a. Let V BB be a variable. Draw the v O vs v I voltage transfer characteristic (VTC), labeling all key points on the VTC. State the condition for zero crossover distortion. (10 pts) b. The operation of the class AB stage is based on a basic conservation relationship between i N and i P. Derive this relationship from the constant basetobase voltage condition. (10 pts) Design the quiescent current of the class AB power amplifier in Fig. P so that the smallsignal voltage gain v O /v I near the origin of the VTC is greater than or equal to 0.99 for loads R L 100 Ω. Let I S E14 A for both Q N and Q P and V CC 1V. c. Determine the R out and quiescent current I Q. (10 pts) d. Determine the value of V BB. (10 pts) SOLUTION: a. Let V BB be a variable. Draw the v O vs v I voltage transfer characteristic (VTC), labeling all key points on the VTC. For v I > 0: v O v I! v BEN + V BB Q N saturates when v O > V CC! V CENsat For v I < 0: v O v I + v EBP! V BB Q P saturates when v O <!V CC + V ECPsat
6 6 The crossover distortion is nulled when V BB V BEN V EBP! V BB V BEN + V EBP b. The operation of the class AB stage is based on a basic conservation relationship between i N and i P. Derive this relationship from the constant basetobase voltage condition.
7 7 c. Determine the R out and quiescent current I Q. R L G v o! 0.99 for R L! 100" # v i R out + R L 0.99R out 100! " 99! # R out 1! R L R out + R L 0.99 with R L 100 Ω. At v O! 0V i N i P I Q " R out r en r ep V T i N + i P V T I Q I Q V T R out 1.5mA d. Determine the value of V BB.
8 8 V BB V I Q I S e T! V BB V T ln I Q I S 0.05ln 1.5E E V
Class AB Output Stage
Class AB Output Stage Class AB amplifier Operation Multisim Simulation  VTC Class AB amplifier biasing Widlar current source Multisim Simulation  Biasing 1 Class AB Operation v I V B (set by V B ) Basic
More informationESE319 Introduction to Microelectronics. Output Stages
Output Stages Power amplifier classification Class A amplifier circuits Class A Power conversion efficiency Class B amplifier circuits Class B Power conversion efficiency Class AB amplifier circuits Class
More informationOPERATIONAL AMPLIFIER APPLICATIONS
OPERATIONAL AMPLIFIER APPLICATIONS 2.1 The Ideal Op Amp (Chapter 2.1) Amplifier Applications 2.2 The Inverting Configuration (Chapter 2.2) 2.3 The Noninverting Configuration (Chapter 2.3) 2.4 Difference
More informationBipolar Junction Transistor (BJT)  Introduction
Bipolar Junction Transistor (BJT)  Introduction It was found in 1948 at the Bell Telephone Laboratories. It is a three terminal device and has three semiconductor regions. It can be used in signal amplification
More informationECE342 Test 3: Nov 30, :008:00, Closed Book. Name : Solution
ECE342 Test 3: Nov 30, 2010 6:008:00, Closed Book Name : Solution All solutions must provide units as appropriate. Unless otherwise stated, assume T = 300 K. 1. (25 pts) Consider the amplifier shown
More informationBJT Biasing Cont. & Small Signal Model
BJT Biasing Cont. & Small Signal Model Conservative Bias Design (1/3, 1/3, 1/3 Rule) Bias Design Example SmallSignal BJT Models SmallSignal Analysis 1 Emitter Feedback Bias Design R B R C V CC R 1 R
More informationECE Circuit Theory. Final Examination. December 5, 2008
ECE 212 H1F Pg 1 of 12 ECE 212  Circuit Theory Final Examination December 5, 2008 1. Policy: closed book, calculators allowed. Show all work. 2. Work in the provided space. 3. The exam has 3 problems
More informationCARLETON UNIVERSITY. FINAL EXAMINATION December DURATION 3 HOURS No. of Students 130
ALETON UNIVESITY FINAL EXAMINATION December 005 DUATION 3 HOUS No. of Students 130 Department Name & ourse Number: Electronics ELE 3509 ourse Instructor(s): Prof. John W. M. ogers and alvin Plett AUTHOIZED
More informationUNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences
UNIVERSITY OF CALIFORNIA College of Engineering Department of Electrical Engineering and Computer Sciences E. Alon Final EECS 240 Monday, May 19, 2008 SPRING 2008 You should write your results on the exam
More information55:041 Electronic Circuits The University of Iowa Fall Final Exam
Final Exam Name: Score Max: 135 Question 1 (1 point unless otherwise noted) a. What is the maximum theoretical efficiency for a classb amplifier? Answer: 78% b. The abbreviation/term ESR is often encountered
More informationESE319 Introduction to Microelectronics Common Emitter BJT Amplifier
Common Emitter BJT Amplifier 1 Adding a signal source to the single power supply bias amplifier R C R 1 R C V CC V CC V B R E R 2 R E Desired effect addition of bias and signal sources Starting point 
More informationCircle the one best answer for each question. Five points per question.
ID # NAME EE255 EXAM 3 November 8, 2001 Instructor (circle one) Talavage Gray This exam consists of 16 multiple choice questions and one workout problem. Record all answers to the multiple choice questions
More informationChapter 3 Output stages
Chapter 3 utput stages 3.. Goals and properties 3.. Goals and properties deliver power into the load with good efficacy and small power dissipate on the final transistors small output impedance maximum
More information6.012 Electronic Devices and Circuits Spring 2005
6.012 Electronic Devices and Circuits Spring 2005 May 16, 2005 Final Exam (200 points) OPEN BOOK Problem NAME RECITATION TIME 1 2 3 4 5 Total General guidelines (please read carefully before starting):
More information6.012 Electronic Devices and Circuits
Page 1 of 12 YOUR NAME Department of Electrical Engineering and Computer Science Massachusetts Institute of Technology 6.012 Electronic Devices and Circuits FINAL EXAMINATION Open book. Notes: 1. Unless
More informationElectronics II. Final Examination
The University of Toledo f17fs_elct27.fm 1 Electronics II Final Examination Problems Points 1. 11 2. 14 3. 15 Total 40 Was the exam fair? yes no The University of Toledo f17fs_elct27.fm 2 Problem 1 11
More informationESE319 Introduction to Microelectronics. Feedback Basics
Feedback Basics Stability Feedback concept Feedback in emitter follower Onepole feedback and root locus Frequency dependent feedback and root locus Gain and phase margins Conditions for closed loop stability
More informationCE/CS Amplifier Response at High Frequencies
.. CE/CS Amplifier Response at High Frequencies INEL 4202  Manuel Toledo August 20, 2012 INEL 4202  Manuel Toledo CE/CS High Frequency Analysis 1/ 24 Outline.1 High Frequency Models.2 Simplified Method.3
More informationECE343 Test 2: Mar 21, :008:00, Closed Book. Name : SOLUTION
ECE343 Test 2: Mar 21, 2012 6:008:00, Closed Book Name : SOLUTION 1. (25 pts) (a) Draw a circuit diagram for a differential amplifier designed under the following constraints: Use only BJTs. (You may
More informationQuick Review. ESE319 Introduction to Microelectronics. and Q1 = Q2, what is the value of V Odm. If R C1 = R C2. s.t. R C1. Let Q1 = Q2 and R C1
Quick Review If R C1 = R C2 and Q1 = Q2, what is the value of V Odm? Let Q1 = Q2 and R C1 R C2 s.t. R C1 > R C2, express R C1 & R C2 in terms R C and ΔR C. If V Odm is the differential output offset
More informationKOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU  Control and Automation Dept. 1 4 DC BIASING BJTS (CONT D II )
KOM2751 Analog Electronics :: Dr. Muharrem Mercimek :: YTU  Control and Automation Dept. 1 4 DC BIASING BJTS (CONT D II ) Most of the content is from the textbook: Electronic devices and circuit theory,
More informationElectronic Circuits Summary
Electronic Circuits Summary Andreas Biri, DITET 6.06.4 Constants (@300K) ε 0 = 8.854 0 F m m 0 = 9. 0 3 kg k =.38 0 3 J K = 8.67 0 5 ev/k kt q = 0.059 V, q kt = 38.6, kt = 5.9 mev V Small Signal Equivalent
More informationLecture 7: Transistors and Amplifiers
Lecture 7: Transistors and Amplifiers Hybrid Transistor Model for small AC : The previous model for a transistor used one parameter (β, the current gain) to describe the transistor. doesn't explain many
More informationHomework Assignment 09
Homework Assignment 09 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. What is the 3dB bandwidth of the amplifier shown below if r π = 2.5K, r o = 100K, g m = 40 ms, and C L =
More informationLecture 37: Frequency response. Context
EECS 05 Spring 004, Lecture 37 Lecture 37: Frequency response Prof J. S. Smith EECS 05 Spring 004, Lecture 37 Context We will figure out more of the design parameters for the amplifier we looked at in
More informationID # NAME. EE255 EXAM 3 April 7, Instructor (circle one) Ogborn Lundstrom
ID # NAME EE255 EXAM 3 April 7, 1998 Instructor (circle one) Ogborn Lundstrom This exam consists of 20 multiple choice questions. Record all answers on this page, but you must turn in the entire exam.
More informationBJT Biasing Cont. & Small Signal Model
BJT Biasing Cont. & Small Signal Model Conservative Bias Design Bias Design Example Small Signal BJT Models Small Signal Analysis 1 Emitter Feedback Bias Design Voltage bias circuit Single power supply
More informationOperational Amplifiers
Operational Amplifiers A Linear IC circuit Operational Amplifier (opamp) An opamp is a highgain amplifier that has high input impedance and low output impedance. An ideal opamp has infinite gain and
More informationGeorgia Institute of Technology School of Electrical and Computer Engineering. Midterm1 Exam (Solution)
Georgia Institute of Technology School of Electrical and Computer Engineering Midterm1 Exam (Solution) ECE6414 Spring 2012 Friday, Feb. 17, 2012 Duration: 50min First name Solutions Last name Solutions
More informationBiasing the CE Amplifier
Biasing the CE Amplifier Graphical approach: plot I C as a function of the DC baseemitter voltage (note: normally plot vs. base current, so we must return to EbersMoll): I C I S e V BE V th I S e V th
More informationESE319 Introduction to Microelectronics. BJT Biasing Cont.
BJT Biasing Cont. Biasing for DC Operating Point Stability BJT Bias Using Emitter Negative Feedback Single Supply BJT Bias Scheme Constant Current BJT Bias Scheme Rule of Thumb BJT Bias Design 1 Simple
More informationDESIGN MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OPAMP CMOS CIRCUIT. Dr. Eman Azab Assistant Professor Office: C
MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OPAMP CMOS CIRCUIT DESIGN Dr. Eman Azab Assistant Professor Office: C3.315 Email: eman.azab@guc.edu.eg 1 TWO STAGE CMOS OPAMP It consists of two stages: First
More informationWhereas the diode was a 1junction device, the transistor contains two junctions. This leads to two possibilities:
Part Recall: two types of charge carriers in semiconductors: electrons & holes two types of doped semiconductors: ntype (favor e), ptype (favor holes) for conduction Whereas the diode was a junction
More informationChapter 10 Feedback. PART C: Stability and Compensation
1 Chapter 10 Feedback PART C: Stability and Compensation Example: Noninverting Amplifier We are analyzing the two circuits (nmos diff pair or pmos diff pair) to realize this symbol: either of the circuits
More informationESE319 Introduction to Microelectronics. Feedback Basics
Feedback Basics Feedback concept Feedback in emitter follower Stability Onepole feedback and root locus Frequency dependent feedback and root locus Gain and phase margins Conditions for closed loop stability
More informationPHYS225 Lecture 9. Electronic Circuits
PHYS225 Lecture 9 Electronic Circuits Last lecture Field Effect Transistors Voltage controlled resistor Various FET circuits Switch Source follower Current source Similar to BJT Draws no input current
More informationUniversity of Toronto. Final Exam
University of Toronto Final Exam Date  Dec 16, 013 Duration:.5 hrs ECE331 Electronic Circuits Lecturer  D. Johns ANSWER QUESTIONS ON THESE SHEETS USING BACKS IF NECESSARY 1. Equation sheet is on last
More informationBiasing BJTs CHAPTER OBJECTIVES 4.1 INTRODUCTION
4 DC Biasing BJTs CHAPTER OBJECTIVES Be able to determine the dc levels for the variety of important BJT configurations. Understand how to measure the important voltage levels of a BJT transistor configuration
More informationCHAPTER.4: Transistor at low frequencies
CHAPTER.4: Transistor at low frequencies Introduction Amplification in the AC domain BJT transistor modeling The re Transistor Model The Hybrid equivalent Model Introduction There are three models commonly
More informationUNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences
UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE 105: Microelectronic Devices and Circuits Spring 2008 MIDTERM EXAMINATION #1 Time
More informationElectronics II. Midterm II
The University of Toledo f4ms_elct7.fm  Section Electronics II Midterm II Problems Points. 7. 7 3. 6 Total 0 Was the exam fair? yes no The University of Toledo f4ms_elct7.fm  Problem 7 points Given in
More informationECE 201 Fall 2009 Final Exam
ECE 01 Fall 009 Final Exam December 16, 009 Division 0101: Tan (11:30am) Division 001: Clark (7:30 am) Division 0301: Elliott (1:30 pm) Instructions 1. DO NOT START UNTIL TOLD TO DO SO.. Write your Name,
More informationHomework Assignment 08
Homework Assignment 08 Question 1 (Short Takes) Two points each unless otherwise indicated. 1. Give one phrase/sentence that describes the primary advantage of an active load. Answer: Large effective resistance
More informationEE214 Early Final Examination: Fall STANFORD UNIVERSITY Department of Electrical Engineering. SAMPLE FINAL EXAMINATION Fall Quarter, 2002
STANFORD UNIVERSITY Department of Electrical Engineering SAMPLE FINAL EXAMINATION Fall Quarter, 2002 EE214 8 December 2002 CLOSED BOOK; Two std. 8.5 x 11 sheets of notes permitted CAUTION: Useful information
More informationCHAPTER 13. Solutions for Exercises
HPT 3 Solutions for xercises 3. The emitter current is gien by the Shockley equation: i S exp VT For operation with i, we hae exp >> S >>, and we can write VT i S exp VT Soling for, we hae 3.2 i 2 0 26ln
More informationECE 6412, Spring Final Exam Page 1 FINAL EXAMINATION NAME SCORE /120
ECE 6412, Spring 2002 Final Exam Page 1 FINAL EXAMINATION NAME SCORE /120 Problem 1O 2O 3 4 5 6 7 8 Score INSTRUCTIONS: This exam is closed book with four sheets of notes permitted. The exam consists of
More informationEE202 Exam III April 13, 2015
EE202 Exam III April 3, 205 Name: (Please print clearly.) Student ID: CIRCLE YOUR DIVISION DeCarlo7:308:30 Furgason 3:304:30 DeCarlo:302:30 202 2022 2023 INSTRUCTIONS There are 2 multiple choice
More informationHomework 6 Solutions and Rubric
Homework 6 Solutions and Rubric EE 140/40A 1. KW Tube Amplifier b) Load Resistor e) Commoncathode a) Input Diff Pair f) CathodeFollower h) Positive Feedback c) Tail Resistor g) Cc d) Av,cm = 1/ Figure
More informationInput Stage. V IC(max) V BE1. V CE 5(sat ) V IC(min) = V CC +V BE 3 = V EE. + V CE1(sat )
BJT OPAMPs Input Stage The input stage is similar to MOS design. Take a pnp input stage (Q1 Q2) with npn current mirror load (Q3 Q4) and a pnp tail current source (Q5). Then, V IC(max) = V CC V BE1 V
More informationECE2210 Final given: Spring 08
ECE Final given: Spring 0. Note: feel free to show answers & work right on the schematic 1. (1 pts) The ammeter, A, reads 30 ma. a) The power dissipated by R is 0.7 W, what is the value of R. Assume that
More informationChapter 2 SwitchedCapacitor Circuits
Chapter 2 SwitchedCapacitor Circuits Abstract his chapter introduces SC circuits. A brief description is given for the main building blocks of a SC filter (operational amplifiers, switches, capacitors,
More informationECE137B Final Exam. There are 5 problems on this exam and you have 3 hours There are pages 119 in the exam: please make sure all are there.
ECE37B Final Exam There are 5 problems on this exam and you have 3 hours There are pages 9 in the exam: please make sure all are there. Do not open this exam until told to do so Show all work: Credit
More informationMod. Sim. Dyn. Sys. Amplifiers page 1
AMPLIFIERS A circuit containing only capacitors, amplifiers (transistors) and resistors may resonate. A circuit containing only capacitors and resistors may not. Why does amplification permit resonance
More informationUNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences
UNIVERSITY OF CALIFORNIA, BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EECS 40 Spring 2000 Introduction to Microelectronic Devices Prof. King MIDTERM EXAMINATION
More informationEE202 Exam III April 6, 2017
EE202 Exam III April 6, 207 Name: (Please print clearly.) Student ID: CIRCLE YOUR DIVISION DeCarlo202 DeCarlo2022 7:30 MWF :30 TTH INSTRUCTIONS There are 3 multiple choice worth 5 points each and
More informationMod. Sim. Dyn. Sys. Amplifiers page 1
AMPLIFIERS A circuit containing only capacitors, amplifiers (transistors) and resistors may resonate. A circuit containing only capacitors and resistors may not. Why does amplification permit resonance
More informationTransistor amplifiers: Biasing and Small Signal Model
Transistor amplifiers: iasing and Small Signal Model Transistor amplifiers utilizing JT or FT are similar in design and analysis. Accordingly we will discuss JT amplifiers thoroughly. Then, similar FT
More informationECE 2210 Final given: Spring 15 p1
ECE 2 Final given: Spring 15 Closed Book, Closed notes except preprinted yellow sheet, Calculators OK. Show all work to receive credit. Circle answers, show units, and round off reasonably 1. (15 pts)
More informationAssignment 3 ELEC 312/Winter 12 R.Raut, Ph.D.
Page 1 of 3 ELEC 312: ELECTRONICS II : ASSIGNMENT3 Department of Electrical and Computer Engineering Winter 2012 1. A commonemitter amplifier that can be represented by the following equivalent circuit,
More informationElectronics II. Final Examination
f3fs_elct7.fm  The University of Toledo EECS:3400 Electronics I Section Student Name Electronics II Final Examination Problems Points.. 3 3. 5 Total 40 Was the exam fair? yes no Analog Electronics f3fs_elct7.fm
More informationEE202 Exam III April 13, 2006
EE202 Exam III April 13, 2006 Name: (Please print clearly) Student ID: CIRCLE YOUR DIVISION DeCarlo 2:30 MWF Furgason 3:30 MWF INSTRUCTIONS There are 10 multiple choice worth 5 points each and there is
More informationEE105 Fall 2015 Microelectronic Devices and Circuits Frequency Response. Prof. Ming C. Wu 511 Sutardja Dai Hall (SDH)
EE05 Fall 205 Microelectronic Devices and Circuits Frequency Response Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Amplifier Frequency Response: Lower and Upper Cutoff Frequency Midband
More informationEE202 Exam III April 10, 2008
EE202 Exam III April 10, 2008 Name: (Please print clearly) Student ID: CIRCLE YOUR DIVISION Morning 8:30 MWF Afternoon 12:30 MWF INSTRUCTIONS There are 13 multiple choice worth 5 points each and there
More informationD G 2 H + + D 2
MASSACHUSETTS INSTITUTE OF TECHNOLOGY Department of Electrical Engineering and Computer Science 6.302 Feedback Systems Final Exam May 21, 2007 180 minutes Johnson Ice Rink 1. This examination consists
More informationAdvanced Current Mirrors and Opamps
Advanced Current Mirrors and Opamps David Johns and Ken Martin (johns@eecg.toronto.edu) (martin@eecg.toronto.edu) slide 1 of 26 WideSwing Current Mirrors I bias I V I in out out = I in V W L bias 
More informationECE3050 Assignment 7
ECE3050 Assignment 7. Sketch and label the Bode magnitude and phase plots for the transfer functions given. Use loglog scales for the magnitude plots and linearlog scales for the phase plots. On the magnitude
More information(b) A unity feedback system is characterized by the transfer function. Design a suitable compensator to meet the following specifications:
1. (a) The open loop transfer function of a unity feedback control system is given by G(S) = K/S(1+0.1S)(1+S) (i) Determine the value of K so that the resonance peak M r of the system is equal to 1.4.
More informationAt point G V = = = = = = RB B B. IN RB f
Common Emitter At point G CE RC 0. 4 12 0. 4 116. I C RC 116. R 1k C 116. ma I IC 116. ma β 100 F 116µ A I R ( 116µ A)( 20kΩ) 2. 3 R + 2. 3 + 0. 7 30. IN R f Gain in Constant Current Region I I I C F
More informationLecture 050 Followers (1/11/04) Page ECE Analog Integrated Circuits and Systems II P.E. Allen
Lecture 5 Followers (1/11/4) Page 51 LECTURE 5 FOLLOWERS (READING: GHLM 344362, AH 221226) Objective The objective of this presentation is: Show how to design stages that 1.) Provide sufficient output
More informationSwitchedCapacitor Circuits David Johns and Ken Martin University of Toronto
SwitchedCapacitor Circuits David Johns and Ken Martin University of Toronto (johns@eecg.toronto.edu) (martin@eecg.toronto.edu) University of Toronto 1 of 60 Basic Building Blocks Opamps Ideal opamps usually
More informationElectronics II. Midterm #1
The University of Toledo EECS:3400 Electronics I su3ms_elct7.fm Section Electronics II Midterm # Problems Points. 5. 6 3. 9 Total 0 Was the exam fair? yes no The University of Toledo su3ms_elct7.fm Problem
More informationUniversity of Illinois at Chicago Spring ECE 412 Introduction to Filter Synthesis Homework #4 Solutions
Problem 1 A Butterworth lowpass filter is to be designed having the loss specifications given below. The limits of the the design specifications are shown in the brickwall characteristic shown in Figure
More informationECS 40, Fall 2008 Prof. ChangHasnain Test #3 Version A
ECS 40, Fall 2008 Prof. ChangHasnain Test #3 Version A 10:10 am 11:00 am, Wednesday December 3, 2008 Total Time Allotted: 50 minutes Total Points: 100 1. This is a closed book exam. However, you are allowed
More informationElectronics II. Final Examination
The University of Toledo f6fs_elct7.fm  Electronics II Final Examination Problems Points. 5. 0 3. 5 Total 40 Was the exam fair? yes no The University of Toledo f6fs_elct7.fm  Problem 5 points Given is
More informationECE 202 Fall 2013 Final Exam
ECE 202 Fall 2013 Final Exam December 12, 2013 Circle your division: Division 0101: Furgason (8:30 am) Division 0201: Bermel (9:30 am) Name (Last, First) Purdue ID # There are 18 multiple choice problems
More informationECE202 FINAL April 30, 2018 CIRCLE YOUR DIVISION
ECE 202 Final, Spring 8 ECE202 FINAL April 30, 208 Name: (Please print clearly.) Student Email: CIRCLE YOUR DIVISION DeCarlo 7:308:30 DeCarlo:302:45 2025 202 INSTRUCTIONS There are 34 multiple choice
More informationEECE 2150 Circuits and Signals Final Exam Fall 2016 Dec 9
EECE 2150 Circuits and Signals Final Exam Fall 2016 Dec 9 Name: Instructions: Write your name and section number on all pages Closed book, closed notes; Computers and cell phones are not allowed You can
More informationFrequency Dependent Aspects of Opamps
Frequency Dependent Aspects of Opamps Frequency dependent feedback circuits The arguments that lead to expressions describing the circuit gain of inverting and noninverting amplifier circuits with resistive
More informationLecture 4, Noise. Noise and distortion
Lecture 4, Noise Noise and distortion What did we do last time? Operational amplifiers Circuitlevel aspects Simulation aspects Some terminology Some practical concerns Limited current Limited bandwidth
More informationEE 321 Analog Electronics, Fall 2013 Homework #8 solution
EE 321 Analog Electronics, Fall 2013 Homework #8 solution 5.110. The following table summarizes some of the basic attributes of a number of BJTs of different types, operating as amplifiers under various
More informationGEORGIA INSTITUTE OF TECHNOLOGY SCHOOL of ELECTRICAL & COMPUTER ENGINEERING FINAL EXAM. COURSE: ECE 3084A (Prof. Michaels)
GEORGIA INSTITUTE OF TECHNOLOGY SCHOOL of ELECTRICAL & COMPUTER ENGINEERING FINAL EXAM DATE: 30Apr14 COURSE: ECE 3084A (Prof. Michaels) NAME: STUDENT #: LAST, FIRST Write your name on the front page
More informationDC Biasing. Dr. U. Sezen & Dr. D. Gökçen (Hacettepe Uni.) ELE230 Electronics I 15Mar / 59
Contents Three States of Operation BJT DC Analysis FixedBias Circuit EmitterStabilized Bias Circuit Voltage Divider Bias Circuit DC Bias with Voltage Feedback Various Dierent Bias Circuits pnp Transistors
More informationStudio 9 Review Operational Amplifier Stability Compensation Miller Effect Phase Margin Unity Gain Frequency Slew Rate Limiting Reading: Text sec 5.
Studio 9 Review Operational Amplifier Stability Compensation Miller Effect Phase Margin Unity Gain Frequency Slew Rate Limiting Reading: Text sec 5.2 pp. 232242 Twostage opamp Analysis Strategy Recognize
More informationPhysics  Grade 12. Revision Sheet for the Final Exam / Second Term. Academic Year: 2018/2019. Student s Name:.. Date: /3/2018
Physics  Grade 12 Revision Sheet for the Final Exam / Second Term Academic Year: 2018/2019 Student s Name:.. Date: /3/2018 Required Material: Chapter 18: Sections 1,2 & 3 (Textbook Pages: 628661) Chapter
More informationSOME USEFUL NETWORK THEOREMS
APPENDIX D SOME USEFUL NETWORK THEOREMS Introduction In this appendix we review three network theorems that are useful in simplifying the analysis of electronic circuits: Thévenin s theorem Norton s theorem
More informationMicroelectronic Circuit Design 4th Edition Errata  Updated 4/4/14
Chapter Text # Inside back cover: Triode region equation should not be squared! i D = K n v GS "V TN " v & DS % ( v DS $ 2 ' Page 49, first exercise, second answer: 1.35 x 10 6 cm/s Page 58, last exercise,
More informationGEORGIA INSTITUTE OF TECHNOLOGY School of Electrical and Computer Engineering
NAME: GEORGIA INSTITUTE OF TECHNOLOGY School of Electrical and Computer Engineering ECE 4430 First Exam Closed Book and Notes Fall 2002 September 27, 2002 General Instructions: 1. Write on one side of
More information(e V BC/V T. α F I SE = α R I SC = I S (3)
Experiment #8 BJT witching Characteristics Introduction pring 2015 Be sure to print a copy of Experiment #8 and bring it with you to lab. There will not be any experiment copies available in the lab. Also
More informationTest 2 SOLUTIONS. ENGI 5821: Control Systems I. March 15, 2010
Test 2 SOLUTIONS ENGI 5821: Control Systems I March 15, 2010 Total marks: 20 Name: Student #: Answer each question in the space provided or on the back of a page with an indication of where to find the
More informationH(s) = 2(s+10)(s+100) (s+1)(s+1000)
Problem 1 Consider the following transfer function H(s) = 2(s10)(s100) (s1)(s1000) (a) Draw the asymptotic magnitude Bode plot for H(s). Solution: The transfer function is not in standard form to sketch
More informationRIB. ELECTRICAL ENGINEERING Analog Electronics. 8 Electrical Engineering RIBR T7. Detailed Explanations. Rank Improvement Batch ANSWERS.
8 Electrical Engineering RIBR T7 Session 089 S.No. : 9078_LS RIB Rank Improvement Batch ELECTRICL ENGINEERING nalog Electronics NSWERS. (d) 7. (a) 3. (c) 9. (a) 5. (d). (d) 8. (c) 4. (c) 0. (c) 6. (b)
More informationEE 40: Introduction to Microelectronic Circuits Spring 2008: Midterm 2
EE 4: Introduction to Microelectronic Circuits Spring 8: Midterm Venkat Anantharam 3/9/8 Total Time Allotted : min Total Points:. This is a closed book exam. However, you are allowed to bring two pages
More informationLecture 13 MOSFET as an amplifier with an introduction to MOSFET smallsignal model and smallsignal schematics. Lena Peterson
Lecture 13 MOSFET as an amplifier with an introduction to MOSFET smallsignal model and smallsignal schematics Lena Peterson 20151013 Outline (1) Why is the CMOS inverter gain not infinite? Largesignal
More informationES250: Electrical Science. HW1: Electric Circuit Variables, Elements and Kirchhoff s Laws
ES250: Electrical Science HW1: Electric Circuit Variables, Elements and Kirchhoff s Laws Introduction Engineers use electric circuits to solve problems that are important to modern society, such as: 1.
More informationELECTRONIC SYSTEMS. Basic operational amplifier circuits. Electronic Systems  C3 13/05/ DDC Storey 1
Electronic Systems C3 3/05/2009 Politecnico di Torino ICT school Lesson C3 ELECTONIC SYSTEMS C OPEATIONAL AMPLIFIES C.3 Op Amp circuits» Application examples» Analysis of amplifier circuits» Single and
More informationECE342 Test 2 Solutions, Nov 4, :008:00pm, Closed Book (one page of notes allowed)
ECE342 Test 2 Solutions, Nov 4, 2008 6:008:00pm, Closed Book (one page of notes allowed) Please use the following physical constants in your calculations: Boltzmann s Constant: Electron Charge: Free
More informationGEORGIA INSTITUTE OF TECHNOLOGY SCHOOL of ELECTRICAL & COMPUTER ENGINEERING FINAL EXAM. COURSE: ECE 3084A (Prof. Michaels)
GEORGIA INSTITUTE OF TECHNOLOGY SCHOOL of ELECTRICAL & COMPUTER ENGINEERING FINAL EXAM DATE: 09Dec13 COURSE: ECE 3084A (Prof. Michaels) NAME: STUDENT #: LAST, FIRST Write your name on the front page
More informationOPAMPs I: The Ideal Case
I: The Ideal Case The basic composition of an operational amplifier (OPAMP) includes a high gain differential amplifier, followed by a second high gain amplifier, followed by a unity gain, low impedance,
More informationAnalog Integrated Circuit Design Prof. Nagendra Krishnapura Department of Electrical Engineering Indian Institute of Technology, Madras
Analog Integrated Circuit Design Prof. Nagendra Krishnapura Department of Electrical Engineering Indian Institute of Technology, Madras Lecture No  42 Fully Differential Single Stage Opamp Hello and welcome
More informationEE105 Fall 2014 Microelectronic Devices and Circuits
EE05 Fall 204 Microelectronic Devices and Circuits Prof. Ming C. Wu wu@eecs.berkeley.edu 5 Sutardja Dai Hall (SDH) Terminal Gain and I/O Resistances of BJT Amplifiers Emitter (CE) Collector (CC) Base (CB)
More information