CHAPTER 13. Solutions for Exercises

Transcription

1 HPT 3 Solutions for xercises 3. The emitter current is gien by the Shockley equation: i S exp VT For operation with i, we hae exp >> S >>, and we can write VT i S exp VT Soling for, we hae 3.2 i ln 78.4 mv V VT ln 4 S β 50 α β + 5 i α i m i i. β 96 µ α β α α β i i i 0.5 m α i / i β i / i The base current is gien by quation 3.8: 6 i ( α ) S exp.96 0 exp VT which can be plotted to obtain the input characteristic shown in Figure 3.6a. For the output characteristic, we hae i βi proided that

2 approximately 0.2 V. For 0.2 V, i falls rapidly to zero at 0. The output characteristics are shown in Figure 3.6b. 3.5 The load lines for 0.8 V and V are shown: in s shown on the output load line, we find V V, V 5 V, andv.0 V. max 9 Q min 2

3 3.6 The load lines for the new alues are shown: s shown on the output load line, we hae V.8 V, V 7 V, andv 3.0 V. max 9 Q min 3

4 3.7 efer to the characteristics shown in Figure 3.7 in the book. Select a point in the actie region of the output characteristics. For example, we could choose the point defined by 6 V and i 2.5 m at which we find i 50 µ. Then we hae β i / i 50. (For many transistors the alue found for β depends slightly on the point selected.) 3.8 (a) Writing a KV equation around the input loop we hae the equation for the input load lines: 0.8 in ( t ) 8000i + 0 The load lines are shown: Then we write a K equation for the output circuit: i The resulting load line is: From these load lines we find 4

5 max 48 µ, Q 24 µ, min 5 µ, V.8 V, V 5.3 V, V 8.3 max Q min V (b) nspecting the load lines, we see that the maximum of in corresponds to min which in turn corresponds to V min. ecause the maximum of in corresponds to minimum V, the amplifier is inerting. This may be a little confusing because V takes on negatie alues, so the minimum alue has the largest magnitude. 3.9 (a) utoff because we hae V 0.5 V andv V V 4.5 V which is less than 0.5 V. (b) Saturation because we hae < β. < (c) ctie because we hae 0 andv > 0.2 V. > 3.0 (a) n this case ( β 50) the JT operates in the actie region. Thus the equialent circuit is shown in Figure 3.8d. We hae V µ β m V V.43 V ecause we hae V > 0.2, we are justified in assuming that the transistor operates in the actie region. (b) n this case ( β 250),the JT operates in the saturation region. Thus the equialent circuit is shown in Figure 3.8c. We hae V 0.7 V 0.2 V 0.2 V 7.5 µ 4.8 m ecause we hae β >, transistor operates in the actie region. we are justified in assuming that the 3. For the operating point to be in the middle of the load line, we want V V V V / 2 0 V and 2 m. Then we hae V 0.7 (a) / β 20 µ 965 kω (b) V 0.7 / β µ MΩ 5

6 3.2 Notice that a pnp JT appears in this circuit. (a) For β 50, it turns out that the JT operates in the actie region µ β m V (b) For β 250, V it turns out that the JT operates in the saturation region V 0.2 V 9.3 µ.98 m ecause we hae β >, in the actie region V V 5 V + β 2 we are assured that the transistor operates V V + ( β + ) β V V + ) (µ) ( V (m) (V) For the larger alues of and 2 used in this xercise, the ratio of the collector currents for the two alues of β is.205, whereas for the smaller alues of and 2 used in xample 3.7, the ratio of the collector currents for the two alues of β is.023. n general in the four-resistor bias network smaller alues for and 2 lead to more nearly constant collector currents with changes in β Ω + k 2 V V 5 V V V Q 4.3 µ Q β Q m + β + βvt r Q ( ) 300( 26 mv) m 840 Ω 6

7 β Ω r 7 β o 63.0 Z in 86 Ω r r Z in i G i 7004 o Z kω o in s Z in sin( ωt ) Z + in s 3.5 First, we determine the bias point: kω V V 0 V V V Q 4.26 µ Q β Q m + β + ( ) Now we can compute r and the ac performance. r ( ) βv mv m 823 Ω T Ω Q + r + ( β + ) ( β + ) o r + ( β + ) ( β + ) Zin Zin 40.0 kω i [ + ( + ) r β ] G i s + s kω Zo 33.8 Ω ( β + ) + + r s nswers for Selected Problems P3.6* i 9.3 m α β 30 7

8 P3.7* P3.6* mv 9.34 V α i 9.90 m i 99.0 µ Seq β eq 00 P3.8* t 80 o and i.7 0.m, the base-to-emitter oltage is approximately: ( 30) 0.4 V P3.9* β 400 α P3.24* V 8.4 V, V 5.6 V, and V 2 V max Q min 6 P3.28* 8

9 P3.29* (a) and (b) (c) min 0.5 m, Q.0 m, and max V 5 V, V 0 V, V 5 V min Q max.5 m (d) and (e) The sketches of (t) are: P3.36* n the actie region, the base-collector junction is reerse biased and the base-emitter junction is forward biased. n the saturation region, both junctions are forward biased. n the cutoff region, both junctions are reerse biased. (ctually, cutoff applies for slight forward bias of the base-emitter junction as well, proided that the base current is negligible.) 9

10 P3.4*. ssume operation in saturation, cutoff, or actie region. 2. Use the corresponding equialent circuit to sole for currents and oltages. 3. heck to see if the results are consistent with the assumption made in step. f so, the circuit is soled. f not, repeat with a different assumption. P3.44* The results are gien in the table: ircuit β egion of operation (m) V (olts) (a) 00 actie (a) 300 saturation (b) 00 actie (b) 300 saturation (c) 00 cutoff 0 5 (c) 300 cutoff 0 5 (d) 00 actie (d) 300 saturation P3.47* P3.49* P3.56* 3.5 kω and 753 Ω max min 58 r m m Q For Q m, we obtain r 50 kω. 0

11 P3.63* High impedance amplifier (Problem 3.57) ow impedance amplifier (Problem 3.56) Q m 3.93 m r 66.2 kω 662 Ω oc -5-5 Z in 54.8 kω 548 Ω i G Z o 00 kω kω P3.67* β r Q Q 405 Ω Z oc in 4.36 kω 8.6 i G 8.5 Z 2. Ω o 6.4 m