DESIGN MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT. Dr. Eman Azab Assistant Professor Office: C

Transcription

1 MICROELECTRONICS ELCT 703 (W17) LECTURE 3: OP-AMP CMOS CIRCUIT DESIGN Dr. Eman Azab Assistant Professor Office: C

2 TWO STAGE CMOS OP-AMP It consists of two stages: First stage amplifier is a differential amplifier: Q1-Q2 with active loads Q3-Q4 and biasing current source Q5- Q8 Second stage amplifier is a Common Source amplifier Q6 with active load Q7 Figure from Sedra/Smith Copyright 2010 by Oxford University Press, Inc. 2

3 TWO STAGE CMOS OP-AMP The two stage CMOS op-amp can be modeled as follows: G m1 & G m2 is the trans-conductance gains of the 1 st and 2 nd stage respectively R 1 & R 2 is the output resistances of the 1 st and 2 nd stage respectively C 1 & C 2 is the parasitic capacitances of the 1 st and 2 nd stage respectively C c is used as a compensation capacitance to control the bandwidth Figure from Sedra/Smith Copyright 2010 by Oxford University Press, Inc. 3

4 TWO STAGE CMOS OP-AMP The model parameters are derived at the mid-band (All capacitors are open circuit) V o1 = g m1,2 R 1 V 1 V 2 G m1 = g m1,2 R 1 = r ds2 r ds4 V out = g m6 R 2 V o1 G m2 = g m6 R 2 = r ds6 r ds7 A Vd = g m1,2 g m6 R 1 R 2 4

5 TWO STAGE CMOS OP-AMP Op-amp High frequency gain is given by: G m1 G m2 R 1 R 2 1 C c s G A Vd s = m2 1 + s C C + C 2 R 2 + C C + C 1 R 1 + G m R 1 R 2 C C + s 2 R 1 R 2 C C C 1 + C C C 2 + C 1 C 2 The transfer function is characterized by two poles and one zero 5

6 TWO STAGE CMOS OP-AMP Op-amp High frequency gain is given by: A Vd s = A Vo 1 s ω z 1 + s 1 + s ω p1 ω p2 A Vo = G m1 G m2 R 1 R 2 ω z = G m2 C c ω p1 1 G m2 R 1 R 2 C c ω p2 G m2 C c C 1 C 2 + C C C 1 + C 2 G m2 C 1 + C 2 C C controls the bandwidth of the op-amp! 6

7 COMPENSATION THEORY Stability of Closed-loop Systems 7

8 CLOSED-LOOP SYSTEMS USING OP-AMPS Voltage op-amps are used to realize different analog signal processing applications Negative feedback concept is used to implement these applications Example: Inverting amp. v O v I = R 2 R 1 This transfer function is derived under the assumption that the amplifier is ideal (infinite gain and zero input current) This is a closed loop system formed with op-amp in feed-forward path and resistor network (R 1 and R 2 ) in the feedback path Figure from Sedra/Smith Copyright 2010 by Oxford University Press, Inc. 8

9 CLOSED-LOOP SYSTEMS USING OP-AMPS Comparing the inverting amplifier with the closed-loop system v O v I = R 2 R 1 A = v O v I = a(s) 1 + a s f f = R 1 R 2 A(ω = 0) = a(ω = 0) 1 + a(ω = 0) f for af 1 Figure from Sedra/Smith Copyright 2010 by Oxford University Press, Inc. v O v I 1 f 9

10 CLOSED-LOOP SYSTEMS USING OP-AMPS Closed-loop system employing negative feedback must be stable for proper operation Thus, the system eqn. roots must satisfy the stability condition, Poles are in the left half plane A critically stable system is realized when the poles are on the jω axis Since the feedback network is purely passive, the stability depends on the amplifier s frequency response a(s) gain freq. = 1 = 0dB Phase gain freq. >

11 CLOSED-LOOP SYSTEMS USING OP-AMPS An important frequency is the unity gain freq. ω T The frequency at which the loop gain a s = ω T f = 1 magnitude equals to one (Zero db) Critically stable system condition Phase margin is an indication for stability It is calculated as the phase of the loop gain at the unity gain frequency (Critical stable condition) A = v O v I = a(s) 1 + a s f Critcally stable 1 + a s = ω T f = 0 Phase margin = Phase a s = ω T f gain freq. = 1 = 0dB Phase gain freq. >

12 CLOSED-LOOP SYSTEMS USING OP-AMPS A standard 60 deg. Phase margin is sufficient to stabilize the loop and reduce the overshoot in the system transient response Phase margin = = 60 Phase a s = ω T f = 120 a s = ω T f = 1 a s = ω T = 1 f A s = ω T = a s = ω T 1 + e j120 A s = ω T = 1 f Critcally stable 1 + a s = ω T f = 0 gain freq. = 1 = 0dB Phase gain freq. >

13 COMPENSATION OF CLOSED LOOP AMP. Assume that a(s) is a three pole amplifier, and f=1 The phase margin is negative for the closed loop We have to stabilize the loop by adding a dominant pole to the system 13

14 EX.: COMPENSATION OF OP-AMPS By adding a compensating capacitor across the second stage, we can control the phase margin of the op-amp Increasing the phase margin stabilize any closed-loop system realized using the op-amp We have to select the value of Cc to achieve the desired phase margin A Vd s = A Vo 1 s ω z 1 + s 1 + s ω p1 ω p2 ω p1 1 G m2 R 1 R 2 C c ω p2 G m2 C 1 + C 2 ω z = G m2 C c 14

15 COMPENSATION OF OP-AMPS The first pole P1 is the dominant pole (very small compared to the zero and the second pole) P1 introduces 90 phase shift before the unity gain frequency The phase margin is affected by the second pole and zero A Vd s = A Vo 1 s ω z 1 + s ω 1 + s p1 ω p2 A Vo 1 + s ω p1 A Vo ω p1 s unity gain freq. ω T A Vo ω p1 ω z = G m2 C c ω p1 1 G m2 R 1 R 2 C c ω p2 G m2 C 1 + C 2 15

16 EXAMPLE For a two stage voltage Op-amp given in figure, calculate the unity gain frequency and phase margin? A Vd s = A Vo 1 s ω z 1 + s 1 + s ω p1 ω p2 A Vd jω T = A Vo 1 + ω T ω p ω T ω z ω T ω p2 2 = 1 Phase margin = 180 tan 1 ω T ω z tan 1 ω T ω p1 tan 1 ω T ω p2 For stable system the phase margin should be greater than zero 16

17 COMPENSATION OF OP-AMPS Note: To check the speed of op-amp, the Slew rate is calculated/measured Slew rate is the rate of change of the output voltage, when the opamp is used as a buffer at unit step input SR = dv O dt V i (t) = 2 V i (s) = 2 s A FB s s ω p1 V O (s) = 2 s s ω p1 V O (t) = 2 1 e ωp1t Figure from Gray/Meyer Copyright by John Wiley & Sons, Inc. 17

18 COMPENSATION OF OP-AMPS The higher the 3-dB frequency is the faster the output response V O (t) = 2 1 e ω p1t However, the high input voltage causes the input stage to saturate (Q1 off and Q2 on) Thus all the current of Q5 will flow in C C SR = dv O dt = I D5 C c Predicted Response Actual Response Figure from Gray/Meyer Copyright by John Wiley & Sons, Inc. 18

19 NOTES We can control the op-amp specs as follows: Choosing the transistors trans-conductance gain g m controls the gain (Change biasing current I D or Aspect ratio W/L) g m can be used to control poles (consequently it controls phase margin, stability and slew rate) There are different techniques to change the poles of the opamp (Check the reference!) 19

20 DESIGN EXAMPLE CMOS Op-amp design 20

21 CMOS DESIGN OF VOLTAGE OP-AMPS For the two stage op-amp shown in Figure, find the following: All DC currents as a function of I REF Expression of the mid-band gain The maximum and minimum input voltage range The maximum and minimum output Voltage range Expressions of the poles and zeros If the zero is 5 times the unity gain frequency, what is the value of the second pole to achieve 45 phase margin? 21