ELECTRONIC DEVICES MOSFET METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR. Piotr Dziurdzia, Ph.D

Size: px
Start display at page:

Download "ELECTRONIC DEVICES MOSFET METAL-OXIDE-SEMICONDUCTOR FIELD EFFECT TRANSISTOR. Piotr Dziurdzia, Ph.D"

Transcription

1 AH NVERY OF ENE AN EHNOLOY M. ANŁAWA AZA W KRAKOWE Faculty of omuter cience, Electronics and elecommunications EPARMEN OF ELERON ELERON EVE Piotr ziurdzia, Ph.. -3, room 413; tel , Piotr.ziurdzia@agh.edu.l MEAL-OXE-EMONOR FEL EFFE RANOR MOFE Ei P 1

2 structure MEAL-NLAOR-EMOONOR (M) gate eg. aluminum or olysilicon n or metal dielectric semiconductor metal ( contact ) Mostly, silicon oxide io MO metal oxide semiconductor substrate Ei P Electronic evices - MOFE 3 MO structure POLARZAON = 0 < 0 metal io silicon E electric field accumulation layer neutral state (equilibrium) accumulation - hole - a majority carrier - accetor doant ion Ei P Electronic evices - MOFE 4

3 MO structure POLARZAON > 0 >> 0 electric field deletion layer E E inversion layer deletion layer neutral area deletion inversion - hole - a majority carrier - electron - a minority carrier - accetor doant ion Ei P Electronic evices - MOFE 5 MO structure ENERY MOEL metal io silicon tye Ei P Electronic evices - MOFE 6 3

4 Energy of electron charge q < 0 q > 0 q >> M O (tye P) energy of the electron in vacuum q i MO structure ENERY MOEL Work function W the energy required to transfer an electron from the Fermi level to infinity (W - W F ), (free electron in vacuum) q M, q E F q M metal insulator q q E E i E F E V emiconductor tye Electron affinity - determines the work function from the level of the minimum energy in the conduction band E q i, q M work function otential from metal work function otential from semiconductor i electron affinity of insulator electron affinity of semiconductor deal structure imlification: - equal work functions of metal and semiconductor ( M, ) the same Fermi levels - omitted surface states at the border of the dielectric-semiconductor (surface charge) - homogeneous insulator - omitted charge in the insulator Ei P Electronic evices - MOFE 7 MO structure ENERY MOEL - POLARZAON accumulation deletion inversion < 0 > 0 >> 0 M O (tye P) M O (tye P) M O (tye P) q( - i ) E E E E F E i E i E i E F E V E F E V E F E V E F E F Q x Q x d x Q x inw x d x Q Q =Q d (Q d = -qn A x d ) Q = Q n + Q d Ei P Electronic evices - MOFE 8 4

5 >> 0 >> = Let s make a transistor =0 > 0 > 0 > 0 > 0 urrent flows. ut there is no control ossibility. Ei P Electronic evices - MOFE 9 n+ n+ another diode > 0 > 0 We need a kind of one-directional valve t is OK. urrent flows only when there are electrons under the gate there is a channel ate voltage can control the current by changing the thickness of the channel Ei P Electronic evices - MOFE 10 5

6 structure he cross-section of the enhanced MO transistor, n tye channel L channel length W channel width Figure from:. Kuta Elementy i układy elektroniczne, AH 000 Ei P Electronic evices - MOFE 11 A OF OPERAON = 0, < 0 io n + n + f there is no channel, the current in the drain-source circuit does not flow (excet very small reverse diode current) > 0 = 0? Ei P Electronic evices - MOFE 1 6

7 A OF OPERAON > V io n + n + > 0 =? > 0 > V inversion: changes of cause modulation channel conductance thus controlling drain current LNEAR OPERAON Ei P Electronic evices - MOFE 13 A OF OPERAON > V increasing of io n + n + > V > >> 00 ARAON: changes of O NO AE increasing of drain current = > const. 0 inch-off = V? Ei P Electronic evices - MOFE 14 7

8 RAN RREN =0 >0 deletion area io n + n + 0 L channel length W channel width x ye n channel Q n (y) y Q (y) L >0 y Linear area One has to integrate the equation (1) along the channel length, from 0V to : L then we get: and finally: 0 dy V (y) Ei P Electronic evices - MOFE 15 ox L ox W ox e 0 e W W e L d V V When the reaches the value = V, then according to () drain current would have to decrease(in linear area is roortional to ). hen at the drain the channel is inched-off saturation of takes lace. herefore, substituting ( = V ) to () one obtains formula for current in saturation : aturation area ox W e L V (1) () For the P-tye transistor, the drain current and voltage are negative OP HARAER LNEAR AREA > V n 0V < < V n W nox( V ) L ARAON AREA > V n > V n > 0V W n L ox ( V ) -OFF < V n = 0 V Ei P Electronic evices - MOFE 16 8

9 OP HARAER PMO NMO Ei P Electronic evices - MOFE 17 RANFER HARAER ARAON AREA V > V n V > V V n > 0V W n L ox ( V ) LNEAR AREA V > V n 0V < V < V V n W nox( V ) L Ei P Electronic evices - MOFE 18 9

10 RANFER HARAER PMO NMO s it ossible for these characteristics to indicate the linear area and saturation? Ei P Electronic evices - MOFE 19 YPE OF MO RANOR enhanced N-channel: f = 0 => no channel enhanced P-channel: Figure from:. Kuta Elementy i układy elektroniczne, AH 000 Ei P Electronic evices - MOFE 0 10

11 YPE OF MO RANOR deletion N-channel: At =0 channel exists and current can flow deletion P-channel: Figure from:. Kuta Elementy i układy elektroniczne, AH 000 Ei P Electronic evices - MOFE 1 Examle A MO n-channel transistor has a threshold voltage V N =1V. At: V =4V and V =V, the =5mA. What would be the value of, if increases two times? Ei P Electronic evices - MOFE 11

12 HANNEL LENH MOLAON EFFE io n + deletion area L' L n + nfluence of the increase, channel is getting shorter n linear area, it does not aear: W nox V L n saturation: W n L ox ( V ) (1 ) 1/ his effect is often referred to as channel length modulation effect V Ei P Electronic evices - MOFE 3 OY EFFE io n + deletion area n + V V ( ) 0 s s for NMO - bulk coefficient PMO NMO Ei P Electronic evices - MOFE 4 1

13 other henomena HOR HANNEL EFFE horter channel io n + n + deletion area L io obszar zubożony n + n + L' deletion areas - and - are closer to each other, they are covering the channel the share of in creation of channel increases voltage requires less work in order to create the channel Lower threshold voltage V Ei P Electronic evices - MOFE 5 NARROW HANNEL EFFE cross-section area of channel other henomena Narrower channel electric field caused by induce deletion area not only under the gate deletion area io W io W' channel is getting narrower, thus the share of in inducing deletion area not under the gate increases V narrow channel voltage requires more work to create channel hort channel W, L higher threshold V Ei P Electronic evices - MOFE 6 13

14 HREHOL AREA other henomena weak inversion: F < F 0( ) 1 ex subthreshold area iffusion mechanism of current flow V Ei P Electronic evices - MOFE 7 EFFE OF EMPERARE rain current is affected by temerature deendence: mobility of carriers in the channel threshold voltage emerature coefficient of drain current for saturation range: 1 ( ) 1 V W W can be For mobility: ( a ositive, negative, ): or zero, 1 a deending on the voltage For threshold voltage: Eg Qef V m F s 1 F q ox E g slightly decreases when temerature goes u F it changes about mv/k 1 < Ei P Electronic evices - MOFE 8 14

15 LARE-NAL MOEL Ei P Electronic evices - MOFE 9 LARE-NAL MOEL n + io n + L current in channel: R ' i ' R LNEAR AREA i i W u e u u L W u ox ARAON AREA ox e L small-signal and comonents u u diodes - i -: i ex 1, i ex 1 Ei P Electronic evices - MOFE 30 15

16 AMPLFER i R i /R -1/R Q u u u i W oxu L u V u i W ox 1 L u V u Ei P Electronic evices - MOFE 31 AMPLFER i i /R -1/R Q(, ) id Q(, ) V u u ugs uds Ei P Electronic evices - MOFE 3 16

17 MALL-NAL MOEL i i g ds g m R u u i u u u in u gs g ds g u ds g m u gs Ei P Electronic evices - MOFE 33 MALL-NAL MOEL gd r dd u gs gs g m u gs g mb u bs g ds db r ss ubs bs f gs gm ut-off frequency gd gb gb i gm u g ds i u W ox L W ox L V - Outut conductance - (for saturation area) - transconductance (for saturation area) Ei P Electronic evices - MOFE 34 g mb i u i V V u - transfer body conductance 17

18 MO NVERER i uo V V uo i MO 1 un nmo uo V n V 0 1 un Ei P Electronic evices - MOFE 35 MO NVERER nmo cut-off, MO linear uo V V nmo saturation, MO linear uo i nmo saturation, MO saturation 1 V nmo linear, MO saturation V n V V nmo linear, MO cut-off 0 1 un Ei P Electronic evices - MOFE 36 18

19 RREN ALZER =const =0 =- =-4 R L =0 Ei P Electronic evices - MOFE 37 POLAR RANOR WH OLAE AE () nsulated ate iolar ransistor E E transistor combines the ositive characteristics of the MOFEs with the advantages of biolar transistors Ei P Electronic evices

20 POLAR RANOR WH OLAE AE () E - high inut imedance - ease of control by inut voltage - very small Esat - rotected in the event of a short circuit - low switching losses Ei P Electronic evices - 39 POLAR RANOR WH OLAE AE () E Alications of - current sources of high ower - high ower converters - systems with inductive loads - inverters Ei P Electronic evices

21 V n+ n+ n n+ Ei P Electronic evices - MOFE 41 ranzystory MO dużej mocy source stream of electrons Ei P Electronic evices - MOFE 4 1

22 OMPARON J V MOFE RANONANE J MOFE g mj E g mmo n OX W L - it does not deend on technology - t deends on technology - it does not deend on dimensions - it deends on dimensions g mj g mmo Ei P Electronic evices - J v. MOFE 43 OMPARON J V MOFE NP MPEANE J MOFE r bej g m r gsmo - very small rbe r gs Ei P Electronic evices - J v. MOFE 44

23 OMPARON J V MOFE OP MPEANE r 0J J AF E r MOFE 0MO 1, AF, 1/λ E, Ei P Electronic evices - J v. MOFE 45 OMPARON J V MOFE AMPLFAON J MOFE K K uj uj g mjr 0 AF if, for examle AF =50V, then K u =000 E K umo K umo g 1 V mmor 0 n V n Ei P Electronic evices - J v. MOFE 46 3

24 OMPARON J V MOFE LM FREQENY J MOFE f J g m MO n f g m gs n L V f J f MO Ei P Electronic evices - J v. MOFE 47 4

FET ( Field Effect Transistor)

FET ( Field Effect Transistor) NMO MO NMO MO Enhancement eletion Enhancement eletion N kanál Transistors tyes Field effect transistors Electronics and Microelectronics AE4B34EM MOFET MEFET JFET 7. ecture Uniolar transistor arameters

More information

P-MOS Device and CMOS Inverters

P-MOS Device and CMOS Inverters Lecture 23 P-MOS Device and CMOS Inverters A) P-MOS Device Structure and Oeration B) Relation of Current to t OX, µ V LIMIT C) CMOS Device Equations and Use D) CMOS Inverter V OUT vs. V IN E) CMOS Short

More information

MOS Transistor I-V Characteristics and Parasitics

MOS Transistor I-V Characteristics and Parasitics ECEN454 Digital Integrated Circuit Design MOS Transistor I-V Characteristics and Parasitics ECEN 454 Facts about Transistors So far, we have treated transistors as ideal switches An ON transistor passes

More information

CMPEN 411 VLSI Digital Circuits. Lecture 03: MOS Transistor

CMPEN 411 VLSI Digital Circuits. Lecture 03: MOS Transistor CMPEN 411 VLSI Digital Circuits Lecture 03: MOS Transistor Kyusun Choi [Adapted from Rabaey s Digital Integrated Circuits, Second Edition, 2003 J. Rabaey, A. Chandrakasan, B. Nikolic] CMPEN 411 L03 S.1

More information

II III IV V VI B C N. Al Si P S. Zn Ga Ge As Se Cd In Sn Sb Te. Silicon (Si) the dominating material in IC manufacturing

II III IV V VI B C N. Al Si P S. Zn Ga Ge As Se Cd In Sn Sb Te. Silicon (Si) the dominating material in IC manufacturing II III IV V VI B N Al Si P S Zn Ga Ge As Se d In Sn Sb Te Silicon (Si) the dominating material in I manufacturing ompound semiconductors III - V group: GaAs GaN GaSb GaP InAs InP InSb... The Energy Band

More information

ECE 342 Electronic Circuits. Lecture 6 MOS Transistors

ECE 342 Electronic Circuits. Lecture 6 MOS Transistors ECE 342 Electronic Circuits Lecture 6 MOS Transistors Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2

More information

Chapter 2 CMOS Transistor Theory. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

Chapter 2 CMOS Transistor Theory. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Chapter 2 CMOS Transistor Theory Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Outline Introduction MOS Device Design Equation Pass Transistor Jin-Fu Li, EE,

More information

SECTION: Circle one: Alam Lundstrom. ECE 305 Exam 5 SOLUTIONS: Spring 2016 April 18, 2016 M. A. Alam and M.S. Lundstrom Purdue University

SECTION: Circle one: Alam Lundstrom. ECE 305 Exam 5 SOLUTIONS: Spring 2016 April 18, 2016 M. A. Alam and M.S. Lundstrom Purdue University NAME: PUID: SECTION: Circle one: Alam Lundstrom ECE 305 Exam 5 SOLUTIONS: April 18, 2016 M A Alam and MS Lundstrom Purdue University This is a closed book exam You may use a calculator and the formula

More information

Introduction to CMOS VLSI. Chapter 2: CMOS Transistor Theory. Harris, 2004 Updated by Li Chen, Outline

Introduction to CMOS VLSI. Chapter 2: CMOS Transistor Theory. Harris, 2004 Updated by Li Chen, Outline Introduction to MOS VLSI Design hapter : MOS Transistor Theory copyright@david Harris, 004 Updated by Li hen, 010 Outline Introduction MOS apacitor nmos IV haracteristics pmos IV haracteristics Gate and

More information

MOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA

MOS Transistors. Prof. Krishna Saraswat. Department of Electrical Engineering Stanford University Stanford, CA MOS Transistors Prof. Krishna Saraswat Department of Electrical Engineering S Stanford, CA 94305 saraswat@stanford.edu 1 1930: Patent on the Field-Effect Transistor! Julius Lilienfeld filed a patent describing

More information

ECE 342 Electronic Circuits. 3. MOS Transistors

ECE 342 Electronic Circuits. 3. MOS Transistors ECE 342 Electronic Circuits 3. MOS Transistors Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu 1 NMOS Transistor Typically L = 0.1 to 3 m, W = 0.2 to

More information

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002 Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The Devices July 30, 2002 Goal of this chapter Present intuitive understanding of device operation Introduction

More information

MOSFET: Introduction

MOSFET: Introduction E&CE 437 Integrated VLSI Systems MOS Transistor 1 of 30 MOSFET: Introduction Metal oxide semiconductor field effect transistor (MOSFET) or MOS is widely used for implementing digital designs Its major

More information

The Devices: MOS Transistors

The Devices: MOS Transistors The Devices: MOS Transistors References: Semiconductor Device Fundamentals, R. F. Pierret, Addison-Wesley Digital Integrated Circuits: A Design Perspective, J. Rabaey et.al. Prentice Hall NMOS Transistor

More information

6.012 Electronic Devices and Circuits Spring 2005

6.012 Electronic Devices and Circuits Spring 2005 6.012 Electronic Devices and Circuits Spring 2005 May 16, 2005 Final Exam (200 points) -OPEN BOOK- Problem NAME RECITATION TIME 1 2 3 4 5 Total General guidelines (please read carefully before starting):

More information

MOS Transistor Theory

MOS Transistor Theory CHAPTER 3 MOS Transistor Theory Outline 2 1. Introduction 2. Ideal I-V Characteristics 3. Nonideal I-V Effects 4. C-V Characteristics 5. DC Transfer Characteristics 6. Switch-level RC Delay Models MOS

More information

Practice 3: Semiconductors

Practice 3: Semiconductors Practice 3: Semiconductors Digital Electronic Circuits Semester A 2012 VLSI Fabrication Process VLSI Very Large Scale Integration The ability to fabricate many devices on a single substrate within a given

More information

ECE 305 Exam 5 SOLUTIONS: Spring 2015 April 17, 2015 Mark Lundstrom Purdue University

ECE 305 Exam 5 SOLUTIONS: Spring 2015 April 17, 2015 Mark Lundstrom Purdue University NAME: PUID: : ECE 305 Exam 5 SOLUTIONS: April 17, 2015 Mark Lundstrom Purdue University This is a closed book exam. You may use a calculator and the formula sheet at the end of this exam. Following the

More information

MOS Transistor Theory

MOS Transistor Theory MOS Transistor Theory So far, we have viewed a MOS transistor as an ideal switch (digital operation) Reality: less than ideal EE 261 Krish Chakrabarty 1 Introduction So far, we have treated transistors

More information

Fundamentals of the Metal Oxide Semiconductor Field-Effect Transistor

Fundamentals of the Metal Oxide Semiconductor Field-Effect Transistor Triode Working FET Fundamentals of the Metal Oxide Semiconductor Field-Effect Transistor The characteristics of energy bands as a function of applied voltage. Surface inversion. The expression for the

More information

Lecture 12: MOSFET Devices

Lecture 12: MOSFET Devices Lecture 12: MOSFET Devices Gu-Yeon Wei Division of Engineering and Applied Sciences Harvard University guyeon@eecs.harvard.edu Wei 1 Overview Reading S&S: Chapter 5.1~5.4 Supplemental Reading Background

More information

EEC 118 Lecture #2: MOSFET Structure and Basic Operation. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation

EEC 118 Lecture #2: MOSFET Structure and Basic Operation. Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation EEC 118 Lecture #2: MOSFET Structure and Basic Operation Rajeevan Amirtharajah University of California, Davis Jeff Parkhurst Intel Corporation Announcements Lab 1 this week, report due next week Bring

More information

Lecture 5: CMOS Transistor Theory

Lecture 5: CMOS Transistor Theory Lecture 5: CMOS Transistor Theory Slides courtesy of Deming Chen Slides based on the initial set from David Harris CMOS VLSI Design Outline q q q q q q q Introduction MOS Capacitor nmos I-V Characteristics

More information

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

ESE 570: Digital Integrated Circuits and VLSI Fundamentals ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 4: January 24, 2017 MOS Transistor Theory, MOS Model Penn ESE 570 Spring 2017 Khanna Lecture Outline! Semiconductor Physics " Band gaps "

More information

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

ESE 570: Digital Integrated Circuits and VLSI Fundamentals ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 4: January 23, 2018 MOS Transistor Theory, MOS Model Penn ESE 570 Spring 2018 Khanna Lecture Outline! CMOS Process Enhancements! Semiconductor

More information

FIELD-EFFECT TRANSISTORS

FIELD-EFFECT TRANSISTORS FIEL-EFFECT TRANSISTORS 1 Semiconductor review 2 The MOS capacitor 2 The enhancement-type N-MOS transistor 3 I-V characteristics of enhancement MOSFETS 4 The output characteristic of the MOSFET in saturation

More information

Today s lecture. EE141- Spring 2003 Lecture 4. Design Rules CMOS Inverter MOS Transistor Model

Today s lecture. EE141- Spring 2003 Lecture 4. Design Rules CMOS Inverter MOS Transistor Model - Spring 003 Lecture 4 Design Rules CMOS Inverter MOS Transistor Model Today s lecture Design Rules The CMOS inverter at a glance An MOS transistor model for manual analysis Important! Labs start next

More information

Integrated Circuits & Systems

Integrated Circuits & Systems Federal University of Santa Catarina Center for Technology Computer Science & Electronics Engineering Integrated Circuits & Systems INE 5442 Lecture 10 MOSFET part 1 guntzel@inf.ufsc.br ual-well Trench-Isolated

More information

Lecture 3: CMOS Transistor Theory

Lecture 3: CMOS Transistor Theory Lecture 3: CMOS Transistor Theory Outline Introduction MOS Capacitor nmos I-V Characteristics pmos I-V Characteristics Gate and Diffusion Capacitance 2 Introduction So far, we have treated transistors

More information

The Intrinsic Silicon

The Intrinsic Silicon The Intrinsic ilicon Thermally generated electrons and holes Carrier concentration p i =n i ni=1.45x10 10 cm-3 @ room temp Generally: n i = 3.1X10 16 T 3/2 e -1.21/2KT cm -3 T= temperature in K o (egrees

More information

The Gradual Channel Approximation for the MOSFET:

The Gradual Channel Approximation for the MOSFET: 6.01 - Electronic Devices and Circuits Fall 003 The Gradual Channel Approximation for the MOSFET: We are modeling the terminal characteristics of a MOSFET and thus want i D (v DS, v GS, v BS ), i B (v

More information

MOS Transistor Properties Review

MOS Transistor Properties Review MOS Transistor Properties Review 1 VLSI Chip Manufacturing Process Photolithography: transfer of mask patterns to the chip Diffusion or ion implantation: selective doping of Si substrate Oxidation: SiO

More information

Lecture 12: MOS Capacitors, transistors. Context

Lecture 12: MOS Capacitors, transistors. Context Lecture 12: MOS Capacitors, transistors Context In the last lecture, we discussed PN diodes, and the depletion layer into semiconductor surfaces. Small signal models In this lecture, we will apply those

More information

Lecture Outline. ESE 570: Digital Integrated Circuits and VLSI Fundamentals. Review: MOSFET N-Type, P-Type. Semiconductor Physics.

Lecture Outline. ESE 570: Digital Integrated Circuits and VLSI Fundamentals. Review: MOSFET N-Type, P-Type. Semiconductor Physics. ESE 57: Digital Integrated Circuits and VLSI Fundamentals Lec 4: January 24, 217 MOS Transistor Theory, MOS Model Lecture Outline! Semiconductor Physics " Band gaps " Field Effects! MOS Physics " Cutoff

More information

Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. The Devices. July 30, Devices.

Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. The Devices. July 30, Devices. Digital Integrated Circuits A Design Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The July 30, 2002 1 Goal of this chapter Present intuitive understanding of device operation Introduction

More information

Lecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET:

Lecture 15: MOS Transistor models: Body effects, SPICE models. Context. In the last lecture, we discussed the modes of operation of a MOS FET: Lecture 15: MOS Transistor models: Body effects, SPICE models Context In the last lecture, we discussed the modes of operation of a MOS FET: oltage controlled resistor model I- curve (Square-Law Model)

More information

B.Supmonchai June 26, q Introduction of device basic equations. q Introduction of models for manual analysis.

B.Supmonchai June 26, q Introduction of device basic equations. q Introduction of models for manual analysis. June 26, 2004 oal of this chapter Chapter 2 MO Transistor Theory oonchuay upmonchai Integrated esign Application Research (IAR) Laboratory June 16th, 2004; Revised June 16th, 2005 q Present intuitive understanding

More information

Final Examination EE 130 December 16, 1997 Time allotted: 180 minutes

Final Examination EE 130 December 16, 1997 Time allotted: 180 minutes Final Examination EE 130 December 16, 1997 Time allotted: 180 minutes Problem 1: Semiconductor Fundamentals [30 points] A uniformly doped silicon sample of length 100µm and cross-sectional area 100µm 2

More information

Lecture 4: CMOS Transistor Theory

Lecture 4: CMOS Transistor Theory Introduction to CMOS VLSI Design Lecture 4: CMOS Transistor Theory David Harris, Harvey Mudd College Kartik Mohanram and Steven Levitan University of Pittsburgh Outline q Introduction q MOS Capacitor q

More information

! CMOS Process Enhancements. ! Semiconductor Physics. " Band gaps. " Field Effects. ! MOS Physics. " Cut-off. " Depletion.

! CMOS Process Enhancements. ! Semiconductor Physics.  Band gaps.  Field Effects. ! MOS Physics.  Cut-off.  Depletion. ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 4: January 3, 018 MOS Transistor Theory, MOS Model Lecture Outline! CMOS Process Enhancements! Semiconductor Physics " Band gaps " Field Effects!

More information

Long-channel MOSFET IV Corrections

Long-channel MOSFET IV Corrections Long-channel MOSFET IV orrections Three MITs of the Day The body ect and its influence on long-channel V th. Long-channel subthreshold conduction and control (subthreshold slope S) Scattering components

More information

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002

The Devices. Digital Integrated Circuits A Design Perspective. Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic. July 30, 2002 igital Integrated Circuits A esign Perspective Jan M. Rabaey Anantha Chandrakasan Borivoje Nikolic The evices July 30, 2002 Goal of this chapter Present intuitive understanding of device operation Introduction

More information

Chapter 4 Field-Effect Transistors

Chapter 4 Field-Effect Transistors Chapter 4 Field-Effect Transistors Microelectronic Circuit Design Richard C. Jaeger Travis N. Blalock 5/5/11 Chap 4-1 Chapter Goals Describe operation of MOSFETs. Define FET characteristics in operation

More information

Chapter 2 MOS Transistor theory

Chapter 2 MOS Transistor theory Chapter MOS Transistor theory.1 Introduction An MOS transistor is a majority-carrier device, which the current a conductg channel between the source and the dra is modulated by a voltage applied to the

More information

ECE 546 Lecture 10 MOS Transistors

ECE 546 Lecture 10 MOS Transistors ECE 546 Lecture 10 MOS Transistors Spring 2018 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jesa@illinois.edu NMOS Transistor NMOS Transistor N-Channel MOSFET Built on p-type

More information

Fig. 1 CMOS Transistor Circuits (a) Inverter Out = NOT In, (b) NOR-gate C = NOT (A or B)

Fig. 1 CMOS Transistor Circuits (a) Inverter Out = NOT In, (b) NOR-gate C = NOT (A or B) 1 Introduction to Transistor-Level Logic Circuits 1 By Prawat Nagvajara At the transistor level of logic circuits, transistors operate as switches with the logic variables controlling the open or closed

More information

EE 560 MOS TRANSISTOR THEORY

EE 560 MOS TRANSISTOR THEORY 1 EE 560 MOS TRANSISTOR THEORY PART 1 TWO TERMINAL MOS STRUCTURE V G (GATE VOLTAGE) 2 GATE OXIDE SiO 2 SUBSTRATE p-type doped Si (N A = 10 15 to 10 16 cm -3 ) t ox V B (SUBSTRATE VOLTAGE) EQUILIBRIUM:

More information

FIELD EFFECT TRANSISTORS:

FIELD EFFECT TRANSISTORS: Chapter 10 FIEL EFFECT TRANITOR: MOFET The following overview gures describe important issues related to the most important electronic device. NUMBER OF ACTIVE EVICE/CHIP MOORE' LAW Gordon Moore, co-founder

More information

Lecture 2. OUTLINE Basic Semiconductor Physics (cont d) PN Junction Diodes. Reading: Chapter Carrier drift and diffusion

Lecture 2. OUTLINE Basic Semiconductor Physics (cont d) PN Junction Diodes. Reading: Chapter Carrier drift and diffusion Lecture 2 OUTLIE Basic Semiconductor Physics (cont d) Carrier drift and diffusion P unction Diodes Electrostatics Caacitance Reading: Chater 2.1 2.2 EE105 Sring 2008 Lecture 1, 2, Slide 1 Prof. Wu, UC

More information

Lecture 04 Review of MOSFET

Lecture 04 Review of MOSFET ECE 541/ME 541 Microelectronic Fabrication Techniques Lecture 04 Review of MOSFET Zheng Yang (ERF 3017, email: yangzhen@uic.edu) What is a Transistor? A Switch! An MOS Transistor V GS V T V GS S Ron D

More information

The Devices. Jan M. Rabaey

The Devices. Jan M. Rabaey The Devices Jan M. Rabaey Goal of this chapter Present intuitive understanding of device operation Introduction of basic device equations Introduction of models for manual analysis Introduction of models

More information

Course Administration. CPE/EE 427, CPE 527 VLSI Design I L04: MOS Transistors. Review: CMOS Process at a Glance

Course Administration. CPE/EE 427, CPE 527 VLSI Design I L04: MOS Transistors. Review: CMOS Process at a Glance Course Administration CPE/EE 7, CPE 7 VLI esign I L: MO Transistors epartment of Electrical and Computer Engineering University of Alabama in Huntsville Aleksandar Milenkovic ( www.ece.uah.edu/~milenka

More information

Lecture #25. Due in class (5 PM) on Thursday May 1 st. 20 pt penalty for late submissions, accepted until 5 PM on 5/8

Lecture #25. Due in class (5 PM) on Thursday May 1 st. 20 pt penalty for late submissions, accepted until 5 PM on 5/8 ecture #5 Design Project: Due in class (5 PM on hursday May 1 st 0 pt penalty for late submissions, accepted until 5 PM on 5/8 Your J design does not need to meet the performance specifications when and

More information

CMOS INVERTER. Last Lecture. Metrics for qualifying digital circuits. »Cost» Reliability» Speed (delay)»performance

CMOS INVERTER. Last Lecture. Metrics for qualifying digital circuits. »Cost» Reliability» Speed (delay)»performance CMOS INVERTER Last Lecture Metrics for qualifying digital circuits»cost» Reliability» Speed (delay)»performance 1 Today s lecture The CMOS inverter at a glance An MOS transistor model for manual analysis

More information

Microelectronics Part 1: Main CMOS circuits design rules

Microelectronics Part 1: Main CMOS circuits design rules GBM8320 Dispositifs Médicaux telligents Microelectronics Part 1: Main CMOS circuits design rules Mohamad Sawan et al. Laboratoire de neurotechnologies Polystim! http://www.cours.polymtl.ca/gbm8320/! med-amine.miled@polymtl.ca!

More information

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

ESE 570: Digital Integrated Circuits and VLSI Fundamentals ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 5: January 25, 2018 MOS Operating Regions, pt. 1 Lecture Outline! 3 Regions of operation for MOSFET " Subthreshold " Linear " Saturation!

More information

Lecture 010 ECE4430 Review I (12/29/01) Page 010-1

Lecture 010 ECE4430 Review I (12/29/01) Page 010-1 Lecture 010 4430 Review I (12/29/01) Page 0101 LTUR 010 4430 RVIW I (RAIN: HLM hap. 1) Objective The objective of this presentation is: 1.) Identify the prerequisite material as taught in 4430 2.) Insure

More information

Important! EE141- Fall 2002 Lecture 5. CMOS Inverter MOS Transistor Model

Important! EE141- Fall 2002 Lecture 5. CMOS Inverter MOS Transistor Model - Fall 00 Lecture 5 CMO Inverter MO Transistor Model Important! Lab 3 this week You must show up in one of the lab sessions this week If you don t show up you will be dropped from the class» Unless you

More information

MOS Transistor Theory MOSFET Symbols Current Characteristics of MOSFET. MOS Symbols and Characteristics. nmos Enhancement Transistor

MOS Transistor Theory MOSFET Symbols Current Characteristics of MOSFET. MOS Symbols and Characteristics. nmos Enhancement Transistor MOS Transistor Theory MOSFET Symbols Current Characteristics of MOSFET Calculation of t and Important 2 nd Order Effects SmallSignal Signal MOSFET Model Summary Material from: CMOS LSI Design By Weste

More information

Circuits. L2: MOS Models-2 (1 st Aug. 2013) B. Mazhari Dept. of EE, IIT Kanpur. B. Mazhari, IITK. G-Number

Circuits. L2: MOS Models-2 (1 st Aug. 2013) B. Mazhari Dept. of EE, IIT Kanpur. B. Mazhari, IITK. G-Number EE610: CMOS Analog Circuits L: MOS Models- (1 st Aug. 013) B. Mazhari Dept. of EE, IIT Kanpur 3 NMOS Models MOS MODEL Above Threshold Subthreshold ( GS > TN ) ( GS < TN ) Saturation ti Ti Triode ( DS >

More information

VLSI Design I; A. Milenkovic 1

VLSI Design I; A. Milenkovic 1 Review: implified CMO Inverter Process CPE/EE 7, CPE 7 VLI esign I L: MO Transistor cut line epartment of Electrical and Computer Engineering University of Alabama in Huntsville Aleksandar Milenkovic (

More information

The Devices. Devices

The Devices. Devices The The MOS Transistor Gate Oxyde Gate Source n+ Polysilicon Drain n+ Field-Oxyde (SiO 2 ) p-substrate p+ stopper Bulk Contact CROSS-SECTION of NMOS Transistor Cross-Section of CMOS Technology MOS transistors

More information

MOS CAPACITOR AND MOSFET

MOS CAPACITOR AND MOSFET EE336 Semiconductor Devices 1 MOS CAPACITOR AND MOSFET Dr. Mohammed M. Farag Ideal MOS Capacitor Semiconductor Devices Physics and Technology Chapter 5 EE336 Semiconductor Devices 2 MOS Capacitor Structure

More information

EE5311- Digital IC Design

EE5311- Digital IC Design EE5311- Digital IC Design Module 1 - The Transistor Janakiraman V Assistant Professor Department of Electrical Engineering Indian Institute of Technology Madras Chennai October 28, 2017 Janakiraman, IITM

More information

VLSI Design The MOS Transistor

VLSI Design The MOS Transistor VLSI Design The MOS Transistor Frank Sill Torres Universidade Federal de Minas Gerais (UFMG), Brazil VLSI Design: CMOS Technology 1 Outline Introduction MOS Capacitor nmos I-V Characteristics pmos I-V

More information

EE105 - Fall 2005 Microelectronic Devices and Circuits

EE105 - Fall 2005 Microelectronic Devices and Circuits EE105 - Fall 005 Microelectronic Devices and Circuits ecture 7 MOS Transistor Announcements Homework 3, due today Homework 4 due next week ab this week Reading: Chapter 4 1 ecture Material ast lecture

More information

Electrical Characteristics of MOS Devices

Electrical Characteristics of MOS Devices Electrical Characteristics of MOS Devices The MOS Capacitor Voltage components Accumulation, Depletion, Inversion Modes Effect of channel bias and substrate bias Effect of gate oide charges Threshold-voltage

More information

University of Pennsylvania Department of Electrical Engineering. ESE 570 Midterm Exam March 14, 2013 FORMULAS AND DATA

University of Pennsylvania Department of Electrical Engineering. ESE 570 Midterm Exam March 14, 2013 FORMULAS AND DATA University of Pennsylvania Department of Electrical Engineering ESE 570 Midterm Exam March 4, 03 FORMULAS AND DATA. PHYSICAL CONSTANTS: n i = intrinsic concentration undoped) silicon =.45 x 0 0 cm -3 @

More information

Operation and Modeling of. The MOS Transistor. Second Edition. Yannis Tsividis Columbia University. New York Oxford OXFORD UNIVERSITY PRESS

Operation and Modeling of. The MOS Transistor. Second Edition. Yannis Tsividis Columbia University. New York Oxford OXFORD UNIVERSITY PRESS Operation and Modeling of The MOS Transistor Second Edition Yannis Tsividis Columbia University New York Oxford OXFORD UNIVERSITY PRESS CONTENTS Chapter 1 l.l 1.2 1.3 1.4 1.5 1.6 1.7 Chapter 2 2.1 2.2

More information

Long Channel MOS Transistors

Long Channel MOS Transistors Long Channel MOS Transistors The theory developed for MOS capacitor (HO #2) can be directly extended to Metal-Oxide-Semiconductor Field-Effect transistors (MOSFET) by considering the following structure:

More information

an introduction to Semiconductor Devices

an introduction to Semiconductor Devices an introduction to Semiconductor Devices Donald A. Neamen Chapter 6 Fundamentals of the Metal-Oxide-Semiconductor Field-Effect Transistor Introduction: Chapter 6 1. MOSFET Structure 2. MOS Capacitor -

More information

ECE321 Electronics I

ECE321 Electronics I EE31 Electronics I Lecture 8: MOSET Threshold Voltage and Parasitic apacitances Payman Zarkesh-Ha Office: EE Bldg. 3B Office hours: Tuesday :-3:PM or by appointment E-mail: payman@ece.unm.edu Slide: 1

More information

MOS Capacitor MOSFET Devices. MOSFET s. INEL Solid State Electronics. Manuel Toledo Quiñones. ECE Dept. UPRM.

MOS Capacitor MOSFET Devices. MOSFET s. INEL Solid State Electronics. Manuel Toledo Quiñones. ECE Dept. UPRM. INEL 6055 - Solid State Electronics ECE Dept. UPRM 20th March 2006 Definitions MOS Capacitor Isolated Metal, SiO 2, Si Threshold Voltage qφ m metal d vacuum level SiO qχ 2 E g /2 qφ F E C E i E F E v qφ

More information

Transistors - a primer

Transistors - a primer ransistors - a primer What is a transistor? Solid-state triode - three-terminal device, with voltage (or current) at third terminal used to control current between other two terminals. wo types: bipolar

More information

Lecture Outline. ESE 570: Digital Integrated Circuits and VLSI Fundamentals. Review: MOS Capacitor with External Bias

Lecture Outline. ESE 570: Digital Integrated Circuits and VLSI Fundamentals. Review: MOS Capacitor with External Bias ESE 57: Digital Integrated Circuits and VLSI Fundamentals Lec 5: Januar 6, 17 MOS Operating Regions, pt. 1 Lecture Outline! 3 Regions of operation for MOSFET " Subthreshold " Linear " Saturation! Level

More information

Introduction and Background

Introduction and Background Analog CMOS Integrated Circuit Design Introduction and Background Dr. Jawdat Abu-Taha Department of Electrical and Computer Engineering Islamic University of Gaza jtaha@iugaza.edu.ps 1 Marking Assignments

More information

EE115C Winter 2017 Digital Electronic Circuits. Lecture 3: MOS RC Model, CMOS Manufacturing

EE115C Winter 2017 Digital Electronic Circuits. Lecture 3: MOS RC Model, CMOS Manufacturing EE115C Winter 2017 Digital Electronic Circuits Lecture 3: MOS RC Model, CMOS Manufacturing Agenda MOS Transistor: RC Model (pp. 104-113) S R on D CMOS Manufacturing Process (pp. 36-46) S S C GS G G C GD

More information

! PN Junction. ! MOS Transistor Topology. ! Threshold. ! Operating Regions. " Resistive. " Saturation. " Subthreshold (next class)

! PN Junction. ! MOS Transistor Topology. ! Threshold. ! Operating Regions.  Resistive.  Saturation.  Subthreshold (next class) ESE370: ircuitlevel Modeling, Design, and Optimization for Digital Systems Lec 7: September 20, 2017 MOS Transistor Operating Regions Part 1 Today! PN Junction! MOS Transistor Topology! Threshold! Operating

More information

ECE 497 JS Lecture - 12 Device Technologies

ECE 497 JS Lecture - 12 Device Technologies ECE 497 JS Lecture - 12 Device Technologies Spring 2004 Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jose@emlab.uiuc.edu 1 NMOS Transistor 2 ρ Source channel charge density

More information

MOS Transistor. EE141-Fall 2007 Digital Integrated Circuits. Review: What is a Transistor? Announcements. Class Material

MOS Transistor. EE141-Fall 2007 Digital Integrated Circuits. Review: What is a Transistor? Announcements. Class Material EE-Fall 7 igital Integrated Circuits MO Transistor Lecture MO Transistor Model Announcements Review: hat is a Transistor? Lab this week! Lab next week Homework # is due Thurs. Homework # due next Thurs.

More information

ESE 570: Digital Integrated Circuits and VLSI Fundamentals

ESE 570: Digital Integrated Circuits and VLSI Fundamentals ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 4: January 29, 2019 MOS Transistor Theory, MOS Model Penn ESE 570 Spring 2019 Khanna Lecture Outline! CMOS Process Enhancements! Semiconductor

More information

ECEN474/704: (Analog) VLSI Circuit Design Spring 2018

ECEN474/704: (Analog) VLSI Circuit Design Spring 2018 ECEN474/704: (Analog) SI Circuit Design Spring 2018 ecture 2: MOS ransistor Modeling Sam Palermo Analog & Mixed-Signal Center exas A&M University Announcements If you haven t already, turn in your 0.18um

More information

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson

Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics. Lena Peterson Lecture 13 MOSFET as an amplifier with an introduction to MOSFET small-signal model and small-signal schematics Lena Peterson 2015-10-13 Outline (1) Why is the CMOS inverter gain not infinite? Large-signal

More information

Nanoscale CMOS Design Issues

Nanoscale CMOS Design Issues Nanoscale CMOS Design Issues Jaydeep P. Kulkarni Assistant Professor, ECE Department The University of Texas at Austin jaydeep@austin.utexas.edu Fall, 2017, VLSI-1 Class Transistor I-V Review Agenda Non-ideal

More information

ECE606: Solid State Devices Lecture 22 MOScap Frequency Response MOSFET I-V Characteristics

ECE606: Solid State Devices Lecture 22 MOScap Frequency Response MOSFET I-V Characteristics EE66: olid tate evices Lecture 22 MOcap Frequency Response MOFET I- haracteristics erhard Klimeck gekco@purdue.edu. Background 2. mall signal capacitances 3. Large signal capacitance 4. Intermediate ummary

More information

EECS130 Integrated Circuit Devices

EECS130 Integrated Circuit Devices EECS130 Integrated Circuit Devices Professor Ali Javey 10/30/2007 MOSFETs Lecture 4 Reading: Chapter 17, 19 Announcements The next HW set is due on Thursday. Midterm 2 is next week!!!! Threshold and Subthreshold

More information

Objective and Outline. Acknowledgement. Objective: Power Components. Outline: 1) Acknowledgements. Section 4: Power Components

Objective and Outline. Acknowledgement. Objective: Power Components. Outline: 1) Acknowledgements. Section 4: Power Components Objective: Power Components Outline: 1) Acknowledgements 2) Objective and Outline 1 Acknowledgement This lecture note has been obtained from similar courses all over the world. I wish to thank all the

More information

Semiconductor Physics Problems 2015

Semiconductor Physics Problems 2015 Semiconductor Physics Problems 2015 Page and figure numbers refer to Semiconductor Devices Physics and Technology, 3rd edition, by SM Sze and M-K Lee 1. The purest semiconductor crystals it is possible

More information

Device Models (PN Diode, MOSFET )

Device Models (PN Diode, MOSFET ) Device Models (PN Diode, MOSFET ) Instructor: Steven P. Levitan steve@ece.pitt.edu TA: Gayatri Mehta, José Martínez Book: Digital Integrated Circuits: A Design Perspective; Jan Rabaey Lab Notes: Handed

More information

Metal-oxide-semiconductor field effect transistors (2 lectures)

Metal-oxide-semiconductor field effect transistors (2 lectures) Metal-ide-semiconductor field effect transistors ( lectures) MOS physics (brief in book) Current-voltage characteristics - pinch-off / channel length modulation - weak inversion - velocity saturation -

More information

Field-Effect (FET) transistors

Field-Effect (FET) transistors Field-Effect (FET) transistors References: Barbow (Chapter 8), Rizzoni (chapters 8 & 9) In a field-effect transistor (FET), the width of a conducting channel in a semiconductor and, therefore, its current-carrying

More information

Section 12: Intro to Devices

Section 12: Intro to Devices Section 12: Intro to Devices Extensive reading materials on reserve, including Robert F. Pierret, Semiconductor Device Fundamentals EE143 Ali Javey Bond Model of Electrons and Holes Si Si Si Si Si Si Si

More information

Device Models (PN Diode, MOSFET )

Device Models (PN Diode, MOSFET ) Device Models (PN Diode, MOSFET ) Instructor: Steven P. Levitan steve@ece.pitt.edu TA: Gayatri Mehta, José Martínez Book: Digital Integrated Circuits: A Design Perspective; Jan Rabaey Lab Notes: Handed

More information

! MOS Capacitances. " Extrinsic. " Intrinsic. ! Lumped Capacitance Model. ! First Order Capacitor Summary. ! Capacitance Implications

! MOS Capacitances.  Extrinsic.  Intrinsic. ! Lumped Capacitance Model. ! First Order Capacitor Summary. ! Capacitance Implications ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 7: February, 07 MOS SPICE Models, MOS Parasitic Details Lecture Outline! MOS Capacitances " Extrinsic " Intrinsic! Lumped Capacitance Model!

More information

The Physical Structure (NMOS)

The Physical Structure (NMOS) The Physical Structure (NMOS) Al SiO2 Field Oxide Gate oxide S n+ Polysilicon Gate Al SiO2 SiO2 D n+ L channel P Substrate Field Oxide contact Metal (S) n+ (G) L W n+ (D) Poly 1 Transistor Resistance Two

More information

! CMOS Process Enhancements. ! Semiconductor Physics. " Band gaps. " Field Effects. ! MOS Physics. " Cut-off. " Depletion.

! CMOS Process Enhancements. ! Semiconductor Physics.  Band gaps.  Field Effects. ! MOS Physics.  Cut-off.  Depletion. ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 4: January 9, 019 MOS Transistor Theory, MOS Model Lecture Outline CMOS Process Enhancements Semiconductor Physics Band gaps Field Effects

More information

Semiconductor Physics fall 2012 problems

Semiconductor Physics fall 2012 problems Semiconductor Physics fall 2012 problems 1. An n-type sample of silicon has a uniform density N D = 10 16 atoms cm -3 of arsenic, and a p-type silicon sample has N A = 10 15 atoms cm -3 of boron. For each

More information

MOS Capacitors ECE 2204

MOS Capacitors ECE 2204 MOS apacitors EE 2204 Some lasses of Field Effect Transistors Metal-Oxide-Semiconductor Field Effect Transistor MOSFET, which will be the type that we will study in this course. Metal-Semiconductor Field

More information

1. The MOS Transistor. Electrical Conduction in Solids

1. The MOS Transistor. Electrical Conduction in Solids Electrical Conduction in Solids!The band diagram describes the energy levels for electron in solids.!the lower filled band is named Valence Band.!The upper vacant band is named conduction band.!the distance

More information

Electronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices

Electronic Circuits 1. Transistor Devices. Contents BJT and FET Characteristics Operations. Prof. C.K. Tse: Transistor devices Electronic Circuits 1 Transistor Devices Contents BJT and FET Characteristics Operations 1 What is a transistor? Three-terminal device whose voltage-current relationship is controlled by a third voltage

More information