The Intrinsic Silicon
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1 The Intrinsic ilicon Thermally generated electrons and holes Carrier concentration p i =n i ni=1.45x10 10 room temp Generally: n i = 3.1X10 16 T 3/2 e -1.21/2KT cm -3 T= temperature in K o (egrees Kelvin) K= Boltzmann Constant = 8.63X10-5 ev/k o
2 The Extrinsic ilicon Number of carriers is increased by introducing foreign atoms called impurities The process of introducing impurities is called doping Two Types of dopants: p type and n type p-type dopants: Boron (B), Gallium (G), Aluminum (Al) n-type dopants: Arsenics (Ar), Phosphorous (P), Antimony (b)
3 oping Concentration P-type: concentration = p = N A +p th N A = concentration of p type do pant (atoms/cm 3 ) p th = concentration of thermally generated holes (holes/cm 3 ) p N A (N A >> p th ) n-type: concentration = n = N +n th N = concentration of n type do pant (atoms/cm 3 ) n th = concentration of thermally generated electrons (electrons/cm 3 ) n N (N >> n th )
4 egrees of oping egree of concentration N - - or P - - : N or N A <10 14 cm -3 N - or P - : cm -3 <N or N A <10 16 cm -3 (lightly doped) N or P : cm -3 <N or N A <10 18 cm -3 (moderately dop N + or P + : cm -3 <N or N A <10 20 cm -3 (heavily doped) N ++ or P ++ : N or N A >10 20 cm -3
5 Review of the pn Junction Potential across pn junction: p type epletion Region n type = (KT/q) ln( N A.N /ni 2 ) epletion) region length: Xd = K [ [ (1/N A ) + (1/N )] ] 0.5 K constant a function of ( ε si, q ) P- N+ Junction Capacitance: Cj = Cjo / (1+V/ ) 0.5 It is a function of the applied voltage and doping concentration P+ N- Xd
6 Two terminal MO tructure Vg Gate Metal Insulator io2 ubstrate P+ v B epth of epletion region: X d = { 2 ε i. s - F } 0.5 The Charge ensity: Q = - { 2 q N A ε i. s - F } 0.5
7 The Physical tructure Al io 2 N+ P+ n Cross-section of pn -junction in an IC process n P+ Al Al
8 3 Perspective
9 Nmos Transistor Polycrystalline silicon G Gate oxide Gate NMO Enhancement G B (Bulk) NMO with Bulk Contact
10 The Physical tructure (NMO) Al io2 Field Oxide Gate oxide n+ Polysilicon Gate Al io2 io2 n+ L channel Field Oxide P ubstrate contact Metal () n+ (G) L W n+ () Poly The process and sequence is designed by the fabrication house You design the MAK
11 Regimes of Operation 1. Accumulation V G is negative Majority carries attracted to the surface 2. epletion V G increased by a small amount Majority carriers depleted pace charge (depletion) region formed 3. Inversion VG increased further Minority carriers attracted to surface Inverted surface provides conduction Inverted surface to N-type N+ -Ve charge p-type p-type G p-type G G N+ -Ve charge
12 The Threshold Voltage The voltage applied between the gate and the source which causes the beginning of the channel surface strong inversion. Threshold voltage V t is a function of : V fb = flatband voltage; depends on difference in work function between gate and substrate and on fixed surface charge. s = surface potential. Gate oxide thickness. Charge in the channel area. Additional ion implantation. Typical values: 0.2V to 1.0V for NMO and -0.2 to -1.0V for PMO
13 Threshold Adjust Threshold voltage is a function of source to substrate voltage V B. Body factor is the coefficient for the V B dependence factor. G B V T = V TO + V B s is the surface potential ~ -0.6V for NMO is the body factor ~ 0.6 to 1.2 V 1/2, Φs =2Φ F V B Fermi potential Φ F is is ve in nmo, +ve in pmo The body effect coefficient γ is +ve in nmo, -ve in pmo The substrate bias voltage V B is +ve in nmo, -ve in pmo
14 Threshold Adjust Ion Implantation (dopant) nmo transistors implanted with n-type dopant results in a decrease in threshold voltage An effective mean to adjust the threshold is to change the doping concentration through an ion implantation dose. nmo transistors implanted with p-type dopant results in an increase in the threshold voltage. channel p ubstrate V TO =V TO + (q. I /Cox) I = dose of dopant in the channel area(atoms/cm 2 ) C ox = gate oxide capacitance per unit area
15 Threshold Adjust Continued Example of Numerical Values for our process C OX *10 pf / m o 200A q 1.6*10 19 Col / atom I *10 F 10 * *10 Col / atom 10 cm *10 atom / cm 2 2
16 Threshold Adjust epletion NMO transistor Heavy ion implantation of n dopant in the channel area results in negative threshold voltage Transistor conducts with zero gate to source voltage. It is called epletion mode transistor Field threshold adjust Required to minimize interaction between transistors. Heavy implantation called p- guard/n-guard VTF = 12 to 22V P+ n+ G NMO epletion Al n+ n+ n+ P+ P+
17 Current-Voltage Relations V G G V I n + n + p -substrate MO transistor and its bias conditions
18 Gate Voltage and the Channel gate V G > V T V < (V G -V T ) source I d channel drain gate V G > V T V = (V G V T ) source I d drain V G > V T V > (V G-V T ) source drain gate I d
19 Qualitative Operation of NMO Transistor 1. Cut-Off Region V G < V T No Inversion or Weak Inversion I = leakage current or sub-threshold current 2. Linear Region V G > V T and V < V G -V T Channel surface is inverted Output current depends on V G and V The relationship between I and V is almost linear I = K' W ---- V L G V 1 T V -- V 2 2
20 NMO Operation-Linear I = K' W ---- V L G V 1 T V -- V 2 2 K = C Process Tranconductance ua/v 2 for 0.35u, ox K (Kp)=196uA/ V 2 C ox Gate oxide capacitance per unit area ox = t ox ox = 3.9 x o = 3.45 x F/m t ox Oxide thickness for 0.35 u and tox=100a o Quick calculation of Cox: Cox= / tox (A o ) pf/um 2 u = mobility of electrons 550 cm 2 /V-sec for 0.35 u process I VG V
21 NMO Operation-Linear Effect of W/L W/L Ids W W Effect of temperature Impact of oxide thickness temp u Ids tox K Ids
22 Transistor in aturation Electrons leaving channel are injected in depletion region and accelerated towards drain V G G V > V G - V T Voltage across channel tends to remain constant The current I saturates with very weak dependence on V I = K' W V V 2L G T n+ - V G - V T V n+ = channel length modulation parameter typical values 0.01V -1 to 0.1
23 I-V Relation V = V G -V T V G = 5V I ( m A ) 2 1 Linear aturation V G = 4V V G = 3V q u a r e e p e n d e n c e I ubthreshold Current V G = 2V V G = 1V V (V) (a) I as a function of V 0.0 V T V G (V) (b) I as a function of V G (for V = 5V). NMO Enhancement Transistor
24 Variations in Width and Length 1. Width Oxide encroachment polysilicon W eff = W drawn - 2W W W eff W drawn W polysilicon 2. Length Lateral diffusion L = 0.7Xj L eff = L drawn - 2L L drawn L L eff L
25 The PMO Transistor Al io2 Field Oxide Gate oxide p+ Polysilicon Gate Al io2 io2 p+ L channel N ubstrate Field Oxide G G B PMO Enhancement PMO with Bulk Contact
26 The CMO V V Prentice Hall/Rabaey
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