Long Channel MOS Transistors

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1 Long Channel MOS Transistors The theory developed for MOS capacitor (HO #2) can be directly extended to Metal-Oxide-Semiconductor Field-Effect transistors (MOSFET) by considering the following structure: The gate bias, provides the control of surface carrier densities. For < th (threshold voltage), the structure consists of two back to back diodes and only leakage currents flow ( I o of PN junctions), i.e., I 0 For > th, inversion layer exists, a conducting channel exists from S and current I will flow. Where th is determined by the properties of the structure. S n+ n+ P HO #3: ELEN Review MOS Transistors Page 1

2 Long Channel MOS Transistors th is given by Eq we derived for MOS capacitors. That is, th where φ Q C φ B N ms f B a = φ ms Q C f + 2φ bulk potential = substrate bias B + 2qN a HO #3: ELEN Review MOS Transistors Page 2 K s ε (2φ C o = channel doping concentration B B ) (1) = work function between metal and semiconductor = interface charge density = gate ide capacitance = n - channel MOSFETs : p - channel MOSFETs : th th > 0 < 0

3 1. NMOSFETs: Band iagram E F = 0 = > 0 = 0 HO #3: ELEN Review MOS Transistors Page 3

4 NMOSFETs: Band iagram > > 0 th HO #3: ELEN Review MOS Transistors Page 4

5 2. NMOSFETs: I - Characteristics HO #3: ELEN Review MOS Transistors Page 5

6 NMOSFETs: I - Characteristics HO #3: ELEN Review MOS Transistors Page 6

7 I Characteristics: Basic Equations + + x y n+ n+ Q I (y) Q B (y) P Inversion layer I epletion region Note: The depletion region is wider around the drain because of the applied drain voltage. The potential along the channel varies y = L to y = 0 between the drain and source. The channel charge Q I and the bulk charge Q B will in general be f(y) because of the influence of, i.e. potential varies along the channel length. HO #3: ELEN Review MOS Transistors Page 7

8 2. Charge 3. I Characteristics: Basic Equations 1. rain Current : I Q I = J xdydz = W ( y) ( y) = density in the channel: = C [ ( y) ] Q µ E required to induce inversion under the influence of th fb 1 + C th 2K ε s I [ 2φ ( ( y) )] + 2φ + ( ) where W = width of the device (y) = voltage drop along the channel due to Solving the above three Eq we get I - characteristics. n x dy is : 0qNa B B B y HO #3: ELEN Review MOS Transistors Page 8

9 I Characteristics: Basic Equations Linear Region ( Saturation I I I Linear Region = W L µ C n Region ( W µ nc 2L = SAT Saturation Region,, ( ) 2 th th th th < 2 SAT ) : > I ((amps) 1/2 ) SAT ) : (olts) HO #3: ELEN Review MOS Transistors Page 9

10 3. MOS evice Scaling Benefits of scaling MOSFETs: 1. increase device packing density 2. improve frequency response (transit time) 1/L n+ t L P l o n+ x j 3. improve current drive (transconductance, g m ) g m I = W K µ n L t W L = constant K µ n t ε ε 0 0, for (linear region) ( ), for > (saturation region) th < SAT SAT HO #3: ELEN Review MOS Transistors Page 10

11 g m I = W L W L K µ n t = constant K µ n t ε ε MOS evice Scaling 0 0, for (linear region) ( ), for > (saturation region) th < SAT SAT Note that g m and therefore, the current drive of MOSFETs can be increased by: decreasing the channel length, L decreasing the gate ide thickness, t Therefore, much of the scaling is driven by decrease in L and t. HO #3: ELEN Review MOS Transistors Page 11

12 MOS evice Scaling Though, MOSFET scaling is driven by scaling down L and t, many problems such as increased electric fields are encountered if scaled only these two parameters. In 1974, ennard et al. proposed a scaling methodology which maintains the electric field in the device constants. (R.H. ennard, et al., IEEE JSSC, vol. 9, p , 1974). evice/circuit parameters Constant field scaling factor imension: t, L, W, x j, l o 1/K Substrate doping: N a K Supply voltage: 1/K Supply current: I 1/K Parasitic capacitance: WL / t 1/K ate delay: C / I 1/K Power dissipation: C 2 / delay 1/K 2 HO #3: ELEN Review MOS Transistors Page 12

13 MOS evice Scaling In practice, constant field scaling has not been strictly observed. Since I gate overdrive, ( th ), thus, the demands for high performance have dictated the use of higher supply voltage. However, high supply voltage implies increased power dissipation (C 2 f). In the recent past, low power applications have become important and have required a scaling scenario with lower supply voltage. Parameters Channel length (µm) ate ide (nm) Junction depth (µm) > Supply voltage HO #3: ELEN Review MOS Transistors Page 13

14 MOS evice Scaling Ref: B. avari, et al., Proc. IEEE, April 1995 evice/circuit parameters Quasi Constant voltage scaling (K > B > 1) imension: t, L, W, x j, l o 1/K Substrate doping: N a K Supply voltage: 1/B HO #3: ELEN Review MOS Transistors Page 14

15 4. Limitations of Scaled MOSFETs A number of factors have been neglected in the simple MOS theory which became increasingly important in scaled devices. φ bi, φ F, and φ ms of S/ junctions were neglected th dependence on W, L, and is not predicted by simple theory I 0 for < th. Rather I is exponentially dependent on. Current flow S can be initiated by rather than. This can be modeled by a th which depends on and. Since ε fields cannot be held constant because of φ bi etc. (and because has not been scaled in the industry), higher ε higher carrier velocity. Material limits like v sat become important. HO #3: ELEN Review MOS Transistors Page 15

16 4(a). Effect of Scaling own L: th degradation In long channel MOSFETs, the gate is completely responsible for depleting the semiconductor (Q B ). In very short devices, part of the depletion is accomplished by the drain and source biases. Since less is required to deplete Q B, th as L. Similarly, as, more Q B is depleted by and hence th. This effect dominates in lightly doped substrates. HO #3: ELEN Review MOS Transistors Page 16

17 Effect of Scaling own L: Punchthrough If the channel length, L becomes too short, the depletion region from the drain can reach source side reducing e- injection barrier. This phenomenon is known as punchthrough. HO #3: ELEN Review MOS Transistors Page 17

18 Effect of Scaling own L: IBL In very short channel devices: less is required to deplete Q B the barrier to electron injection from source to drain decreases. I at a given. This effect is known as the drain induced barrier lowering (IBL). HO #3: ELEN Review MOS Transistors Page 18

19 Effect of Scaling L: Effect of IBL on I IBL results in an increase in I at a given. th as L. Similarly, as, more Q B is depleted by and hence th. HO #3: ELEN Review MOS Transistors Page 19

20 4(b). Carrier Mobility: elocity Saturation The mobility of the carriers reduces at higher e-fields in small channel length devices due to velocity saturation (v sat ). Thus, I SAT ( th ) for short As L, while constant: - lateral e-field HO #3: ELEN Review MOS Transistors Page 20 - carrier velocity v E c 10 4 /cm for e-. for nmosfets with L < 1 µm, v sat causes current to saturate for < ( th ). I WC ( ) v SAT L devices instead of square law. th sat

21 Effect of sat on MOSFET I - Characteristics MOSFETs with: L = 2.7 um t = 500 A (a) (b) (c) (a) Experimental data; (b) simulated data including velocity saturation; (c) simulated data ignoring velocity saturation. HO #3: ELEN Review MOS Transistors Page 21

22 4(c). Sub-threshold Conduction For < th, the surface is in weak inversion and a conducting channel starts to form. As a result, a low level of current flows between the source and drain. I S In MOS subthreshold slope, S is limited to kt/q (60 mv/dec I) I leakage ; Static power ; and circuit instability. HO #3: ELEN Review MOS Transistors Page 22

23 4(d). Hot Carrier Effects n+ Source ate I g hot e hole I sub > SAT n+ rain The maximum e-field at the drain-substrate junction is: max 2qN ( φ HO #3: ELEN Review MOS Transistors Page 23 E = a K s i ε 0 As L, in the channel near the drain E max more rapidly than long L devices. The free carriers passing through the high e-field gain sufficient energy to cause hot-carrier effects. )

24 Hot Carrier Effects HO #3: ELEN Review MOS Transistors Page 24

25 Hot Carrier Effects I sub flowing into the substrate causes an IR drop in the substrate resulting in Body bias Substrate Current induced Body Effect (SCBE). SCBE results in th drop and manifold increase in I sub I S. HO #3: ELEN Review MOS Transistors Page 25

26 4(e). Band-to-Band Tunneling For small ~ 0 and high a significant drain leakage can be observed, especially for short channel devices. For = 0, and high, the e-field can be very high in the drain region causing band-to-band tunneling (BTBT): BTBT happens only when e-field is sufficiently high to cause a large band bending. o HO #3: ELEN Review MOS Transistors Page 26

27 4(f). Effect of Scaled Channel Width The depletion region extends sideways in the areas outside the gate controlled region increasing the apparent channel width. As a result th opposite to short channel devices. HO #3: ELEN Review MOS Transistors Page 27

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