C Soldering Temperature, for 10 seconds 300 (1.6mm from case ) Thermal Resistance

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1 Advanced Prcess Techngy Surface Munt (IRF3NS) Lw-prfie thrugh-he (IRF3NL) 75 C Operating Temperature Fast Switching Fuy Avaanche Rated Descriptin Fifth Generatin HEXFETs frm Internatina Rectifier utiize advanced prcessing techniques t achieve extremey w n-resistance per siicn area. This benefit, cmbined with the fast switching speed and ruggedized device design that HEXFET Pwer MOSFETs are we knwn fr, prvides the designer with an extremey efficient and reiabe device fr use in a wide variety f appicatins. The D 2 Pak is a surface munt pwer package capabe f accmmdating die sizes up t HEX-4. It prvides the highest pwer capabiity and the west pssibe nresistance in any existing surface munt package. The D 2 Pak is suitabe fr high current appicatins because f its w interna cnnectin resistance and can dissipate up t 2.0W in a typica surface munt appicatin. The thrugh-he versin (IRF3NL) is avaiabe fr wprfie appicatins. PD - 954B HEXFET Pwer MOSFET 2 D Pak TO-262 V DSS =0V R DS(n) = 0.036Ω I D = 42A Absute Maximum Ratings Parameter Max. Units I T C = 25 C Cntinuus Drain Current, V V 42 I T C = 0 C Cntinuus Drain Current, V V 30 A I DM Pused Drain Current 40 P A = 25 C Pwer Dissipatin 3.8 W P C = 25 C Pwer Dissipatin 60 W Linear Derating Factr. W/ C V GS Gate-t-Surce Vtage ± 20 V E AS Singe Puse Avaanche Energy 420 mj I AR Avaanche Current 22 A E AR Repetitive Avaanche Energy 6 mj dv/dt Peak Dide Recvery dv/dt ƒ 5.0 V/ns T J Operating Junctin and -55 t 75 T STG Strage Temperature Range C Sdering Temperature, fr secnds 300 (.6mm frm case ) Therma Resistance Parameter Typ. Max. Units R θjc Junctin-t-Case 0.95 R θja Junctin-t-Ambient ( PCB Munted,steady-state)** 40 C/W G D S 5/3/98

2 Eectrica T J = 25 C (uness therwise specified) Parameter Min. Typ. Max. Units Cnditins V (BR)DSS Drain-t-Surce Breakdwn Vtage 0 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdwn Vtage Temp. Cefficient 0. V/ C Reference t 25 C, I D = ma R DS(n) Static Drain-t-Surce On-Resistance Ω V GS = V, I D = 22A V GS(th) Gate Threshd Vtage V V DS = V GS, I D = 250µA g fs Frward Transcnductance 4 S V DS = 25V, I D = 22A I DSS Drain-t-Surce Leakage Current 25 V µa DS = 0V, V GS = 0V 250 V DS = 80V, V GS = 0V, T J = 50 C I GSS Gate-t-Surce Frward Leakage 0 V GS = 20V na Gate-t-Surce Reverse Leakage -0 V GS = -20V Q g Tta Gate Charge I D = 22A Q gs Gate-t-Surce Charge 5 nc V DS = 80V Q gd Gate-t-Drain ("Mier") Charge 58 V GS = V, See Fig. 6 and 3 t d(n) Turn-On Deay Time V DD = 50V t r Rise Time 56 I D = 22A ns t d(ff) Turn-Off Deay Time 45 R G = 3.6Ω t f Fa Time 40 R D = 2.9Ω, See Fig. L S Interna Surce Inductance 7.5 nh Between ead, and center f die cntact C iss Input Capacitance 900 V GS = 0V C ss Output Capacitance 450 pf V DS = 25V C rss Reverse Transfer Capacitance 230 ƒ =.0MHz, See Fig. 5 Surce-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Cnditins D I S Cntinuus Surce Current MOSFET symb 42 (Bdy Dide) shwing the A G I SM Pused Surce Current integra reverse 40 (Bdy Dide) p-n junctin dide. S V SD Dide Frward Vtage.3 V T J = 25 C, I S =22A, V GS = 0V t rr Reverse Recvery Time ns T J = 25 C, I F = 22A Q rr Reverse Recvery Charge.2.8 µc di/dt = 0A/µs t n Frward Turn-On Time Intrinsic turn-n time is negigibe (turn-n is dminated by L S L D ) Ntes: Repetitive rating; puse width imited by max. junctin temperature. ( See fig. ) Starting T J = 25 C, L =.7mH R G = 25Ω, I AS = 22A. (See Figure 2) ƒ I SD 22A, di/dt 80A/µs, V DD V (BR)DSS, T J 75 C Puse width 300µs; duty cyce 2%. Uses IRF3N data and test cnditins ** When munted n " square PCB ( FR-4 r G- Materia ). Fr recmmended sdering techniques refer t appicatin nte #AN-994.

3 I D, Drain-t-Surce Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, Drain-t-Surce Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20us PULSE WIDTH T = 25 J C 0. 0 V DS, Drain-t-Surce Vtage (V) 20us PULSE WIDTH T = 75 J C 0. 0 V DS, Drain-t-Surce Vtage (V) Fig. Typica Output Characteristics Fig 2. Typica Output Characteristics I D, Drain-t-Surce Current (A) 0 T = 25 J C T = 75 J C V DS = 50V 20µS PULSE WIDTH V GS, Gate-t-Surce Vtage (V) R DS(n), Drain-t-Surce On Resistance (Nrmaized) 3.0 I D = 36A V GS = V T J, Junctin Temperature ( C) Fig 3. Typica Transfer Characteristics Fig 4. Nrmaized On-Resistance Vs. Temperature

4 C, Capacitance (pf) 3500 VGS = 0V, f = MHz Ciss = Cgs Cgd, C ds SHORTED 3000 Crss = Cgd Css = Cds Cgd 2500 C iss C ss C rss V DS, Drain-t-Surce Vtage (V) V GS, Gate-t-Surce Vtage (V) I = D 22A V DS = 80V V DS = 50V V DS = 20V FOR TEST CIRCUIT SEE FIGURE Q G, Tta Gate Charge (nc) Fig 5. Typica Capacitance Vs. Drain-t-Surce Vtage Fig 6. Typica Gate Charge Vs. Gate-t-Surce Vtage OPERATION IN THIS AREA LIMITED BY R DS(n) I SD, Reverse Drain Current (A) 0 V GS = 0 V V SD,Surce-t-Drain Vtage (V) I D, Drain Current (A) 0 us 0us ms T = 25 C ms C T = 75 J C Singe Puse 0 V DS, Drain-t-Surce Vtage (V) Fig 7. Typica Surce-Drain Dide Frward Vtage Fig 8. Maximum Safe Operating Area

5 50 V DS R D I D, Drain Current (A) T, Case Temperature ( C C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig a. Switching Time Test Circuit V DS 90% R G V GS V Puse Width µs Duty Factr 0. % D.U.T. % V GS t d(n) t r t d(ff) t f Fig b. Switching Time Wavefrms - V DD Therma Respnse (Z thjc ) 0. D = SINGLE PULSE (THERMAL RESPONSE) Ntes:. Duty factr D = t / t 2 2. Peak T J = P DM x Z thjc TC t, Rectanguar Puse Duratin (sec) PDM t t2 Fig. Maximum Effective Transient Therma Impedance, Junctin-t-Case

6 R G V DS 20V tp Fig 2a. Uncamped Inductive Test Circuit tp L D.U.T I AS 0.0Ω 5V DRIVER - V (BR)DSS V DD A E AS, Singe Puse Avaanche Energy (mj) TOP BOTTOM I D 9.0A 6A 22A Starting T, Junctin Temperature ( J C) Fig 2c. Maximum Avaanche Energy Vs. Drain Current I AS Fig 2b. Uncamped Inductive Wavefrms Current Reguatr Same Type as D.U.T. 50KΩ Q G 2V.2µF.3µF V Q GS Q GD D.U.T. V - DS V GS V G 3mA Charge I G I D Current Samping Resistrs Fig 3a. Basic Gate Charge Wavefrm Fig 3b. Gate Charge Test Circuit

7 Peak Dide Recvery dv/dt Test Circuit Peak Dide Recvery dv/dt Test Circuit D.U.T ƒ - Circuit Layut Cnsideratins Lw Stray Inductance Grund Pane Lw Leakage Inductance Current Transfrmer - - R G dv/dt cntred by R G Driver same type as D.U.T. I SD cntred by Duty Factr "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Perid P.W. D = P.W. Perid V GS =V * D.U.T. I SD Wavefrm Reverse Recvery Current Bdy Dide Frward Current di/dt D.U.T. V DS Wavefrm Dide Recvery dv/dt V DD Re-Appied Vtage Inductr Curent Bdy Dide Frward Drp Rippe 5% I SD * V GS = 5V fr Lgic Leve Devices Fig 4. Fr N-Channe HEXFETS

8 D 2 Pak Package Outine.40 (.055) M AX..54 (.45).29 (.405) - A (.85) 4.20 (.65) - B -.32 (.052).22 (.048).6 (.400) REF (.255) 6.8 (.243).78 (.070).27 (.050) (.6) 4.73 (.580) 2.79 (.) 2.29 (.090) 5.28 (.208) 4.78 (.88) 2.6 (.3) 2.32 (.09) 3X.40 (.055).4 (.045) 5.08 (.200) 3X 0.93 (.037) 0.69 (.027) 0.55 (.022) 0.46 (.08).39 (.055).4 (.045) 8.89 (.350) REF (.0) M B A M MINIMUM RECOMMENDED FOOTPRINT.43 (.450) NOTES: DIMENSIONS AFTER SOLDER DIP. 2 DIMENSIONING & TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION : INCH. 4 HEATSINK & LEAD DIMENSIONS DO NOT INCLUDE BURRS. LEAD ASSIGNMENTS - GATE 2 - DRAIN 3 - SOURCE 8.89 (.350) 3.8 (.50) 7.78 (.700) 2.08 (.082) 2X 2.54 (.0) 2X Part Marking Infrmatin D 2 Pak INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE F530S B M PART NUMBER DATE CODE (YYW W ) YY = YEAR WW = WEEK A

9 Package Outine TO-262 Outine Part Marking Infrmatin TO-262

10 Tape & Ree Infrmatin D 2 Pak TRR.60 (.063).50 (.059) 4. (.6) 3.90 (.53).60 (.063).50 (.059) (.045) (.035) FEED DIRECTION.85 (.073).65 (.065).60 (.457).40 (.449) 5.42 (.609) 5.22 (.60) (.957) (.94) TRL.90 (.429).70 (.42) 6. (.634) 5.90 (.626).75 (.069).25 (.049) 4.72 (.36) 4.52 (.78) FEED DIRECTION 3.50 (.532) 2.80 (.504) (.079) (.94) (4.73) MAX (2.362) MIN. NOTES :. COMFORMS TO EIA CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION HUB. 4. INCLUDES FLANGE OUTER EDGE (.039) (.96) (.97) MAX. 4 WORLD HEADQUARTERS: 233 Kansas St., E Segund, Caifrnia 90245, Te: (3) EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Te: IR CANADA: 732 Victria Park Ave., Suite 20, Markham, Ontari L3R 2Z8, Te: (905) IR GERMANY: Saaburgstrasse 57, 6350 Bad Hmburg Te: IR ITALY: Via Liguria 49, 07 Brgar, Trin Te: IR FAR EAST: K&H Bdg., 2F, 30-4 Nishi-Ikebukur 3-Chme, Tshima-Ku, Tky Japan 7 Te: IR SOUTHEAST ASIA: 35 Outram Rad, #-02 Tan Bn Liat Buiding, Singapre 036 Te: Data and specificatins subject t change withut ntice. 5/98

11 Nte: Fr the mst current drawings pease refer t the IR website at:

Description Absolute Maximum Ratings Parameter Max. Units Thermal Resistance Parameter Typ. Max. Units

Description Absolute Maximum Ratings Parameter Max. Units Thermal Resistance Parameter Typ. Max. Units l l l l l Advanced Prcess Technlgy Dynamic dv/dt Rating 175 C Operating Temperature Fast Switching Fully Avalanche Rated Descriptin Fifth Generatin HEXFETs frm Internatinal Rectifier utilize advanced prcessing