TO-247-3L Inner Circuit Product Summary I C) R DS(on)

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Allen Todd
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Silicon Carbide Power MOSFET N-CHANNEL ENHANCEMENT MODE TO-247-3L Inner Circuit Product Summary V DS I D(@25 C) R DS(on) 1200V 20A

PFC u EV Charging station & Motor Drives Benefits u Higher System Efficiency u Parallel Device Convenience u High Temperature

Parameter Symbol Test Conditions Value Unit Drain Source Voltage V DS, max V GS =0V, I DS =100µA 1200 V Continuous Drain Current I D V

16 42 Avalanche energy, Single Pulse E AS V DD =100V, I D =10A 625 mj Power Dissipation P D T C =25 C 113 W Recommend Gate Source

1 Silicon Carbide Power MOSFET N-CHANNEL ENHANCEMENT MODE TO-247-3L Inner Circuit Product Summary V DS I D(@25 C) R DS(on) 1200V 20A 120mΩ Features u Low On-Resistance u Low Capacitance u Avalanche Ruggedness u Halogen Free, RoHS Compliant Applications u SMPS / UPS / PFC u EV Charging station & Motor Drives Benefits u Higher System Efficiency u Parallel Device Convenience u High Temperature Application u High Frequency Operation u Power Inverters & DC/DC Converters u Solar/ Wind Renewable Energy Maximum Ratings (T c =25 C) Parameter Symbol Test Conditions Value Unit Drain Source Voltage V DS, max V GS =0V, I DS =100µA 1200 V Continuous Drain Current I D V GS =20V, T C =25 C 20 V GS =20V, T C =110 C 12 A Pulse Drain Current I D, pulse t PW limitation per Fig Avalanche energy, Single Pulse E AS V DD =100V, I D =10A 625 mj Power Dissipation P D T C =25 C 113 W Recommend Gate Source Voltage V GS, op -5/+20 Maximum Gate Source Voltage V GS, max -10/+25 V Junction & Storage Temperature T j, T stg -55/+150 Soldering Temperature T L 260 C Feb

2 Electrical Characteristics (T j =25 C) Parameter Symbol Test Conditions Min. Typ. Max. Unit Drain-Source Breakdown Voltage V (BR)DSS V GS =0V, I DS =100µA 1200 V Gate Threshold Voltage V GS(th) V DS =10V, I DS =10mA 2.7 V V DS =1200V, V GS =0V <1 50 Zero Gate Voltage Drain Current I DSS V DS =1200V, V GS =0V µa T j =150 C Gate-Source Leakage Current I GSS V GS =20V, V DS =0V 250 na V GS =20V, I DS =10A Drain-Source On-State Resistance R DS(on) V GS =20V, I DS =10A, mω 200 T j =150 C Input Capacitance C iss 1000 V GS =0V, V DS =800V Output Capacitance C oss 61 f =1MHz, V AC =25mV Reverse Transfer Capacitance C rss 12 Effective Output Capacitance, Energy Related Effective Output Capacitance, Time Related C o(er) C o(tr) V GS =0V, V DS =0 to 800V I D =const., V GS =0V, V DS =0 to 800V Turn On Delay Time t d(on) V DS =800V, pf Rise Time t r V GS =-4/20V, I D =10A, 20 ns Turn Off Delay Time t d(off) R L =80Ω, 15 Fall Time t f R G(ext) = 8.2 Ω 17 C oss Stored Energy E oss V GS =0V, V DS =800V 31 f =1MHz, V AC =25mV Turn-on Switching Energy E on V DS =800V, 47* µj Turn-off Switching Energy E off V GS =0/20V, I D =10A, R G(ext) = 2.7 Ω 64* Internal Gate Resistance R G(int.) f =1MHz, V AC =25mV 8 Ω *The energy loss caused by the reverse recovery of FWD is not included in E on. Built-in SiC Diode Characteristics (T j =25 C) Parameter Symbol Test Conditions Typ. Unit Inverse Diode Forward Voltage V SD V GS =-5V, I SD =2.5A 4.3 V Reverse Recovery Time t rr V GS =0V, 53 ns Reverse Recovery Charge Q rr I SD =10A, V DS =400V, 63 nc Peak Reverse Recovery Current I rrm di/dt=300a/µs 2.25 A Feb

3 Gate Charge Characteristics (T j =25 C) Parameter Symbol Test Conditions Value Unit Gate to Source Charge Q GS 14.5 V DS =800V, Gate to Drain Charge Q GD 29 nc V GS =-5/20V, Total Gate Charge Q G 67 I D =10A Gate plateau voltage V pl 8.2 V Thermal Resistance Parameter Symbol Value Unit Thermal Resistance, Junction to Case R θ,jc 1.1 K/W Thermal Resistance, Junction to Ambient R θ,ja TBD Typical Device Performance Fig. 1 Forward Output Characteristics at T j = 25 C Fig. 2 Forward Output Characteristics at T j = 150 C Fig. 3 On-Resistance vs. Drain Current for Fig. 4 Transfer Characteristics for Various T j Various T j Feb

4 Typical Device Performance Fig. 5 On-Resistance vs. Gate Voltage for Various T j Fig. 6 Normalized On-Resistance vs. Temperature Fig. 7 Reverse Output Characteristics at T j = 25 C Fig. 8 Reverse Output Characteristics at T j = 150 C Fig. 9 Capacitances vs. Drain to Source Voltage (0-200V) Fig. 10 Capacitances vs. Drain to Source Voltage (0-1000V) Feb

5 Typical Device Performance Fig. 11 Threshold Voltage vs. Temperature Fig. 12 Output Capacitor Stored Energy* Fig. 13 Maximum Power Dissipation Derating vs. Case Temperature Fig. 14 Drain Current Derating vs. Case Temperature Fig. 15 Transient Junction to Case Thermal Impedance Fig. 16 Safe Operating Area Feb

Typical Device Performance Fig. 17 Gate Charge Characteristics Fig. 18 Clamped Inductive Switching Energy vs. Drain Current (V DD =800V)* Fig. 19 Clamped Inductive Switching Energy Fig.

6 Typical Device Performance Fig. 17 Gate Charge Characteristics Fig. 18 Clamped Inductive Switching Energy vs. Drain Current (V DD =800V)* Fig. 19 Clamped Inductive Switching Energy Fig. 20 Clamped Inductive Switching Energy vs. Drain Current (V DD =600V)* vs. External Gate Resistor (R G(ext.) )* Recommended Solder Pad Layout (TO-247-3L) *The energy loss caused by the reverse recovery of FWD is not included in E on. Mechanical Parameters Parameter Symbol Typical Unit A B Length mm C D Feb

7 Mechanical Parameters *The information provided herein is subject to change without notice. Feb

Package. Symbol Parameter Value Unit Test Conditions Note. V GS = 20 V, T C = 25 C Fig. 19 A 24 V GS = 20 V, T C = 100 C.

Package. Symbol Parameter Value Unit Test Conditions Note. V GS = 20 V, T C = 25 C Fig. 19 A 24 V GS = 20 V, T C = 100 C. V DS 12 V C2M812D Silicon Carbide Power MOSFET C2M TM MOSFET Technology N-Channel Enhancement Mode Features Package I D @ 25 C R DS(on) 36 A 8 mω High Blocking Voltage with Low On-Resistance High Speed