IRF5851. HEXFET Power MOSFET. Ultra Low On-Resistance Dual N and P Channel MOSFET Surface Mount Available in Tape & Reel Low Gate Charge.

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1 PD-93998B HEXFET Power MOSFET l l l l l Ultra Low On-Resistance Dual N and P Channel MOSFET Surface Mount Available in Tape & Reel Low Gate Charge G S2 G D S D2 N-Ch P-Ch DSS R DS(on) 0.090Ω 0.35Ω Description These N and P channel MOSFETs from International Rectifier utilize advanced processing techniques to achieve the extremely low on-resistance per silicon area. This benefit provides the designer with an extremely efficient device for use in battery and load management applications. This Dual TSOP-6 package is ideal for applications where printed circuit board space is at a premium and where maximum functionality is required. With two die per package, the can provide the functionality of two SOT-23 packages in a smaller footprint. Its unique thermal design and R DS(on) reduction enables an increase in current-handling capability. TSOP-6 Absolute Maximum Ratings Parameter Max. Units DS Drain-to-Source oltage I T A = 25 C Continuous Drain Current, A I T A = 70 C Continuous Drain Current, I DM Pulsed Drain Current -9.0 P A = 25 C Power Dissipation ƒ 0.96 W P A = 70 C Power Dissipation ƒ 0.62 Linear Derating Factor 7.7 mw/ C GS Gate-to-Source oltage ± 2 T J, T STG Junction and Storage Temperature Range -55 to + 50 C Thermal Resistance Parameter Typ. Max. Units R θja Maximum Junction-to-Ambient ƒ 30 C/W 09/02/02

2 Electrical T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions (BR)DSS Drain-to-Source Breakdown oltage N-Ch 20 GS = 0, I D = 250µA P-Ch -20 GS = 0, I D = -250µA (BR)DSS / T J Breakdown oltage Temp. Coefficient N-Ch 0.06 Reference to 25 C, I D = ma / C P-Ch -0.0 Reference to 25 C, I D = -ma R DS(ON) Static Drain-to-Source On-Resistance GS = 4.5, I D = 2.7A N-Ch 0.20 GS = 2.5, I D = 2.2A Ω 0.35 GS = -4.5, I D = -2.2A P-Ch GS = -2.5, I D = -.7A GS(th) Gate Threshold oltage N-Ch DS = GS, I D = 250µA P-Ch DS = GS, I D = -250µA g fs Forward Transconductance N-Ch 5.2 DS = 0, I D = 2.7A S P-Ch 3.5 DS = -0, I D = -2.2A N-Ch.0 DS = 6, GS = 0 I DSS Drain-to-Source Leakage Current P-Ch -.0 DS = -6, GS = 0 µa N-Ch 25 DS = 6, GS = 0, T J = 70 C P-Ch -25 DS = -6, GS = 0, T J = 70 C I GSS Gate-to-Source Forward Leakage N-P ±00 GS = ± 2 N-Ch Q g Total Gate Charge P-Ch I N-Ch 0.95 D = 2.7A, DS = 0, GS = 4.5 Q gs Gate-to-Source Charge nc P-Ch 0.66 N-Ch 0.83 Q gd Gate-to-Drain ("Miller") Charge I P-Ch 5.7 D = -2.2A, DS = -0, GS = -4.5 N-Ch 6.6 t d(on) Turn-On Delay Time P-Ch 8.3 N-Ch.2 DD = 0, I D =.0A, R G = 6.2Ω, t r Rise Time P-Ch 4 GS = 4.5 ns N-Ch 5 t d(off) Turn-Off Delay Time P-Ch 3 N-Ch 2.4 DD = -0, I D = -.0A, R G = 6.0Ω, t f Fall Time P-Ch 28 GS = -4.5 N-Ch 400 C iss Input Capacitance P-Ch 320 N-Ch 48 GS = 0, DS = 5, ƒ =.0MHz C oss Output Capacitance pf P-Ch 56 N-Ch 32 C rss Reverse Transfer Capacitance P-Ch 40 GS = 0, DS = -5, ƒ =.0MHz Source-Drain Ratings and Characteristics I S I SM SD t rr Q rr Parameter Min. Typ. Max. Units Conditions N-Ch 0.96 Continuous Source Current (Body Diode) P-Ch A N-Ch Pulsed Source Current (Body Diode) P-Ch -9.0 N-Ch.2 T J = 25 C, I S = 0.96A, GS = 0 Diode Forward oltage P-Ch -.2 T J = 25 C, I S = -0.96A, GS = 0 N-Ch ns Reverse Recovery Time P-Ch T J = 25 C, I F = 0.96A, di/dt = 00A/µs N-Ch nc Reverse Recovery Charge P-Ch T J = 25 C, I F = -0.96A, di/dt = -00A/µs Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 0 & 26 ) Pulse width 400µs; duty cycle 2%. ƒ Surface mounted on FR-4 board, t 0sec. 2

3 I D, Drain-to-Source Current (A) 00 0 GS TOP BOTTOM.5.50 I D, Drain-to-Source Current (A) 00 0 GS TOP BOTTOM µs PULSE WIDTH T J = 25 C DS, Drain-to-Source oltage () 20µs PULSE WIDTH 0. T J = 50 C DS, Drain-to-Source oltage () Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, Drain-to-Source Current (A) 00 0 T J = 25 C T J = 50 C DS= µs PULSE WIDTH GS, Gate-to-Source oltage () R DS(on), Drain-to-Source On Resistance (Normalized) 2.0 I D = 2.7A GS= T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance s. Temperature 3

4 C, Capacitance (pf) GS = 0, f = MHz Ciss = Cgs + Cgd, C ds SHORTED Crss = Cgd Coss = Cds + Cgd C iss 2 00 C oss C rss DS, Drain-to-Source oltage () Q G, Total Gate Charge (nc) GS, Gate-to-Source oltage () I = D 2.7A DS = 6 DS = 0 Fig 5. Typical Capacitance s. Drain-to-Source oltage Fig 6. Typical Gate Charge s. Gate-to-Source oltage I SD, Reverse Drain Current (A) 00 0 T J = 50 C T J = 25 C GS = SD,Source-to-Drain oltage () I D, Drain Current (A) 00 0 OPERATION IN THIS AREA LIMITED BY R DS(on) 00us ms 0ms TA = 25 C TJ = 50 C Single Pulse DS, Drain-to-Source oltage () Fig 7. Typical Source-Drain Diode Forward oltage Fig 8. Maximum Safe Operating Area 4

5 I D, Drain Current (A) T C, Case Temperature ( C) Fig 0a. Switching Time Test Circuit DS 90% R G GS 4.5 DS Pulse Width µs Duty Factor 0. % R D D.U.T. + - DD Fig 9. Maximum Drain Current s. Case Temperature 0% GS t d(on) t r t d(off) t f Fig 0b. Switching Time Waveforms 000 Thermal Response (Z thja ) 00 0 D = PDM 0.0 t SINGLE PULSE (THERMAL RESPONSE) t2 Notes:. Duty factor D = t / t 2 2. Peak T J =P DM x Z thja + TA t, Rectangular Pulse Duration (sec) Fig 0. Typical Effective Transient Thermal Impedance, Junction-to-Ambient 5

6 R DS (on), Drain-to-Source On Resistance ( Ω) R DS(on), Drain-to -Source On Resistance (Ω) GS = I D = 2.7A GS, Gate -to -Source oltage () 0.00 GS = I D, Drain Current (A) Fig. Typical On-Resistance s. Gate oltage Fig 2. Typical On-Resistance s. Drain Current Current Regulator Same Type as D.U.T. 4.5 Q GS Q G Q GD 2.2µF 50KΩ.3µF D.U.T. + - DS G GS 3mA Charge I G I D Current Sampling Resistors Fig 3a. Basic Gate Charge Waveform Fig 3b. Gate Charge Test Circuit 6

7 GS(th), ariace ( ) Power (W) I D = 250µA T J, Temperature ( C ) Time (sec) Fig 4. Threshold oltage s. Temperature Fig 5. Typical Power s. Time 7

8 -I D, Drain-to-Source Current (A) GS TOP BOTTOM µs PULSE WIDTH 0.0 T J = 25 C DS, Drain-to-Source oltage () -I D, Drain-to-Source Current (A) 00 0 GS TOP BOTTOM µs PULSE WIDTH 0. T J = 50 C DS, Drain-to-Source oltage () Fig 6. Typical Output Characteristics Fig 7. Typical Output Characteristics -I D, Drain-to-Source Current (A) 0 T J = 25 C T J = 50 C DS= -5 20µs PULSE WIDTH GS, Gate-to-Source oltage () R DS(on), Drain-to-Source On Resistance (Normalized) 2.0 I D = -2.2A GS= T J, Junction Temperature ( C) Fig 8. Typical Transfer Characteristics Fig 9. Normalized On-Resistance s. Temperature 8

9 C, Capacitance (pf) GS = 0, f = MHz Ciss = Cgs + Cgd, C ds Crss = Cgd Coss = Cds + Cgd C iss C oss C rss SHORTED - GS, Gate-to-Source oltage () I D = -2.2A DS =-6 DS = DS, Drain-to-Source oltage () Q G, Total Gate Charge (nc) Fig 20. Typical Capacitance s. Drain-to-Source oltage Fig 2. Typical Gate Charge s. Gate-to-Source oltage -I SD, Reverse Drain Current (A) 0 T J = 50 C T J = 25 C GS = SD,Source-to-Drain oltage () -I I D, Drain Current (A) 00 0 OPERATION IN THIS AREA LIMITED BY R DS(on) 00us ms 0ms TA = 25 C TJ = 50 C Single Pulse DS, Drain-to-Source oltage () Fig 22. Typical Source-Drain Diode Forward oltage Fig 23. Maximum Safe Operating Area 9

10 2.5 DS R D -I D, Drain Current (A) T J, Junction Temperature ( C) R G GS GS Pulse Width µs Duty Factor 0. % D.U.T. DD Fig 25a. Switching Time Test Circuit GS t d(on) t r t d(off) t f 0% + - Fig 24. Maximum Drain Current s. Junction Temperature 90% DS Fig 25b. Switching Time Waveforms 000 Thermal Response (Z thja ) 00 0 D = PDM 0.0 t SINGLE PULSE (THERMAL RESPONSE) t2 Notes:. Duty factor D = t / t 2 2. Peak T J =P DM x Z thja + TA t, Rectangular Pulse Duration (sec) Fig 26. Typical Effective Transient Thermal Impedance, Junction-to-Ambient 0

11 R DS (on), Drain-to-Source On Resistance (Ω) R DS(on), Drain-to -Source On Resistance (Ω) GS = I D = -2.2A 0.20 GS = GS, Gate -to -Source oltage () I D, Drain Current (A) Fig 27. Typical On-Resistance s. Gate oltage Fig 28. Typical On-Resistance s. Drain Current Current Regulator Same Type as D.U.T. 50KΩ Q G 2.2µF.3µF Q GS Q GD D.U.T. + DS - G GS -3mA Charge I G I D Current Sampling Resistors Fig 29a. Basic Gate Charge Waveform Fig 29b. Gate Charge Test Circuit

12 - GS(th), ariace ( ) Power (W) I D = -250µA T J, Temperature ( C ) Time (sec) Fig 30. Threshold oltage s. Temperature Fig 3. Typical Power s. Time TSOP-6 Package Outline 2

13 TSOP-6 Part Marking Information (Old) Note: This part marking information applies to devices produced before 02/26/200. EXAMPLE: THIS IS AN SI3443D PART NUMBER WAFER LOT NUMBER CODE 3A = SI3443D 3B = IRF5800 3C = IRF5850 3D = 3E = IRF5852 3I = IRF5805 3J = IRF5806 3A TOP DATE CODE EXAMPLES : YWW = 9603 = 6C YWW = 9632 = FF YW XXXX BOTTOM PART NUMBER CODE REFERENCE: WW = (-26) IF PRECEDED BY LAS T DIGIT OF CALENDAR YEAR DATE CODE YEAR Y W A B C D 24 X 25 Y 26 Z WW = (27-52) IF PRECEDED BY A LETTER YEAR Y 200 A 2002 B 2003 C 2004 D 2005 E 996 F 997 G 998 H 999 J 2000 K WORK WEEK WORK WEEK W A B C D 50 X 5 Y TSOP-6 Part Marking Information (New) Note: This part marking information applies to devices produced after 02/26/200. W = (-26) IF PRECEDED BY LAST DIGIT OF CALENDAR YEAR PART NUMBER TOP Y = YEAR W = WEEK LOT CODE YEAR Y WORK WEEK W A B C D 24 X 25 Y 26 Z PART NUMBER CODE REFERENCE: A = SI3443D B = IRF5800 C = IRF5850 D = E = IRF5852 I = IRF5805 J = IRF5806 K = IRF580 L = IRF5804 M = IRF5803 N = IRF5820 W = (27-52) IF PRECEDED BY A LETTER WORK YEAR Y WEEK W 200 A 27 A 2002 B 28 B 2003 C 29 C 2004 D 30 D E F G H J K 50 X 5 Y 3

14 TSOP-6 Tape & Reel Information Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (30) TAC Fax: (30) isit us at for sales contact information. 09/02 4

PD A N-CHANNEL MOSFET 1 D2 P-CHANNEL MOSFET. Top View SO-8. 1

PD A N-CHANNEL MOSFET 1 D2 P-CHANNEL MOSFET. Top View SO-8. 1 l l l l l Generation Technology Ultra Low On-Resistance Dual N and P Channel MOSFET Surface Mount Fully valanche Rated Description Fifth Generation HEXFETs from International Rectifier utilize advanced