PRELIMINARY. TO-220 FULLPAK standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip or by a single screw fixing.
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1 l dvanced Prcess Technlgy l Islated Package l High Vltage Islatin = 2.5KVRMS l Sink t Lead Creepage Dist. = 4.8mm l Fully valanche Rated Descriptin Fifth Generatin HEXFETs frm Internatinal Rectifier utilize advanced prcessing techniques t achieve extremely lw nresistance per silicn area. This benefit, cmbined with the fast switching speed and ruggedized device design that HEXFET Pwer MOSFETs are well knwn fr, prvides the designer with an extremely efficient and reliable device fr use in a wide variety f applicatins. PRELIMINRY G PD 9.6 IRFI3N HEXFET Pwer MOSFET D S V DSS = 0V R DS(n) = 0.036Ω I D = 24 The TO220 Fullpak eliminates the need fr additinal insulating hardware in cmmercialindustrial applicatins. The mulding cmpund used prvides a high islatin capability and a lw thermal resistance between the tab and external heatsink. This islatin is equivalent t using a 0 micrn mica barrier with TO220 FULLPK standard TO220 prduct. The Fullpak is munted t a heatsink using a single clip r by a single screw fixing. bslute Maximum Ratings Parameter Max. Units I T C = 25 C Cntinuus Drain Current, V V 24 I T C = 0 C Cntinuus Drain Current, V V 7 I DM Pulsed Drain Current 40 P C = 25 C Pwer Dissipatin 56 W Linear Derating Factr 0.37 W/ C V GS GatetSurce Vltage ± 20 V E S Single Pulse valanche Energy 420 mj I R valanche Current 22 E R Repetitive valanche Energy 5.6 mj d v /d t Peak Dide Recvery dv/dtƒ 5.0 V/ns T J Operating Junctin and 55 t 75 T STG Strage Temperature Range C Sldering Temperature, fr secnds 300 (.6mm frm case ) Munting trque, 632 r M3 screw lbf in (.N m) Thermal Resistance Parameter Typ. Max. Units R θjc JunctintCase 2.7 C/W R θj Junctintmbient 65 3/6/98
2 IRFI3N Electrical T J = 25 C (unless therwise specified) Parameter Min. Typ. Max. Units Cnditins V (BR)DSS DraintSurce Breakdwn Vltage 0 V V GS = 0V, I D = 250µ V (BR)DSS / T J Breakdwn Vltage Temp. Cefficient 0. V/ C Reference t 25 C, I D = m R DS(n) Static DraintSurce OnResistance Ω V GS = V, I D = 3 V GS(th) Gate Threshld Vltage V V DS = V GS, I D = 250µ g fs Frward Transcnductance 4 S V DS = 25V, I D = 22 I DSS DraintSurce Leakage Current 25 V µ DS = 0V, V GS = 0V 250 V DS = 80V, V GS = 0V, T J = 50 C I GSS GatetSurce Frward Leakage 0 V GS = 20V n GatetSurce Reverse Leakage 0 V GS = 20V Q g Ttal Gate Charge 20 I D = 22 Q gs GatetSurce Charge 5 nc V DS = 80V Q gd GatetDrain ("Miller") Charge 58 V GS = V, See Fig. 6 and 3 t d(n) TurnOn Delay Time V DD = 50V t r Rise Time 56 I D = 22 ns t d(ff) TurnOff Delay Time 45 R G = 3.6Ω t f Fall Time 40 R D = 2.9Ω, See Fig. Between lead, L D Internal Drain Inductance 4.5 6mm (0.25in.) nh G frm package L S Internal Surce Inductance 7.5 and center f die cntact C iss Input Capacitance 900 V GS = 0V C ss Output Capacitance 450 pf V DS = 25V C rss Reverse Transfer Capacitance 230 ƒ =.0MHz, See Fig. 5 C Drain t Sink Capacitance 2 ƒ =.0MHz SurceDrain Ratings and Characteristics Parameter Min. Typ. Max. Units Cnditins I D S Cntinuus Surce Current MOSFET symbl 24 (Bdy Dide) shwing the I SM Pulsed Surce Current integral reverse G 40 (Bdy Dide) pn junctin dide. S V SD Dide Frward Vltage.3 V T J = 25 C, I S = 3, V GS = 0V t rr Reverse Recvery Time ns T J = 25 C, I F = 22 Q rr Reverse RecveryCharge.2.8 µc di/dt = 0/µs t n Frward TurnOn Time Intrinsic turnn time is negligible (turnn is dminated by L S L D ) D S Ntes: Repetitive rating; pulse width limited by max. junctin temperature. ( See fig. ) Starting T J = 25 C, L =.0mH R G = 25Ω, I S = 22. (See Figure 2) ƒ I SD 22, di/dt 80/µs, V DD V (BR)DSS, T J 75 C Pulse width 300µs; duty cycle 2%. t=60s, ƒ=60hz Uses IRF3N data and test cnditins
3 IRFI3N I D, DraintSurce Current () 00 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, DraintSurce Current () 00 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20us PULSE WIDTH T = V DS, DraintSurce Vltage (V) 20us PULSE WIDTH T = V DS, DraintSurce Vltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, DraintSurce Current () 00 0 T = 25 T = V GS, GatetSurce Vltage (V) R DS(n), DraintSurce On Resistance (Nrmalized) 3.0 I D = V GS = V T J, Junctin Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Nrmalized OnResistance Vs. Temperature
4 IRFI3N C, Capacitance (pf) 3500 VGS = 0V, f = MHz Ciss = Cgs Cgd, C ds SHORTED 3000 Crss = Cgd Css = Cds Cgd 2500 C iss C ss 00 C rss V DS, DraintSurce Vltage (V) V GS, GatetSurce Vltage (V) I = D 22 V DS= 80V V DS= 50V V DS= 20V FOR TEST CIRCUIT SEE FIGURE Q G, Ttal Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintSurce Vltage Fig 6. Typical Gate Charge Vs. GatetSurce Vltage I SD, Reverse Drain Current () 00 0 V GS = 0 V V SD,SurcetDrain Vltage (V) I D, Drain Current () 00 0 OPERTION IN THIS RE LIMITED BY R DS(n) us 0us ms T = 25 C ms C T = 75 Single Pulse 0 00 V DS, DraintSurce Vltage (V) Fig 7. Typical SurceDrain Dide Frward Vltage Fig 8. Maximum Safe Operating rea
5 IRFI3N 25 V DS R D I D, Drain Current () T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature Fig a. Switching Time Test Circuit V DS 90% R G V GS V Pulse Width µs Duty Factr 0. % D.U.T. % V GS t d(n) t r t d(ff) t f Fig b. Switching Time Wavefrms V DD Thermal Respnse (Z thjc ) D = PDM t 0.0 t2 SINGLE PULSE (THERML RESPONSE) Ntes:. Duty factr D = t / t 2 2. Peak T J= P DM x Z thjc TC t, Rectangular Pulse Duratin (sec) Fig. Maximum Effective Transient Thermal Impedance, JunctintCase
6 IRFI3N R G V DS 20V tp I S Fig 2a. Unclamped Inductive Test Circuit tp L D.U.T 0.0Ω 5V DRIVER V (BR)DSS V DD E S, Single Pulse valanche Energy (mj) TOP BOTTOM I D Starting T, Junctin Temperature J ( C) Fig 2c. Maximum valanche Energy Vs. Drain Current I S Fig 2b. Unclamped Inductive Wavefrms Current Regulatr Same Type as D.U.T. 50KΩ Q G 2V.2µF.3µF V Q GS Q GD D.U.T. V DS V GS V G 3m Charge I G I D Current Sampling Resistrs Fig 3a. Basic Gate Charge Wavefrm Fig 3b. Gate Charge Test Circuit
7 IRFI3N Peak Dide Recvery dv/dt Test Circuit D.U.T ƒ Circuit Layut Cnsideratins Lw Stray Inductance Grund Plane Lw Leakage Inductance Current Transfrmer R G dv/dt cntrlled by R G Driver same type as D.U.T. I SD cntrlled by Duty Factr "D" D.U.T. Device Under Test V DD Driver Gate Drive Perid P.W. D = P.W. Perid V GS =V * D.U.T. I SD Wavefrm Reverse Recvery Current Bdy Dide Frward Current di/dt D.U.T. V DS Wavefrm Dide Recvery dv/dt V DD Repplied Vltage Inductr Curent Bdy Dide Frward Drp Ripple 5% I SD * V GS = 5V fr Lgic Level Devices Fig 4. Fr NChannel HEXFETS
8 IRFI3N Package Outline TO220 Fullpak Outline Dimensins are shwn in millimeters (inches) 6.00 (.630) 5.80 (.622) 3.70 (.540) 3.50 (.530).60 (.47).40 (.409) (.33) ø 3. (.23) 3.70 (.45) 3.20 (.26).5 (.045) MIN (.30) 3. (.22) B 4.80 (.89) 4.60 (.8) 7. (.280) 6.70 (.263) 2.80 (.) 2.60 (.2) LED SSIGNMENTS GTE 2 DRIN 3 SOURCE NOTES: DIMENSIONING & TOLERNCING PER NSI Y4.5M, CONTROLLING DIMENSION: INCH. C D 3X.40 (.055).05 (.042) 2.54 (.0) 2X 0.90 (.035) 3X 0.70 (.028) Part Marking Infrmatin TO220 Fullpak 0.25 (.0) M M B EXMPLE EXMPLE : THIS : THIS N IS N IRF IRFI840G WITH W ITH SSEMBLY LOT LOT CODE CODE 9BM E40 INTERNTIONL INTERNTIONL RECTIFIER RECTIFIER LOGO LOGO SSEMBLY LOT LOT CODE 0.48 (.09) 3X 0.44 (.07) 2.85 (.2) 2.65 (.4) IRF IRFI840G B M E PRT NUMBER PRT NUMBER DTE CODE (YYW DTE W ) CODE YY (YYW = YER W ) WW YY = YER WEEK WW = WEEK B MINIMUM CREEPGE DISTNCE BETW EEN BCD = 4.80 (.89) WORLD HEDQURTERS: 233 Kansas St., El Segund, Califrnia 90245, Tel: (3) EUROPEN HEDQURTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: IR CND: 732 Victria Park ve., Suite 20, Markham, Ontari L3R 2Z8, Tel: (905) IR GERMNY: Saalburgstrasse 57, 6350 Bad Hmburg Tel: IR ITLY: Via Liguria 49, 07 Brgar, Trin Tel: IR FR EST: K&H Bldg., 2F, 304 NishiIkebukur 3Chme, TshimaKu, Tky Japan 7 Tel: IR SOUTHEST SI: 35 Outram Rad, #02 Tan Bn Liat Building, Singapre 036 Tel: Data and specificatins subject t change withut ntice. 3/98
9 Nte: Fr the mst current drawings please refer t the IR website at:
Description Absolute Maximum Ratings Parameter Max. Units Thermal Resistance Parameter Typ. Max. Units
l l l l l Advanced Prcess Technlgy Dynamic dv/dt Rating 175 C Operating Temperature Fast Switching Fully Avalanche Rated Descriptin Fifth Generatin HEXFETs frm Internatinal Rectifier utilize advanced prcessing
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l Advanced Prcess Technlgy l Dynamic dv/dt Rating l 175 C Operating Temperature l Fast Switching l Fully Avalanche Rated l Lead-Free Descriptin Fifth Generatin HEXFETs frm Internatinal Rectifier utilize
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