V DSS. 30V Q1 GS = 10V 6.4A Q2 GS = 10V 9.7A

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1 PD 9794A IRF7902PbF Appications Dua SO8 MOSFET for POL Converters in Notebook Computers, Servers, Graphics Cards, Game Consoes and SetTop Box V DSS HEXFET Power MOSFET R DS(on) max 30V Q 22.6m:@V GS = V 6.4A Q2 4.4m:@V GS = V 9.7A I D Benefits Very Low R DS(on) at 4.5V V GS Low Gate Charge Fuy Characterized Avaanche Votage and Current 20V V GS Max. Gate Rating Improved Body Diode Reverse Recovery LeadFree * 6 6 * ' 6' 6' 6' SO8 Absoute Maximum Ratings Parameter Q Max. Q2 Max. Units V DS DraintoSource Votage 30 V V GS GatetoSource Votage ± 20 I T A = 25 C Continuous Drain Current, V V I T A = 70 C Continuous Drain Current, V V A I DM Pused Drain Current c 5 78 P A = 25 C Power Dissipation.4 W P A = 70 C Power Dissipation Linear Derating Factor W/ C T J Operating Junction and 55 to 50 C Storage Temperature Range T STG Therma Resistance Parameter Q Max. Q2 Max. Units R θjl JunctiontoDrain Lead g C/W R θja JunctiontoAmbient fg //06

2 IRF7902PbF (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions BV DSS DraintoSource Breakdown Votage Q&Q2 30 V V GS = 0V, I D = 250µA ΒV DSS / T J Breakdown Votage Temp. Coefficient Q V/ C Reference to 25 C, I D = ma Q Q V GS = V, I D = 6.4A e R DS(on) Static DraintoSource OnResistance mω V GS = 4.5V, I D = 5.A e Q V GS = V, I D = 9.7A e V GS = 4.5V, I D = 7.8A e V GS(th) Gate Threshod Votage Q&Q V V DS = V GS, I D = 25µA V GS(th) / T J Gate Threshod Votage Coefficient Q 4.7 mv/ C Q2 5.9 I DSS DraintoSource Leakage Current Q&Q2.0 µa V DS = 24V, V GS = 0V Q&Q2 50 V DS = 24V, V GS = 0V, I GSS GatetoSource Forward Leakage Q&Q2 0 na V GS = 20V GatetoSource Reverse Leakage Q&Q2 0 V GS = 20V gfs Forward Transconductance Q 3 S V DS = 5V, I D = 5.A Q2 9 V DS = 5V, I D = 7.8A Q g Tota Gate Charge Q Q Q gs PreVth GatetoSource Charge Q 0.9 Q Q2.4 V DS = 5V Q gs2 PostVth GatetoSource Charge Q 0.5 nc V GS = 4.5V, I D = 5.A Q2 0.8 Q gd GatetoDrain Charge Q.8 Q2 Q2 2.3 V DS = 5V Q godr Gate Charge Overdrive Q.4 V GS = 4.5V, I D = 7.8A Q2 Q sw Switch Charge (Q gs2 Q gd ) Q 2.3 Q2 3. Q oss Output Charge Q 3.0 nc V DS = 6V, V GS = 0V Q2 4.4 R G Gate Resistance Q Ω Q t d(on) TurnOn Deay Time Q 7.4 Q Q2 6. V DD = 5V, V GS = 4.5V t r Rise Time Q 8.2 I D = 5.A Q2 8.6 ns t d(off) TurnOff Deay Time Q 8.4 Q2 Q2 8.2 V DD = 5V, V GS = 4.5V t f Fa Time Q 3.4 I D = 7.8A Q2 3.3 Camped Inductive Load C iss Input Capacitance Q 580 Q2 900 V GS = 0V C oss Output Capacitance Q 30 pf V DS = 5V Q2 90 ƒ =.0MHz C rss Reverse Transfer Capacitance Q 74 Q2 86 Avaanche Characteristics Parameter Typ. Q Max. Q2 Max. Units E AS Singe Puse Avaanche Energy d mj I AR Avaanche Current c A Diode Characteristics Parameter Min. Typ. Max. Units I S Continuous Source Current Q.7 A (Body Diode) Q2 2.5 I SM Pused Source Current Q 5 A (Body Diode)c Q2 78 V SD Diode Forward Votage Q.0 V Q2.0 t rr Reverse Recovery Time Q ns Q2 2 8 Q rr Reverse Recovery Charge Q nc Q Conditions MOSFET symbo showing the integra reverse pn junction diode., I S = 5.A, V GS = 0V e, I S = 7.8A, V GS = 0V e Q, I F = 5.A, V DD = 5V, di/dt = 0A/µs e Q2, I F = 7.8A, V DD = 5V, di/dt = 0A/µs e 2

3 I D, DraintoSource Current (A) I D, DraintoSource Current (A) I D, DraintoSource Current (A) I D, DraintoSource Current (A) I D, DraintoSource Current (A) I D, DraintoSource Current (A) Typica Characteristics IRF7902PbF Q Contro FET Q2 Synchronous FET 0 VGS TOP V 8.0V 5.0V 4.5V 4.0V 3.5V 3.0V BOTTOM 2.5V 0 VGS TOP V 8.0V 5.0V 4.5V 4.0V 3.5V 3.0V BOTTOM 2.5V V Tj = 25 C Fig. Typica Output Characteristics 2.5V Tj = 25 C Fig 2. Typica Output Characteristics 0 VGS TOP V 8.0V 5.0V 4.5V 4.0V 3.5V 3.0V BOTTOM 2.5V 0 VGS TOP V 8.0V 5.0V 4.5V 4.0V 3.5V 3.0V BOTTOM 2.5V 2.5V Tj = 50 C Fig 3. Typica Output Characteristics 0 2.5V Tj = 50 C Fig 4. Typica Output Characteristics T J = 50 C T J = 50 C 0. V DS = 5V V DS = 5V V GS, GatetoSource Votage (V) V GS, GatetoSource Votage (V) Fig 5. Typica Transfer Characteristics Fig 6. Typica Transfer Characteristics 3

4 I D, DraintoSource Current (A) I D, DraintoSource Current (A) V GS, GatetoSource Votage (V) V GS, GatetoSource Votage (V) C, Capacitance (pf) C, Capacitance (pf) IRF7902PbF Typica Characteristics Q Contro FET Q2 Synchronous FET 000 V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED 000 V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd C rss = C gd C oss = C ds C gd 00 C iss 00 C iss C oss C oss 0 C rss 0 C rss 0 0 Fig 7. Typica Capacitance vs. DraintoSource Votage Fig 8. Typica Capacitance vs. DraintoSource Votage 6.0 I D = 5.A 6.0 I D = 7.8A V DS = 24V V DS = 5V V DS = 6.0V V DS = 24V V DS = 5V V DS = 6.0V Q G, Tota Gate Charge (nc) Fig 9. Typica Gate Charge vs. GatetoSource Votage 00 0 OPERATION IN THIS AREA LIMITED BY R DS (on) Q G, Tota Gate Charge (nc) Fig. Typica Gate Charge vs. GatetoSource Votage 00 0 OPERATION IN THIS AREA LIMITED BY R DS (on) 0µsec 0µsec 0. msec 0. msec T A = 25 C Tj = 50 C Singe Puse 0msec msec T A = 25 C Tj = 50 C Singe Puse 0msec msec 0 0 Fig. Maximum Safe Operating Area Fig 2. Maximum Safe Operating Area 4

5 R DS(on), Drainto Source On Resistance (m Ω) R DS(on), Drainto Source On Resistance (m Ω) I SD, Reverse Drain Current (A) I SD, Reverse Drain Current (A) R DS(on), DraintoSource On Resistance (Normaized) R DS(on), DraintoSource On Resistance (Normaized) Typica Characteristics IRF7902PbF Q Contro FET Q2 Synchronous FET I D = 6.4A V GS = V I D = 9.7A V GS = V T J, Junction Temperature ( C) Fig 3. Normaized OnResistance vs. Temperature T J, Junction Temperature ( C) Fig 4. Normaized OnResistance vs. Temperature 0 T J = 50 C T J = 50 C V GS = 0V V SD, SourcetoDrain Votage (V) Fig 5. Typica SourceDrain Diode Forward Votage V GS = 0V V SD, SourcetoDrain Votage (V) Fig 6. Typica SourceDrain Diode Forward Votage 60 I D = 6.4A 40 I D = 9.7A V GS, Gate to Source Votage (V) V GS, Gate to Source Votage (V) Fig 7. Typica OnResistance vs.gate Votage Fig 8. Typica OnResistance vs.gate Votage 5

6 E AS, Singe Puse Avaanche Energy (mj) E AS, Singe Puse Avaanche Energy (mj) V GS(th), Gate Threshod Votage (V) V GS(th), Gate Threshod Votage (V) I D, I D, Drain Current (A) Drain Current (A) IRF7902PbF Typica Characteristics Q Contro FET Q2 Synchronous FET T A, Ambient Temperature ( C) Fig 9. Maximum Drain Current vs. Ambient Temperature T A, Ambient Temperature ( C) Fig 20. Maximum Drain Current vs. Ambient Temperature 2.5 I D = 250µA I D = 250µA T J, Temperature ( C ) Fig 2. Threshod Votage vs. Temperature T J, Temperature ( C ) Fig 22. Threshod Votage vs. Temperature 4 2 I D TOP A 2.4A BOTTOM 6.4A I D TOP 2.4A 2.8A BOTTOM 7.8A Starting T J, Junction Temperature ( C) Starting T J, Junction Temperature ( C) Fig 23. Maximum Avaanche Energy vs. Drain Current Fig 24. Maximum Avaanche Energy vs. Drain Current 6

IRF7902PbF 00 Therma Response ( Z thja ) 0 D = 0.50 0.20 0. 0.05 0.02 0.0 R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 3 τ 2 τ 3 R 4 R 4 τ A τ Ri ( C/W) τi (sec) 3.0358 0.

Peak Tj = P dm x Zthja Tc 0.0 E006 E005 0.000 0.00 0.0 0. 0 00 t, Rectanguar Puse Duration (sec) τ 4 τ 4 0 Fig 25.

0 R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci= τi/ri Ri ( C/W) τi (sec) 2.445866 0.0008 9.382382 0.020778 33.6368 0.70843 7.0527 24.5 0.

7 IRF7902PbF 00 Therma Response ( Z thja ) 0 D = R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 3 τ 2 τ 3 R 4 R 4 τ A τ Ri ( C/W) τi (sec) SINGLE PULSE Ci= τi/ri 0. ( THERMAL RESPONSE ) Ci= τi/ri Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthja Tc 0.0 E006 E t, Rectanguar Puse Duration (sec) τ 4 τ 4 0 Fig 25. Maximum Effective Transient Therma Impedance, JunctiontoAmbient (Q) Therma Response ( Z thja ) D = R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci= τi/ri Ri ( C/W) τi (sec) SINGLE PULSE ( THERMAL RESPONSE ) Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthja Tc 0.0 E006 E t, Rectanguar Puse Duration (sec) Fig 26. Maximum Effective Transient Therma Impedance, JunctiontoAmbient (Q2) R 4 R 4 τ 4 τ 4 τ A τ Fig 27. Layout Diagram 7

8 IRF7902PbF D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controed by RG Driver same type as D.U.T. I SD controed by Duty Factor "D" D.U.T. Device Under Test V DD ReAppied Votage Body Diode Inductor Curent Current Forward Drop Rippe 5% I SD * V GS = 5V for Logic Leve Devices Fig 28. Peak Diode Recovery dv/dt Test Circuit for NChanne HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 20V V GS tp D.U.T IAS 0.0Ω V DD A I AS Fig 29a. Uncamped Inductive Test Circuit Fig 29b. Uncamped Inductive Waveforms L D V DS V DD V DS 90% D.U.T % V GS Puse Width < µs Duty Factor < 0.% V GS t d(on) t r t d(off) t f Fig 30a. Switching Time Test Circuit Current Reguator Same Type as D.U.T. Fig 30b. Switching Time Waveforms Vds Id 50KΩ Vgs 2V.2µF.3µF D.U.T. V DS V GS Vgs(th) 3mA I G I D Current Samping Resistors Qgs Qgs2 Qgd Qgodr Fig 3a. Gate Charge Test Circuit Fig 3b. Gate Charge Waveform 8

9 IRF7902PbF SO8 Package Outine Dimensions are shown in miimeters (inches) ' % ',0,&(6 0, 0$; 0,//,0(7(56 0, 0$; $ $ $ ( >@ $ E F ' ( H %$6,& %$6,& H %$6,& %$6,& ; H. / \ ƒ ƒ ƒ ƒ H $.[ƒ & \ ;E $ >@ ;/ ;F >@ & $ % )22735,7 27(6 ',0(6,2,* 72/(5$&,*3(5$60(<0 &2752//,*',0(6,2,//,0(7(5 ',0(6,26$5(62:,,//,0(7(56>,&(6@ 287/,(&2)250672('(&287/,(06$$ ',0(6,2'2(627,&/8'(02/' ,26 02/' ,262772(;&(('>@ ',0(6,2'2(627,&/8'(02/' ,26 02/' ,262772(;&(('>@ ',0(6,2,67(/(*72)/($')2562/'(5,*72 $68%675$7( >@ ;>@ SO8 Part Marking Information ;>@ ;>@ (;$03/(7,6,6$,5)026)(7,7(5$7,2$/ 5(&7,),(5 /2*2 ) ;;;; '$7(&2'(<:: 3 ',6*$7(6/($')5(( 352'8&7237,2$/ < /$67',*,72)7(<($5 :: :((. $ $66(0%/<6,7(&2'( /27&2'( 3$5780%(5 9

10 IRF7902PbF SO8 Tape and Ree Dimensions are shown in miimeters (inches) TERMINAL NUMBER 2.3 (.484 ).7 (.46 ) 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES:. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES). 3. OUTLINE CONFORMS TO EIA48 & EIA (2.992) MAX. NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. OUTLINE CONFORMS TO EIA48 & EIA (.566 ) 2.40 (.488 ) Notes: Repetitive rating; puse width imited by max. junction temperature. Starting, Q: L = 0.26mH, R G = 25Ω, I AS = 5.A; Q2: L = 0.24mH, R G = 25Ω, I AS = 7.8A. ƒ Puse width 400µs; duty cyce 2%. When mounted on inch square copper board. R θ is measured at T J approximatey 90 C. Data and specifications subject to change without notice. This product has been designed and quaified for the Consumer market. Quaification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., E Segundo, Caifornia 90245, USA Te: (3) TAC Fax: (3) Visit us at for saes contact information. 07/2006

V DSS. Absolute Maximum Ratings Parameter Q1 Max. Q2 Max. Units V DS Drain-to-Source Voltage 30 V GS

V DSS. Absolute Maximum Ratings Parameter Q1 Max. Q2 Max. Units V DS Drain-to-Source Voltage 30 V GS PD - 97A IRF797PbF Appications Dua SO-8 MOSFET for POL Converters in Notebook Computers, Servers, Graphics Cards, Game Consoes and Set-Top Box V DSS HEXFET Power MOSFET R DS(on) max 3V Q.4m:@V GS = V 9.A