Features. Symbol Parameter Rating Units V DS Drain-Source Voltage 30 V V GS Gate-Source Voltage ±20 V
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1 General Description These N-Channel enhancement mode power field effect transistors are using trench DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency fast switching applications. TO252 Pin Configuration D BVDSS RDSON ID 30V 9mΩ 50A Features 30V,50A, RDS(ON) =9mΩ@VGS = 10V Improved dv/dt capability Fast switching 100% EAS Guaranteed Green Device Available G-S ESD Protection Diode Embedded D G Applications MB / VGA / Vcore POL Applications G S S SMPS 2 nd SR Absolute Maximum Ratings Tc=25 unless otherwise noted Symbol Parameter Rating Units V DS Drain-Source Voltage 30 V V GS Gate-Source Voltage ±20 V I D Drain Current Continuous (T C =25 ) 50 A Drain Current Continuous (T C =100 ) 32 A I DM Drain Current Pulsed A EAS Single Pulse Avalanche Energy 2 45 mj IAS Single Pulse Avalanche Current 2 30 A P D Power Dissipation (T C =25 ) 40 W Power Dissipation Derate above W/ T STG Storage Temperature Range -55 to 150 T J Operating Junction Temperature Range -55 to 150 Thermal Characteristics Symbol Parameter Typ. Max. Unit R θja Thermal Resistance Junction to ambient /W R θjc Thermal Resistance Junction to Case /W 1
2 Electrical Characteristics (T J =25, unless otherwise noted) Static State Characteristics BV DSS Drain-Source Breakdown Voltage V GS =0V, I D =250uA V BV DSS / T J BV DSS Temperature Coefficient Reference to 25, I D =1mA V/ I DSS Drain-Source Leakage Current V DS =30V, V GS =0V, T J = ua V DS =24V, V GS =0V, T J = ua I GSS Gate-Source Leakage Current V GS =±20V, V DS =0V ±10 ua R DS(ON) Static Drain-Source On-Resistance 3 V GS =10V, I D =16A mω V GS =4.5V, I D =8A mω V GS(th) Gate Threshold Voltage V GS =V DS, I D =250uA V V GS(th) V GS(th) Temperature Coefficient mv/ gfs Forward Transconductance V DS =10V, I D =8A S Dynamic Characteristics Q g Total Gate Charge 3, Q gs Gate-Source Charge 3, 4 V DS=15V, V GS=4.5V, I D =20A Q gd Gate-Drain Charge 3, T d(on) Turn-On Delay Time 3, T r Rise Time 3, 4 V DD=15V, V GS=10V, R G =3.3Ω T d(off) Turn-Off Delay Time 3, 4 I D =15A T f Fall Time 3, C iss Input Capacitance C oss Output Capacitance V DS =25V, V GS =0V, F=1MHz C rss Reverse Transfer Capacitance R g Gate resistance V GS =0V, V DS =0V, F=1MHz Ω Guaranteed Avalanche Energy EAS Single Pulse Avalanche Energy V DD =25V, L=0.1mH, IAS=15A mj nc ns pf Drain-Source Diode Characteristics I S Continuous Source Current V G =V D =0V, Force Current A I SM Pulsed Source Current A V SD Diode Forward Voltage 3 V GS =0V, I S =1A, T J = V t rr Reverse Recovery Time VGS=0V,IS=1A, di/dt=100a/µs ns Q rr Reverse Recovery Charge T J = nc Note : 1. Repetitive Rating : Pulsed width limited by maximum junction temperature. 2. V DD =25V,V GS =10V,L=0.1mH,I AS =30A.,RG=25Ω,Starting TJ= The data tested by pulsed, pulse width 300us, duty cycle 2%. 4. Essentially independent of operating temperature. 2
3 ID, Continuous Drain Current (A) Normalized On Resistance (mω) T C, Case Temperature ( ) Fig.1 Continuous Drain Current vs. T C T J, Junction Temperature ( ) Fig.2 Normalized RDSON vs. T J Normalized Gate Threshold Voltage (V) VGS, Gate to Source Voltage (V) T J, Junction Temperature ( ) Fig.3 Normalized V th vs. T J Qg, Gate Charge (nc) Fig.4 Gate Charge Waveform Normalized Thermal Response (RθJC) ID, Continuous Drain Current (A) Square Wave Pulse Duration (s) Fig.5 Normalized Transient Impedance V DS, Drain to Source Voltage (V) Fig.6 Maximum Safe Operation Area 3
4 V DS 90% EAS= 1 2 L x I AS 2 x BV DSS BV DSS -V DD BV DSS V DD 10% I AS V GS T d(on) T r T d(off) T f T on T off V GS Fig.7 Switching Time Waveform Fig.8 EAS Waveform 4
5 TO252 PACKAGE INFORMATION Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A A A B C C D E F F L L1 2.9REF 0.114REF L L θ
Features. Symbol Parameter Rating Units V DS Drain-Source Voltage 600 V V GS Gate-Source Voltage ±30 V
General Description These N-Channel enhancement mode power field effect transistors are planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance,
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More informationRev 1.2. Maximum Ratings, at T j = 25 C, unless otherwise specified Parameter Symbol Value Unit Continuous drain current I D.
SIPMOS Small-Signal-Transistor Feature N-Channel Enhancement mode dv/dt rated Pb-free lead plating; RoHS compliant Product Summary V DS 6 V R DS(on).3 W I D.8 PG-SOT-223 4 2 3 VPS563 Type Package Tape
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omponents 2736 Marilla Street Chatsworth!"# $%!"# MCQNY Features Halogen free available upon request by adding suffix "-HF" Lead Free Finish/ohs Compliant ("P"Suffix designates ohs Compliant. See ordering
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Cool MOS =Power Transistor =New revolutionary high voltage technology Ultra low gate charge =Periodic avalanche rated Extreme dv/dt rated =Optimized capacitances =Improved noise immunity =Former development
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More informationFinal data. Maximum Ratings, at T C = 25 C, unless otherwise specified Parameter Symbol Value Unit Continuous drain current
Cool MOS Power Transistor Feature New revolutionary high voltage technology Worldwide best R DS(on) in TO 47 Ultra low gate charge Periodic avalanche rated Extreme dv/dt rated Ultra low effective capacitances
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NDS65 NDS65 P-Channel Enhancement Mode Field Effect Transistor General Description These P-Channel enhancement mode field effect transistors are produced using ON Semiconductor s proprietary, high cell
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SIPMOS SmallSignalTransistor Feature NChannel Enhancement mode Logic Level dv/dt rated Pbfree lead plating; RoHS compliant Qualified according to EC Q Product Summary V DS V R DS(on) 6 Ω I D.37 PGSOT3
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