Study of MOSFET circuit
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1 ECE 570 Computer Aided Engineering for Integrated Circuits IC E Simulation Assignment No. 3 - Due: Oct. 30 (Th.), 2003 Study of MOSFET circuit Simulate the basic circuit of CMOS shift register shown in Fig. 1. V DD =5 V V 2 V DD =5 V V 1 i 1 x1 x 3 x 2 i 2 Fig. 1. Basic cell of CMOS shift register. Assume the SPICE Level 1 model of the device and parameters provided in the enclosed list. Use those parameters, which are relevant for the model of Level 1. The input voltage (V 1 ) and the clock (V 2 ) are specified in Fig. 2. Plot the nodal voltages x 1, x 2, x 3 and the currents i 1, i 2 versus time. [V] V V t r t Fig. 2. Plot of input voltage (V 1 ) and clock (V 2 ) wave-forms. 1
2 Find a minimum rise time with which this circuit will function satisfactorily. You will need to use your judgment to determine satisfactory circuit performance and consequently the minimum rise time. Assume that rise and fall times in both wave-forms are identical, and that the relation between rise time and clock cycle is T clk = 10 t r. For the start assume the rise time to be 0.1[nsec]. (You may need to perform the simulations with the rise times of smaller and larger values.) Adjust the input voltage wave-form appropriately (you want to see the clock going up and down in both cases when the input is high and when the input is low) when changing the rise time. Perform a convergence test for the circuit with the determined minimum rise time. Provide a written report including the concise definition of satisfactory circuit performance. A sample file with transistor parameters (SPICE version: 3e2) Note: these parameters are for old manufacturing technology. Thes parameters can be used for regular credit (up to 100 points)..model ece570_2p PMOS level=1 +vto=-.82 kp=3.27e-5 gamma=.561 phi=.87 cbd=.91p cbs=.91p +is=1e-16 cgdo=2.02e-10 cgso=2.02e-10 mj=.5 mjsw=.5 pb=0.8 M_M1 + L=2u + W=500u + AD=5400p + AS=2500p + PD=1010u + PS=1010u $N_0003 $N_0001 $N_0002 $N_0002 ece570_2p.model ece570_2n NMOS level=1 +vto=.62 kp=9.33e-5 gamma=.641 phi=.6 cbd=.354p cbs=.354p +is=1e-16 cgdo=2.02e-10 cgso=2.02e-10 mj=.5 mjsw=.5 pb=0.8 M_M2 + L=2u + W=200u + AD=1000p + AS=1000p + PD=410u + PS=410u $N_0003 $N_ ece570_2n Extra credit: Total - 50 points a) 20 points for extracting the suitable parameters (for Level 1) from the data for advanced technology and more advanced model given on the following pages. b) 30 points for simulation with the extracted, new data and comparison of the results with the simulation obtained using the old data (old technology) given on this page. 2
3 MOSIS file tsmc-018/t1ch_mm_non_epi_thk-params.txt MOSIS PARAMETRIC TEST RESULTS RUN: T1CH (MM_NON-EPI_THK-MTL) VENDOR: TSMC TECHNOLOGY: SCN018 FEATURE SIZE: 0.18 microns INTRODUCTION: This report contains the lot average results obtained by MOSIS from measurements of MOSIS test structures on each wafer of this fabrication lot. SPICE parameters obtained from similar measurements on a selected wafer are also attached. COMMENTS: DSCN6M018_TSMC TRANSISTOR PARAMETERS W/L N-CHANNEL P-CHANNEL UNITS MINIMUM 0.27/0.18 Vth volts SHORT 20.0/0.18 Idss ua/um Vth volts Vpt volts WIDE 20.0/0.18 Ids pa/um LARGE 50/50 Vth volts Vjbkd volts Ijlk <50.0 <50.0 pa Gamma V^0.5 K' (UoCox/2) ua/v^2 Low-field Mobility cm^2/vs COMMENTS: Poly bias varies with design technology. To account for mask and etch bias use the appropriate value for the parameters XL and XW in your SPICE model card. Design Technology XL XW SCN6M_DEEP (lambda=0.09) thick oxide TSMC thick oxide SCN6M_SUBM (lambda=0.10) thick oxide FOX TRANSISTORS GATE N+ACTIVE P+ACTIVE UNITS Vth Poly >6.6 <-6.6 volts 3
4 PROCESS PARAMETERS N+ACTV P+ACTV POLY N+BLK PLY+BLK MTL1 MTL2 UNITS Sheet Resistance ohms/sq Contact Resistance ohms Gate Oxide Thickness 41 angstrom PROCESS PARAMETERS MTL3 MTL4 MTL5 MTL6 N_WELL UNITS Sheet Resistance ohms/sq Contact Resistance ohms COMMENTS: BLK is silicide block. CAPACITANCE PARAMETERS N+ACTV P+ACTV POLY M1 M2 M3 M4 M5 M6 M5P N_WELL UNITS Area (substrate) Area (N+active) Area (P+active) 7971 Area (poly) Area (metal1) Area (metal2) Area (metal3) Area (metal4) Area (metal5) Area (no well) 133 Fringe (substrate) Fringe (poly) Fringe (metal1) Fringe (metal2) Fringe (metal3) Fringe (metal4) Fringe (metal5) 59 Overlap (N+active) 749 Overlap (P+active) 686 CIRCUIT PARAMETERS UNITS Inverters K Vinv volts 4
5 Vinv volts Vol (100 ua) volts Voh (100 ua) volts Vinv volts Gain Ring Oscillator Freq. D1024_THK (31-stg,3.3V) MHz DIV1024 (31-stg,1.8V) MHz Ring Oscillator Power D1024_THK (31-stg,3.3V) 0.07 uw/mhz/gate DIV1024 (31-stg,1.8V) 0.02 uw/mhz/gate COMMENTS: DEEP_SUBMICRON T1CH SPICE BSIM3 VERSION 3.1 PARAMETERS SPICE 3f5 Level 8, Star-HSPICE Level 49, UTMOST Level 8 DATE: Feb 15/02 LOT: T1CH WAF: 8005 Temperature_parameters=Default.MODEL tsmc018cmosn NMOS LEVEL = 7 +VERSION = 3.1 TNOM = 27 TOX = 4.1E-9 +XJ = 1E-7 NCH = E17 VTH0 = K1 = K2 = E-3 K3 = 1E-3 +K3B = W0 = E-7 NLX = E-7 +DVT0W = 0 DVT1W = 0 DVT2W = 0 +DVT0 = DVT1 = DVT2 = U0 = UA = E-9 UB = E- 18 +UC = E-11 VSAT = E5 A0 = 2 +AGS = B0 = E-9 B1 = -1E-7 +KETA = E-3 A1 = 0 A2 = RDSW = PRWG = PRWB = 0.2 +WR = 1 WINT = E-10 LINT = E-8 +DWG = E-9 +DWB = E-9 VOFF = NFACTOR = 2.5 +CIT = 0 CDSC = 2.4E-4 CDSCD = 0 +CDSCB = 0 ETA0 = 0 ETAB = DSUB = 1 PCLM = PDIBLC1 = PDIBLC2 = PDIBLCB = E-3 DROUT = PSCBE1 = E9 PSCBE2 = 5E-10 PVAG = DELTA = 0.01 RSH = 6.7 MOBMOD = 1 +PRT = 0 UTE = -1.5 KT1 = KT1L = 0 KT2 = UA1 = 4.31E-9 +UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4 +WL = 0 WLN = 1 WW = 0 +WWN = 1 WWL = 0 LL = 0 +LLN = 1 LW = 0 LWN = 1 +LWL = 0 CAPMOD = 2 XPART = 0.5 +CGDO = 7.49E-10 CGSO = 7.49E-10 CGBO = 1E-12 +CJ = E-4 PB = MJ = CJSW = E-10 PBSW = MJSW = CJSWG = 3.3E-10 PBSWG = MJSWG = CF = 0 PVTH0 = E-4 PRDSW = -5 +PK2 = E-3 WKETA = E-3 LKETA = E-3 5
6 +PU0 = PUA = E-10 PUB = 0 +PVSAT = E3 PETA0 = 1E-4 PKETA = E-3.MODEL tsmc018cmosp PMOS LEVEL = 7 +VERSION = 3.1 TNOM = 27 TOX = 4.1E-9 +XJ = 1E-7 NCH = E17 VTH0 = K1 = K2 = K3 = K3B = 20 W0 = E-6 NLX = E-8 +DVT0W = 0 DVT1W = 0 DVT2W = 0 +DVT0 = DVT1 = DVT2 = 0.1 +U0 = UA = E-9 UB = E- 21 +UC = -1E-10 VSAT = E5 A0 = AGS = B0 = E-6 B1 = 5E-6 +KETA = A1 = A2 = RDSW = PRWG = 0.5 PRWB = WR = 1 WINT = E-9 LINT = E-8 +DWG = E-8 +DWB = E-8 VOFF = NFACTOR = CIT = 0 CDSC = 2.4E-4 CDSCD = 0 +CDSCB = 0 ETA0 = ETAB = DSUB = PCLM = PDIBLC1 = E-4 +PDIBLC2 = PDIBLCB = -1E-3 DROUT = 0 +PSCBE1 = E9 PSCBE2 = E-10 PVAG = DELTA = 0.01 RSH = 7.5 MOBMOD = 1 +PRT = 0 UTE = -1.5 KT1 = KT1L = 0 KT2 = UA1 = 4.31E-9 +UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4 +WL = 0 WLN = 1 WW = 0 +WWN = 1 WWL = 0 LL = 0 +LLN = 1 LW = 0 LWN = 1 +LWL = 0 CAPMOD = 2 XPART = 0.5 +CGDO = 6.86E-10 CGSO = 6.86E-10 CGBO = 1E-12 +CJ = E-3 PB = MJ = CJSW = E-10 PBSW = MJSW = CJSWG = 4.22E-10 PBSWG = MJSWG = CF = 0 PVTH0 = E-3 PRDSW = PK2 = E-3 WKETA = E-3 LKETA = E- 3 +PU0 = PUA = E-11 PUB = 1E-21 +PVSAT = -50 PETA0 = 1E-4 PKETA = E-3 6
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