ENHANCEMENT OF NANO-RC SWITCHING DELAY DUE TO THE RESISTANCE BLOW-UP IN InGaAs

Transcription

1 NANO: Brief Reports and Reviews Vol. 2, No. 4 (27) c World Scientific Publishing Company ENHANCEMENT OF NANO-RC SWITCHING DELAY DUE TO THE RESISTANCE BLOW-UP IN InGaAs MICHAEL L. P. TAN, ISMAIL SAAD and RAZALI ISMAIL Faculty of Electrical Engineering, Universiti Teknologi Malaysia 8131 UTM Skudai, Johor, Malaysia razali@fke.utm.my VIJAY K. ARORA Division of Engineering and Physics, Wilkes University Wilkes-Barre, PA 18766, USA vijay.arora@wilkes.edu Received 28 May 27 Revised 18 July 27 RC and transit-time delays in a nanocircuit, where the resistor is a few nanometers in length, are evaluated taking into account the velocity and current saturation and applied to RC switching delay in InGaAs heterojunction field effect transistor (HFET). Transit time delay is the dominant factor in the ohmic regime where the applied voltage V is less than the critical voltage V c for the onset of nonlinear nonohmic behavior. However, RC time constant is predominant in the nonohmic regime and increases linearly with the applied step voltage. The power in the nanocircuit is smaller and rises linearly in the nonohmic regime as compared to the quadratic behavior in the ohmic regime. Keywords: RC switching; transit-time delay; velocity saturation; current saturation; InGaAs HFET. 1. Introduction In switching circuits with capacitive load, the transit time delay (τ t )andtheriseandfalltimeofa digital signal due to RC time constants (τ RC )contribute to the delayed response when driven by a step voltage source in a series RC circuit. Considerable progress has been made in reducing the transittime delay due to scaling down of the size of the devices that is now in nanometer-regime. Efforts are underway to utilize low-resistivity materials and low-k dielectrics to shorten the RC time delay. However, there are intrinsic factors that enhance RC timing delay due to the resistance blow-up 1 3 when the step voltage V driving an RC circuit exceeds the critical voltage V c at the onset of nonohmic behavior due to mobility degradation. The smaller length of a resistor reduces the transit-time delay but enhances resistance value and hence the RC time delay. When coupled with load or parasitic capacitance in series, this resistance blow-up is expected to give an enhanced RC time constant that is the focus of this study for InGaAs channel, extendable to nanoscale resistive channels of any material, including silicon. Chan and Schlag 4 previously studied bounds on signal delay in RC mesh networks where resistance blow-up was not included. Similar delay analysis study on series-connected MOSFET circuits was done by Sakurai and Newton. 5 Samudra et al. 6 obtained exact analytical expressions for the switching delay of a CMOS inverter driving an RC load, taking into account the velocity saturation of the 233

2 234 M. L. P. Tan et al. channel, but not that of the load resistor. Sakurai 7 attained closed form expressions for interconnect delay, coupling, and crosstalk in VLSI circuits, not including the breakdown of Ohm s law. Greenberg and del Alamo 2 presented direct experimental evidence of resistance blow-up in an InGaAs 15-nm channel due to velocity and current saturation. In a typical circuit (Fig. 1), a resistor of length L and area of cross-section A (A = Wd)isstimulated by a voltage source with voltage rising from V to a logic level of V volts (say 5 V being scaled down to as low as 1 V) as it switches from low (V = ) logic state to a higher one with step voltage V or vice versa. τ = R C is the time for the capacitor to attain a capacitor voltage v c (τ )=V (1 e 1 )=.63 V as obtained from the application of Ohm s law. Here R is the ohmic resistance that is given by R = 1 L nqµ A = ρ L A = ρ L s W, (1) where ρ is the resistivity (Ω-m) of the resistor and ρ s = ρ/d(ω/ ) is its sheet resistivity. µ is the ohmic mobility of the given sample that depends on the scattering parameters. Ohm s law is valid for an applied voltage below the critical voltage V c = (V t /l )L. HereV t is the room-temperature thermal voltage with a value of 25.9 mv at room temperature. A measured critical electric field of E c =3.8kV/cm for an InGaAs heterojunction field effect transistor (HFET) channel gives l =7nm. 2 Thus for a macro-resistor of length L =1cm,the onset of nonohmic behavior does not commence until applied voltage V exceeds V c =3.8kV. However, for a nanoresistor of L = 1 nm, nonohmic behavior commences at V c =.38V which is substantially smaller than the applied step voltage of 5V (V/V c =13.2). V/V c enhances to a value of 132 with V c =.38V if the resistor length is further scaled down to 1 nm. Fig. 1. A prototype RC circuits with the resistor a few nanometer in length. 2. I V Characteristics A generalization to Ohm s law is obtained from the conversion of stochastic carrier motion in zero electric field to a streamlined one in a high electric field. 1 In the developed theory, 3 the current voltage (I V ) characteristics are given by: ( ) V I = I sat tanh = V ( ) c V tanh, (2) V c R V c with I sat = nqv sat A = n s qv sat W = V c. (3) R I sat is the saturation current for a given resistor that depends on the volume concentration n or surface concentration n s of the electrons and width W of the resistor. I sat is independent of the length L and is linearly proportional to the width W of the resistor. Normalized I V characteristics given by Eq. (2) are plotted in Fig. 2. The experimental results obtained in Ref. 2 are also shown. Solid curve is from the theory of Eq. (2). Dotted curve is representation of experimental values from Ref. 2. Extreme ohmic and saturation current curves are also shown and intersect at V = V c. Figure 3 shows I V characteristics of three resistors of the same ohmic value (R = 16.8Ω, W/L = 4) but with L = 5, 2, and 8 µm. For V < V c, the three curves are almost linear with the same slope indicating the validity of Ohm s law. However as V becomes larger than V c, the current tends to be closer to the saturation value I sat that increases linearly with the width of the channel. For resistors with the same channel width W but differing L, the ohmic resistance (initial slope of I V graph) will differ, but the current will approach the same saturation value; towards saturation being faster for a smaller-length resistor. 3. Switching Transients When signal switches from low (V =)tohigh(v ), for example, the transient voltage response v c (t) of the capacitor is obtained as: ( ) i v c (t) =V V c tanh 1, (4) I sat where the transient current in the circuit is given by i(t) =I sat sinh(v/v c )e t/τ (1 + sinh 2 (V/V c )e 2t/τ ) 1/2. (5)

3 Enhancement of Nano-RC Switching Delay Due to the Resistance Blow-Up in InGaAs I/I sat Theory Experiment Saturation Ohmic V/V c Fig. 2. Normalized theoretical and experimental I V characteristics of a nanoresistor. 2 CURRENT I (ma) W/L = 2/5 (Th) W/L = 2/5 (Emp) W/L = 8/2 (Th) W/L = 8/2 (Emp) W/L = 32/8 (Th) W/L = 32/8 (Emp) POTENTIAL V (V) Fig. 3. I V characteristics of three resistors with length L = 5, 2, 8 µm. W/L = 4 and ohmic resistance R =16.8Ω is the same for all three resistors. I sat is 113 ma, 452 ma, and 188 ma, respectively for the three resistors. The empirical data is derived from Ref. 2 with electric field E converted to potential (V = EL). In the limit L, Eq. (5) reduces to the ohmic expression i(t) = V R e t/τ. (6) Equations (5) and (6) show that the initial current will be substantially higher in the ohmic as compared to that obtained from the nonohmic currentsaturation-limited model. In the ohmic model, the initial current i O () = V/R. In the nonohmic model, it will be i NO () = (V c /R ) tanh(v/v c ). The ratio of the nonohmic to ohmic initial current and related power consumption ratio P/P is given by: i NO () i O () = P = tanh(v/v c). (7) P (V/V c ) This ratio approaches 1 in the ohmic regime V < V c as expected. However, in the regime V V c,the ratio decreases as (V/V c ) 1. This drop in the initial current as the capacitor starts charging is shown in Fig. 4. The power consumption P = VV c /R in the nonohmic regime not only is smaller but also is a linear function of the applied step voltage as compared to the quadratic behavior in the ohmic regime (V < V c ). This transformed behavior affects the figure of merit with tradeoff between frequency and power. Figure 5 indicates the charging response of the capacitor of C = 1 pf connected in series with a resistor of W = 1 µm and R = 16.8Ω. The approach towards full potential of the capacitor is very slow, especially for the shortest resistor as compared to ohmic response, indicative of a considerable enhancement of the RC timing delay. This observation is consistent with the linear resistance rise with applied voltage when V > V c. For an ac signal, the differential resistance rise is even larger. 2,3 For comparison, t = τ RC is defined as the time at which the capacitor potential is (1 e 1 ) of the higher-logic potential V.Theratioof

4 236 M. L. P. Tan et al. i() NO /i() O τ/ τ o τ RC τ t (1 µm) τ t (5 µm) τ t (2 µm) POTENTIAL RATIO (V/V c ) Fig. 4. The ratio of initial charging current in the nonohmic model to that in the ohmic model. The dashed line represents ohmic current. The relative power ratio follows the same pattern. v(t) (V) t (ps) L = 5 µm L = 2 µm L = 8 µm Ohmic Fig. 5. The response of capacitor in a nano-rc circuit as voltage is increased from low to high. this transformed time delay to its ohmic value is obtained as: [ ] τ RC sinh(v/vc ) =ln. (8) τ sinh(v/ev c ) In the regime where V < V c (L ), this ratio reaches unity. In the other extreme (L ), the ratio is τ RC (L ) (1 e 1 ) V. (9) τ V c This ratio rises linearly with potential in the nonohmic regime. The transit time delay τ t can be calculated from the device length L divided by the POTENTIAL RATIO (V/V c ) Fig. 6. The normalized RC time delay and transit time delay as a function of normalized applied voltage. drift velocity 1,3 v = v sat tanh(v/v c ): L τ t = v sat tanh(v/v c ), (1) where the saturation velocity v sat is estimated in the degenerate regime from the Fermi Dirac distribution and is given by 3 : v sat = 2 ( ) 2πη 2 1/2 3 m n s. (11) For m =.57m, appropriate for In.15 Ga.85 As channel and surface carrier density of 1 12 cm 2, v sat m/s. Figure 6 shows the comparison of two time delays for channels of length L = 1, 5, and 2 µm. In the long-channel limit (L ), the transit time delay is L 2 /µ V.Hereµ is the ohmic mobility and E = V/L is the applied electric field. In the short channel limit (L ), it is L/v sat independent of the applied voltage. 4. Conclusion The response of a resistive circuit to a digital signal is slow due to enhancement of RC time delay. However, power consumption is smaller. A tradeoff in circuit design therefore exists. These results are useful in extraction of parasitics in the contact regions. References 1. V. K. Arora, Appl. Phys. Lett. 8, 3763 (22). 2. D. R. Greenberg and J. A. del Alamo, IEEE Trans. Electron Dev. 41, 1334 (1994).

5 Enhancement of Nano-RC Switching Delay Due to the Resistance Blow-Up in InGaAs V. K. Arora, Proc. IEEE Int. Conf. Microelectronics, Vol. 1, Belgrade, Serbia and Montenegro (26), p P. K. Chan and M. D. F. Schlag, IEEE Trans. Computer-Aided Design 8, 581 (1989). 5. T. Sakurai and A. R. Newton, IEEE J. Solid-State Circuits 26, 122 (1991). 6. G. Samudra, A. K. F. Yong, T. K. Lee and V. K. Arora, Semicond. Sci. Technol. 9, 118 (1994). 7. T. Sakurai, IEEE Trans. Electron Dev. 4, 118 (1993).

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