ECEN474/704: (Analog) VLSI Circuit Design Spring 2018

Transcription

1 EEN474/704: (nal) VSI ircuit Desin Sprin 0 ecture 3: Flded ascde & Tw Stae Miller OT Sa Paler nal & Mixed-Sinal enter Texas &M University

2 nnunceents Exa dates reinder Exa is n pr. 0 Exa 3 is n May 3 (3PM-5PM) Prject descriptin is psted n website

3 enda Sinle-Stae ascde OT Flded ascde OT Tw Stae Miller OT 3

4 Siple OT V DD M 5 M 6 V bias V i+ M M V i- D Gain v G ut r r 6 I tail M 3 M 4 V SS Gain is liited by sinle-transistr utput resistance 4

5 Sinle-Stae ascde OT [azavi] D Gain v G ut r r r r Gain is larer by a r factr Output swin rane is liited due t lare cpliance vltae f cascde current surce lad 5

6 Sinle-Stae ascde OT Unity Gain Feedback Vltae ane [azavi] sv V ut b V V x x Miniu V Maxiu V V V GS 4 TH ut ut and pluinv V V V Output (& Input) ane V b ut ut V set by M4 saturatin V set by M saturatin V GS 4 b x V V V ess than a V TH 4 TH x TH TH 4 TH int M sat cnditin V!!! b V GS 4 V GS 4 V V TH TH ascde cnfiuratin cnstrains utput & unity-ain swin 6

7 Flded ascde ircuits [azavi] PMOS Input & NMOS ascde NMOS Input & PMOS ascde Fldin abut the cascde nde will increase input and utput swin rane 7

8 Flded ascde OT [azavi]

9 Flded ascde OT Unity Gain Feedback Vltae ane MP MN Miniu V ut V ut Maxiu V V DSTN V V ut ut V DSTN set by MP saturatin b VTHP set by utput NMOS cascde r tail current surce saturatin O V ut V DSTI Tail V GS With prper (hih-value) chice f Vb, a decent utput and input swin rane can be achieved 9

10 TMU-EEN Jse Silva-Martinez Flded-ascde OT:, rut and ples? V B and V B ust keep M -M 5 in saturatin rein V B > V sat,4 + V GS3 (fr M4 sat) V B < V DD -V sat,5 V SG (fr M5 sat) Ntice that ID5 biases bth M and M G r r r r r r ; ut ds ds ds5 ds3 3 ds4-0-

11 TMU-EEN Jse Silva-Martinez -- Exaple: Flded-ascde OPMP Find the ain and the phase fr input t utput and fr input t nde. The lw frequency ain is 77 db and the unity ain frequency is arund 0 MHz. The behavir f the ain fr the input t nde is interestin: abve the dinant ple. 5 ut z r 5

12 TMU-Elen-474 Jse Silva-Martinez-0 FODED-SODE OT Frequency respnse: V X I D I D VDD VB3 V W an be apprxiated as havin 4 ples assciated with ndes V ut, V X/W, V Z, and V Y MP V Y VB VB v in + M VB v in - VB i OUT vut The ples at Vy and Vz are assciated t N-type transistrs hiher frequencies V Z MN I D MN -VSS V s ut s ut ut s P p s Y n s Z nc --

13 TMU-Elen-474 Jse Silva-Martinez-0 M3 V Y M4 M5 MN V X Vn4 VB I D VB v in + I D Fr cascde transistrs M4 r5 i04 M M eeber i 04 I D VB v in VDD VB3 VB r 05 V W MN v i eq kt 3 n 4 v r i OUT V Z -VSS n 4 05 vut Output referred nise M prduces an utput current iven by i 0 v n Each transistr M enerates a differential utput current i 0 v n Siilarly, fr each transistr M5 i 05 5v n 5 t lw and ediu frequencies, nise cntributin f the cascde transistrs can be nelected (M3 and M4) i ut = (i eq + i eq + i eqn ) ut i f 6 3 kt n -3-

14 TMU-Elen-474 Nise level fr the flded-cascde OT Jse Silva-Martinez-0 M VDD VB3 nsiderin theral nise nly V Y V X I D VB v in + VB M I D V W VB v in - VB i OUT vut i f G 6 kt 3 vin ut f et s find the input rs nise n V Z Or fr a dinant (sinle) ple syste with NBW = (/)BW v M5 nise I D kt 5 BW M5 -VSS Nise f diff pair Nise Factr (due t ther transistrs) 6 5 vnise kt 3 BW -4- df w-nise is assciated with lare and relatively sall and 5

15 Multi-Stae plifiers Sinle-stae aplifiers typically have t trade-ff ain and swin rane Multi-stae aplifiers allw fr hiher ain withut sacrificin swin rane The ajr challene with ulti-stae aplifiers is achievin adequate phase arin t insure stability in a feedback cnfiuratin 5

16 Tw Stae Miller OT v ut ut VD v v VD G G D Gain

17 Tw-Stae Miller OT Frequency espnse Stae is a differential aplifier with an active lad Stae is a cn-surce aplifier with a lare iller capacitr Usin a Thevenin equivalent fr Stae, we can use the cn-surce equatins fr ecture 7

18 Tw-Stae Miller OT Frequency espnse The aplifier shuld be desined t yield ne dinant ple, s we use the dinant ple apprxiatin equatins p ut p ut ut ut ut where Nelectin Transistr ut r ut ut O r ut O4 and apacitances ut ut r O7 r O ut

19 v d M M i 0 i0 i0 M M Frequency espnse N pensatin i 0 -v d M 3 i 0 VDD -v 0 s s p VD s p EEN-474 Main equatins VSS VD p p GBW 3 * in, VD p Phase _ arin 0 tan (HP) (HP) p u p (if dinant ple syste, valid?) tan u p VD Phase Phase Marin < 45 derees u p p GBW Jse Silva-Martinez -9- Texas &M University

20 TMU-Elen-474 Frequency espnse Miller pensatin (Inrin z ) VDD Jse Silva-Martinez-0 M M i 0 i 0 M 3 i 0 -v 0 v d i0 i0 -v d M M M VD p p 3 GBW VD 3 3 Phase _ arin 0 tan M (HP) * p (HP) M VSS Phase cpensatin Ple splittin techniques!! GBW tan p GBW p -0- VD p p fter cpensatin Phase Marin > 45 derees Bandwidth is reduced!!! p u GBW p

21 TMU-Elen-474 Frequency espnse Miller pensatin (nsiderin z ) Jse Silva-Martinez-0 v d M M i 0 i0 i0 i 0 -v d M 3 M i 0 VDD -v 0 s s VD z s s p p M M Parasitic (bad) HP zer!! VD p p 3 GBW VD 3 3 Phase _ arin 0 tan M (HP) * p (HP) M GBW tan p VSS VD GBW tan p -- GBW ZEO p p ZEO fter cpensatin Phase Marin > 45 derees Bandwidth is reduced!!! p GBW 3 M p (HP) GBW ZE O

22 TMU-Elen-474 z Ipact n Frequency espnse Jse Silva-Martinez-0 Parasitic (bad) HP zer!! an be catastrphic if clse r belw wu! ZEO 3 M v d M M i 0 i0 i0 M M i 0 -v d M 3 M i 0 VDD -v 0 Phase_ arin 0 tan VD u tan p' u tan p' fter cpensatin Phase Marin > 45 derees Bandwidth is reduced!!! u ZEO VD VSS fter cpensatin Phase Marin << 45 derees Phase is equivalent t havin 3 ples belw unity ain frequency Unstable! p p p GBW p GBW ZE O -- p p p ZEO p GBW u

23 v d TMU-Elen-474 M M M 3 i0 i 0 i0 i0 M M IB i 0 -v d VDD M VSS ddin a series resistance Z V B IB M 4 -v 0 Nn - zer p3 s an desin Z Z Z s p Z z Z Jse Silva-Martinez-0 s VD z s s p p 3 Z M 3 (Generally hih frequency & can be inred) t iprve phase arin will push HP t a hiher frequency (initially) Z 3 3 pushes the HP zer t infinity pushes zer fr HP t FP M 3 M can cancel p -3-

24 Tw Stae Miller OT Nise eferred Nise Vltae PSD Input 3 - eferred Nise urrent PSD Output i kt G f i f v kt f i

25 Next Tie Opp Feedback & Stability n-mde Feedback Techniques 5