Convergence Aid Techniques for Compact Modelling with Verilog-A

Transcription

1 Cnvergence Aid Techniques fr Cmpact Mdelling with Verilg-A Slbdan Mijalkvić Silvac Eurpe, St Ives, Cambridge, UK MOS-AK 2010 Rme

2 Verilg-A Language Submdule Prt Nde Branch Mdule Nde Mdule Mdule Prt Mdule Standard language Independent language entity ( highjacked by Spice-like circuit simulatrs as device mdeling language). Supprts DC, AC, transient and nise analysis (and crrespnding initializatin steps) SPICE-like structural and hierarchical cncepts Use f generalized Kirchhff s KPL and KFL laws (cnverted t standard SPICE KVL and KCL laws) Enhanced fr cmpact mdeling (frm LRM 2.2) MOS-AK 2010 Rme

3 SmartSpice Verilg-A Cmpiler Integrated develpment and debugging envirnment accelerates cmpact mdel develpment Supprt fr (partially r fully) encrypting f the Verilg- A surce allws distributin f prprietary mdels withut disclsure. Prvides secure, transprtable methd fr analg IP distributin and evaluatin Cmpatible with all analg features f the Verilg-AMS 2.3 language specificatin SmartSpice Verilg-A executable mdels are currently within 2x runtime perfrmance f the crrespnding ptimized C-cmpiled mdels Cmpact Mdels (in Verilg-A surce, binary r encrypted frmats) are available at MOS-AK 2010 Rme

4 Cmpact Mdeling with Verilg-A Benefits Verilg-A prvides cncise and structured descriptin f a cmpact mdel interface and architecture. Highly simplified mdel implementatin (autmatic cde differentiatin and lad f branch matrix Jacbians). Instant implementatin f new cmpact mdels in circuit simulatrs. Risks The cmpact mdel implementatins are ften incmplete (e.g. utput variables, descriptins, units f parameters, parameter range, etc.) Easy t neglect numerical mdel requirements and implementatin f the cnvergence aid techniques. The prgramming practices and perfrmance f executable mdels varies with Verilg-A cmpilers. MOS-AK 2010 Rme

5 Numerical Mdel Requirements Asympttic crrectness. The mdel evaluatin cde shuld be defined (free frm flating pint exceptins) fr arbitrary bias and temperature cnditins and fr all allwed values f the mdel parameters Smth mdel behavir. The branch ndal vltages and branch currents shuld be a C cntinuus functin f input variables Existing and unique slutin f implicit mdel equatins (e.g thermal nde temperature). MOS-AK 2010 Rme

6 Eliminating Mdel Discntinuity Nested Transfrmatins (Silvac UOTFT Mdel) I G V ( V ) ds ch dse ds V ds dse( Vds) m 1/ m 1 I sat GchVds 1 V V ds G ch V sat I sat V sat I sat G QC C i ch V sat 2V t 2 1 drift diffusin MOS-AK 2010 Rme

7 Eliminating Mdel Discntinuity Limiting Functins xfr x1 f( x) 1fr x fsq ( x) x 1 ( x 1) 4 2 f( x ) f( x) f f f pw el sq ( x) ( x) ( x) (1 x)ln(2) fel ( x) x ln 1 exp ln(2) xfr x14 2 x 14 f pw( x) y fr 1-4 x< fr x 14 MOS-AK 2010 Rme

8 Existing and Unique Slutin Self-Heating Mdels T Rth ( I, V ) I Ta T d (, ) f V T d I T Critical fr SOI, TFT and any ther MOSFET mdel with self-heating Requires an apprpriate applicatin f the limiting functins r mdificatins in the mdel frmulatin t prevent nn-existing and clse multiple slutins. MOS-AK 2010 Rme

9 Nn-Cnvergence and Pssible Remedies Reasn fr Nn-Cnvergence Nn-existing slutin Initial slutin utside the cnvergence regin Slver Level Imprving circuit design tplgy, mdel/instance parameters and numerical range slver parameters Setting initial slutins at the netlist level Cnvergence Aids Mdel Level Clipping f the mdel parameters Limiting variatins f ndal vltages and branch currents. Setting mdel state initial slutins Multiple slutins Flating-pint exceptins Flating-pint precisin prblems (verflw, underflw, ill cnditining) Nn-cntinuus mdel evaluatin expressins Hmtpy Dumped iteratin steps (mdified Newtn methds) MOS-AK 2010 Rme Using slver hmtpy parameters Limiting internal mdel state iteratin steps Limiting the arguments f rt and ple functins Bunding branch cnductivity The methd f alternating bases Eliminate mdel discntinuity

10 Setting Initial Slutins Glbal initializatin electrical g = 1.0; Analysis dependent initializatin if (analysis( ic")) V(cap) <+ initial_value; else I(cap) <+ ddt(c*v(cap)); Analysis Argument DC Sweep d1 d2 dn First part f "static analysis TRAN p Tran AC p AC NOISE p AC "ndeset" Initial cnditin "ic" MOS-AK 2010 Rme

11 Bunding Branch Cnductivity Adding small series resistance t nnlinear branch Adding small cnductance in parallel with the nnlinear branch Linearized nnlinear branch abve a critical current threshld I I max gmin = $simparam( gmin, 1e-13); V String Unit Descriptin gmin 1/Ω Minimum cnductance placed in parallel with nnlinear branches. imax A Branch current threshld abve which the cnstitutive relatin f a nnlinear branch shuld be linearized. MOS-AK 2010 Rme

12 Hmtpy Methds h( x, ) f( x) (1 ) f ( x) 0 0 gdev = $simparam( gdev ); String Unit Descriptin gdev 1/Ω Additinal cnductance t be added t nnlinear branches fr cnductance hmtpy cnvergence algrithm. surcescalefactr Multiplicative factr fr independent surces fr surce stepping hmtpy cnvergence algrithm. MOS-AK 2010 Rme

13 Limiting Newtn Iteratin Steps analg begin vn = TYPE * VT0; vcrit = CONSTvt0 * ln( CONSTvt0 / ( CONSTrt2*1.0e-14)); vgs = TYPE * $limit (V(gate,surcep), fetlim, vn); vbs = TYPE * $limit (V(bulk,surcep), pnjlim, CONSTvt0, vcrit );... Functin name Arguments Meant fr limiting fetlim vth gate-t-surce vltage f field-effect transistrs pnjlim vte, vcrit vltage acrss dides and p-n junctins in ther devices vdslim (nne) drain-t-surce vltage f field-effect transistrs MOS-AK 2010 Rme

14 Limiting Newtn Iteratin Steps analg functin real DEVlimvds; input VdsNew, VdsOld; real VdsNew, VdsOld; if (VdsOld >= 3.5) begin if (VdsNew > VdsOld) begin limitedvalue = MIN(VdsNew,(3*VdsOld)+2);... if (limitedvalue!= VdsNew) $discntinuity(-1); DEVlimvds = limitedvalue; endfunctin analg begin vds = TYPE * $limit(v(d, s), DEVlimvds);... MOS-AK 2010 Rme

15 The Methd f Alternating Bases I k I branch (p,n) di if (V(di) < Vcrit? 1 : 0) I(di) <+ IS*(exp(V(p,n)/Vth)-1); else V(p,n) <+ Vth*ln(I(p,n)/IS+1); Iˆk Ik 1 Vk 1 V k Vˆk V MOS-AK 2010 Rme

16 Summary The best set f cnvergence aid techniques is the numerically crrect (asympttically crrect and C cntinuus) implementatin f the physics based cmpact mdels Even numerically crrect mdel implementatin culd require the setting f the initial slutins and bunding f the branch cnductivities t imprve the cnvergence prperties in particular circuit designs. The hmtpy methds f the slver shuld be emplyed als n the mdel side. Nn-cnvergence is ften caused by the incrrect circuit design as well as inapprpriate slver and mdel parameters (it is nt always a mdel fault) MOS-AK 2010 Rme