Current/voltage-mode third order quadrature oscillator employing two multiple outputs CCIIs and grounded capacitors
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1 Indian Jurnal f Pure & Applied Physics Vl. 49 July 20 pp Current/vltage-mde third rder quadrature scillatr emplying tw multiple utputs CCIIs and grunded capacitrs Jiun-Wei Hrng Department f Electrnic Engineering Chung Yuan Christian University Chung-Li Taiwan jwhrng@cycu.edu.tw Received 4 Nvember 200; revised 26 April 20; accepted 3 May 20 A new quadrature scillatr circuit using tw multiple utputs secnd-generatin current cnveyrs (CCIIs) three grunded capacitrs and three resistrs is presented. Tw high utput impedance current-mde signals and tw vltagemde signals each pair with 90 phase difference are available in the prpsed circuit. The scillatin cnditin and scillatin frequency are independently cntrllable thrugh grunded resistrs. The use f nly grunded capacitrs makes the prpsed circuit attractive fr integrated circuit implementatin. Keywrds: Quadrature scillatr Current cnveyrs Current-mde Vltage-mde Intrductin A quadrature scillatr is used because the circuit prvides tw sinusids with 90 phase difference as fr example in telecmmunicatins fr quadrature mixers and single-sideband generatrs r fr measurement purpses in vectr generatrs r selective vltmeters. Therefre quadrature scillatrs cnstitute an imprtant unit in many cmmunicatin and instrumentatin systems. The quadrature scillatrs -8 generate vltage-mde signals. Several current-mde sinusidal scillatrs were prpsed in the literature. Hwever the current-mde high utput impedance sinusidal scillatrs 9- d nt prvide anther high utput impedance quadrature current utput. Mrever the current-mde quadrature scillatrs 2-3 require additinal current fllwers fr sensing and taking ut the quadrature utputs therein and the use f these additinal current fllwers with the virtual grunded inputs may result in flating capacitrs realizatin fr what is riginally described as grunded capacitrs realizatin. Hrng 4 prpsed a current-mde high utput impedance quadrature scillatr using tw differential vltage current cnveyrs tw resistrs and tw capacitrs. Hwever the scillatin cnditin and scillatin frequency cannt be independently tuned. Because the high-rder netwrk has high accuracy and high quality factr it gives gd frequency respnse with lw distrtin 56. Maheshwari and Khan 6 prpsed a third rder quadrature scillatr that generates bth vltage-mde and current-mde quadrature signals in the same circuit cnfiguratin by using fur current cntrlled current cnveyrs and three capacitrs 6. In this paper a new third rder quadrature scillatr circuit using tw multiple utputs secndgeneratin current cnveyrs (CCIIs) three grunded capacitrs and three resistrs is presented. Tw high utput impedance sinusid current-mde signals and tw vltage-mde signals each pair with 90 phase difference are available in the prpsed circuit. The scillatin cnditin and scillatin frequency are independently cntrllable thrugh grunded resistrs. The use f nly grunded capacitrs makes the prpsed circuit attractive fr integrated circuit implementatin 7. The prpsed circuit emplys less active cmpnents with respect t the previus quadrature scillatr 6. 2 Circuit Descriptin The circuit symbl f the multiple utputs CCII is shwn in Fig. which shws tw types f utput terminals the psitive utputs represented by terminal z+ and the negative by terminal z-. The terminal characteristic f the multiple utputs CCII can be described by the fllwing matrix equatin: iy vy v x i x i v z + z =... i v zm+ zm+ i z vz i zn vzn ()
2 HORNG: CURRENT/VOLTAGE-MODE THIRD ORDER QUADRATURE OSCILLATOR 495 Fig. Multiple utputs CCII circuit symbl The prpsed quadrature scillatr is shwn in Fig. 2. The characteristic equatin f the circuit can be expressed as: s 3 C C 2 C 3 R R 2 R 3 + s 2 (C + C 2 )C 3 R R 3 + sc 3 R 3 + = 0 (2) The scillatin cnditin and scillatin frequency can be btained as: Fig. 2 Prpsed CCIIs based quadrature scillatr The phase difference φ between V 2 and V is: φ = 90 (6) ensuring the vltages V 2 and V t be in quadrature. Frm Fig. 2 the current transfer functin frm I 2 t I is: CC 2R2 R3 = ( C + C ) C 2 3 (3) I2 ( s) = (7) I ( s) sc R 3 3 ω = (4) C C R R 2 2 The scillatin frequency can be adjusted by the grunded resistr R. The scillatin cnditin can be independently adjusted by the grunded resistr R 3. Fig. 2 emplys nly grunded capacitrs. The use f grunded capacitrs is particularly attractive fr integrated circuit implementatin 7. The passive sensitivities f this sinusidal scillatr are all lw and btained as: S ω C C2 R2 R = 3 2 Frm Fig. 2 the vltage transfer functin frm V 2 t V is : V 2 ( s) = (5) V ( s) sc R 3 The phase difference φ between I 2 and I is: φ = 90 (8) ensuring the currents I 2 and I t be in quadrature. Thus the prpsed circuit cnfiguratin can prvide bth vltage-mde and current-mde quadrature signals simultaneusly. Because the utput impedances f the currents I r I 2 are very high the tw utput terminals I and I 2 can be directly cnnected t the next stage respectively. The resistrs R and R 3 are cnnected t the tw x terminals f the CCII() and CCII(2) respectively. This design ffers anther feature f a direct incrpratin f the parasitic resistance (R x ) as a part f the main resistance. Frm Eqs (5) and (7) the magnitudes f V 2 and V r I 2 and I need nt be the same. Fr the applicatins needing equal magnitude quadrature utputs ther amplifying circuits are needed.
3 496 INDIAN J PURE & APPL PHYS VOL 49 JULY 20 3 Effect f the CCII Parasitic Elements n the Prpsed Circuits A nn-ideal multiple utputs CCII mdel 89 is shwn in Fig. 3. It is shwn that the real multiple utputs CCII have parasitic resistrs and capacitrs frm the y and z terminals t the grund and als a series resistr at the input terminal x. The values f the parasitic impedances 9 are R x = 60Ω R y = 7 MΩ R z = R z2 = 3 MΩ C y = 8 pf C z = C z2 = 4 pf. The α k (s) (k = 2) and β(s) represent the frequency transfers f the internal current and vltage fllwers f the multiple utputs CCII respectively. They can be apprximated by first rder lw pass functins which can be cnsidered t have a near unity value fr frequencies much less than their crner frequencies 89. Taking int accunt the nn-ideal multiple utputs CCII mdel f Fig. 3 in Fig. 2 and assuming the circuit is wrking at frequencies much less than the crner frequencies f α k (s) and β(s) namely α k (s) = α k = ε k and ε k ( ε k <<) dentes the current tracking errr and β(s)=β= ε 2 and ε 2 ( ε 2 <<) dentes the vltage tracking errr f the multiple utputs CCII. The characteristic equatin f Fig. 2 becmes: s C ' C ' C ' R ' R R ' R R R + s R ' R '[ C ' C ' R R R y y + C ' C ' R R ( R + R ) + C ' C '( R + R ) R R ] y y + sr '[ C ' R ' R ( R + R ) + C ' R '( R + R ) R y y + C ' R ( R ' R + R ' R + R ' R + R R α β )] y 4 y + R '( R + R ) R ' + R ' R ' R + R ' R R α β y 3 4 y + R4R5 R y α2α2ββ 2 = 0 (9) where C ' = C + Cz + Cz2 C2 ' = C2 + Cy C3 ' = C3 + Cz2 + Cy2 R ' = R + Rx R3 ' = R3 + Rx2 R4 = Rz / / Rz 2 R = R / / R. 5 z2 y2 The mdified scillatin cnditin and scillatin frequency are: R '( R + R ) R ' + R ' R ' R + R ' R R α β y 3 4 y + R R R α α β β 4 5 y R ' R '[ C ' C ' R R R + C ' C ' R R ( R + R ) y y + C ' C '( R + R ) R R ] y C ' R ' R ( R + R ) + C ' R '( R + R ) R 4 2 y y + C3 ' R5 ( R ' R2 + R ' R4 + R ' Ry + R4Ryαβ ) = (0) C ' C ' C ' R ' R R R R ω = y C ' R ' R ( R + R ) + C ' R '( R + R ) R 4 2 y y + C ' R ( R ' R + R ' R + R ' R + R R α β ) y 4 y C ' C ' C ' R ' R R R R y () Eqs (0) and () are cupled due t the parasitic impedances especially because R 4 R 5 and R y are finite. This fact implies that the adjustment f the scillatin frequency affects the scillatin cnditin [R appears in bth Eqs (0) and ()]. Nevertheless the scillatin cnditin can be tuned by varying R 3 after adjusting the scillatin frequency by means f R. 4 Simulatin Results PSPICE simulatins were carried ut t demnstrate the feasibility f the prpsed circuit in Fig. 2 using 0.8 µm level 3 MOSFET frm TSMC. The multiple utputs CCII was realized by the CMOS implementatin 20 in Fig. 4. The aspect ratis f the MOS transistrs are shwn in Table. The multiple current utputs can be easily implemented by simply adding utput branches. Fig. 3 Nn-ideal multiple utputs CCII mdel Fig. 4 Implementatin f multiple utputs CCII
4 HORNG: CURRENT/VOLTAGE-MODE THIRD ORDER QUADRATURE OSCILLATOR 497 Table Aspect ratis f the MOS in Fig. 4. MOS transistr W/L MM2 36/0.9 M3 63/0.9 M4M5 54/0.9 M6 72/0.9 M7~M6 8/0.9 Table 2 Ttal harmnic distrtin analysis f V in Fig. 2 Harmnic number Frequency (Hz) Furier Nrmalized cmpnent cmpnent Nrmalized 2.0E E-0.000E E E E E-03.85E E E E E E E E E E E E E E E E E E E E E-03.57E E E E E E E E E E E E E E E E E+02 DC cmpnent: E-03 Ttal harmnic distrtin: E+00 PERCENT Table 3 Ttal harmnic distrtin analysis f I in Fig. 2 Harmnic number Frequency (Hz) Furier Nrmalized cmpnent cmpnent Nrmalized 2.0E E-0.000E+00.32E E E E E E E E E E E E E E E-03.40E E E E-03 8.E E E E E E E E E+06.45E E E E E+06.43E E E+0.046E E E E E+0.73E+03 DC cmpnent: E-03 Ttal harmnic distrtin: E+00 PERCENT Fig. 5 (a) Simulated utput wavefrms f vltage-mde signals in Fig. 2; (b) Simulated utput wavefrms f current-mde signals in Fig. 2. Fig. 6 Simulatin results f the scillatin frequency f Fig. 2 which is btained by varying the value f the resistr R Figure 5(a and b) shws the vltage-mde and current-mde quadrature sinusidal utput wavefrms f Fig. 2 respectively with C = C 2 = C 3 = 80 pf R = 6 kω R 2 = 5 kω R 3 = 6 kω and the pwer supply ±.25V V b = 0.65V. The results f the V and I ttal harmnic distrtin analysis are presented in Tables 2 and 3 respectively. Fig. 6 shws the simulatin results f the scillatin frequency f Fig. 2 by varying the value f the resistr R with C = C 2 = C 3 = 80 pf R 2 = 5 k Ω and R 3 =6 k Ω. 5 Cnclusins A new quadrature scillatr using tw multiple utputs CCIIs three resistrs and three grunded capacitrs is presented. This quadrature scillatr prvides the fllwing advantages: (i) tw vltagemde and tw current-mde sinusidal utput signals each pair with 90 phase difference are btained simultaneusly; (ii) the utput impedances f the current-mde signals are very high; (iii) the scillatin cnditin and scillatin frequency are independently cntrllable thrugh grunded resistrs; (iv) the use f nly grunded capacitrs; (v) a direct incrpratin f the parasitic resistances at the x terminals f the CCIIs (R x ) as a part f the main resistances. The prpsed circuit emplys less active cmpnents with respect t the previus quadrature scillatr 6. References Hlzel R IEEE Transactins n Instrumentatin and Measurement 42 (993) Ahmed M T Khan I A & Minhaj N Internatinal J Electrnics 83 (997) 20.
5 498 INDIAN J PURE & APPL PHYS VOL 49 JULY 20 3 Sliman A M J Franklin Institute 336 (999) Khan I A & Khwaja S Internatinal J Electrnics 87 (2000) Tangsrirat W Prasertsm D Piyatat T & Surakampntrn W Internatinal J Electrnics 95 (2008) 9. 6 Tangsrirat W Indian J Pure & Appl Phys 47 (2009) Hrng J W Cmputers and Electrical Engineering 3 (2005) 8. 8 Hrng J W Hu C L Chang C M Chung W Y Tang H W & Wen Y H Internatinal J Electrnics 92 (2005) 2. 9 Abuelma atti M T & Al-Zaher H A IEEE Transactins n Circuits and Systems-II: Analg and Digital Signal Prcessing 46 (999) Gupta S S & Senani R Electrnics Lett 36 (2000) 95. Cam U Tker A Cicekglu O & Kuntman H Analg Integrated Circuits and Signal Prcessing 24 (2000) Abuelma atti M T IEEE Transactins n Circuits and Systems-I: Fundamental Thery and Applicatins 39 (992) Abuelma atti M T & Al-Zaher H A Internatinal J Electrnics 85 (998) Hrng J W IEICE Transactins n Fundamentals f Electrnics Cmmunicatins and Cmputer Sciences E86- A (2003) Prmmee P & Dejhan K Internatinal J Electrnics 89 (2002) Maheshwari S & Khan I A IEE Prceedings Circuits Devices and Systems 52 (2005) Bhushan M & Newcmb R W Electrnic Lett 3 (967) Fabre A Saaid O & Barthelemy H Analg Integrated Circuits and Signal Prcessing 7 (995) 3. 9 Martinez P A Sabadell J Aldea C & Celma S IEEE Transactins n Circuits and Systems-I: Fundamental Thery and Applicatins 46 (999) Surakampntrn W Riewruja V Kumwachara K & Dejhan K IEEE Transactins n Instrument and Measur 40 (99) 699.
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