Theory of Tribotronics

Transcription

1 Theory of Tribotronics Ying iu, Simiao iu, and Zhong in Wang * As a potential next generation mechanical-to-electricity power generator, the triboelectric nanogenerator () has drawn considerable attention in recent years. Its mechanical-to-electrical signal control properties also gave rise to the original idea of tribotronics, which utilize triboelectric output to drive/control electronic devices. Using a as input for gate voltage for a field effect transistor, a tribotronic device has potential application in mainly two areas (i) mechanically controlled electronics and (ii) motion/ displacement sensing. An experimental study has already been recently reported and therefore a theoretical study is strongly desired as the theoretical basis and optimization strategy for designing such circuits. Here, both analytical calculations and numerical simulations are used to study the tribotronic device, both on the logic operation and on mechanical sensing. The static charge and inherent capacitance of are determined by the structure design of the and have strong coupling with the field effect transistor. Such coupling effect is taken into consideration, thus developing a methodology to effectively optimize the tribotronic device design according to such a coupling effect. 1. Introduction The triboelectric nanogenerator () has drawn considerable attention in recent years, for its low material and processing cost and high energy conversion efficiency, making it potentially the next generation mechanical-to-electricity power generator with high total energy conversion efficiency (up to 8%), light weight and weight density and diversity applications. [1 3 ] On the other hand, its mechanical-to-electrical signal control properties also gives rise to the original idea of tribotronics, which utilizes triboelectric output to control electronic devices, taking the role as a gate voltage as for conventional field effect transistor. As the first step, simple experimental demonstration has been reported recently, by using a contact mode attached-electrode as input for gate voltage for a silicon based field effect transistor. [4,5 ] Such a device has potential application in mainly two areas, (i) mechanically controlled electronics and (ii) motion/displacement sensing. [6 11 ] ompared with previously proposed piezotronics, [1 14 ] in which the traditional externally applied gate voltage is replaced by the piezoelectric polarization charge created inner crystal potential, the tribotronics has easier physics mechanism and is also easily Dr. Y. iu, S. iu, Prof. Z.. Wang School of Materials Science and Engineering Georgia Institute of Technology Atlanta, GA , USA zhong.wang@mse.gatech.edu DOI: 1.1/aelm.1514 integrated into currently available silicon based circuits. Also, the tribotronics utilizes the potential created by triboelectric charges on the surface as a gate voltage to control the transport behavior. While the piezotronics utilizes the inner crystal piezoelectric potential created by piezoelectric polarization charges at the interface to control the charge transportation within the transistor. For mechanically controlled logic or mechanical sensing purposes, tribotronics possesses advantages including lower cost, easier control, and quick integration. However, as the nature of s is related to static charges, and excessive static charges can lead to device breakdown in current semiconductor devices, the s used for tribotronics should be carefully designed. Also, the inherent capacitance of is usually small and comparable to the parasitic capacitance of metal-oxide-semiconductor field effect transistors (MOSFETs), so the coupling of s output into logic circuit is also strongly affected by the structure design of the. [15 ] Here we have used both analytical calculation and numerical simulation to study the tribotronic device, both on the logic operation and on mechanical sensing, providing the theoretical basis and optimization strategy for designing such kind of circuits.. ogic Operation Realized by.1. MOS Inverter Gated by.1.1. MOS Inverter Basics ogic operation is the first demonstration of the tribotronic devices. In such a device, the gate voltage of MOSFET is replaced by the output of. To study the logic operation of tribotronics, we should first look into the properties of MOSFET and how it couples with the properties of. In a conventional MOSFET, there are three electrodes for controlling its performance: the gate electrode G, source electrode S, and drain electrode D. The gate voltage controls the charge carrier channel between the source and drain electrodes. Depending on different applied drain voltage DS and gate voltage, for an ideal conventional long-channel MOSFET, there are three working regions, the off region, the linear region, and the saturation region. Depending on the applied gate electrode voltage and the drain electrode voltage, the current characteristic of the MOSFET varies. Adv. Electron. Mater. 15, WIEY-H erlag GmbH & o. KGaA, Weinheim wileyonlinelibrary.com (1 of 11) 1514

2 We first take the most commonly utilized n-channel MOSFET (n-type metal-oxide-semiconductor (MOS)) as an example. One of the most important parameters for a MOSFET is the threshold voltage T, which is intrinsically determined by the MOSFET itself: [1 ] T Q ϕms f OX 4sq Aψ B ψ B (1) OX where ϕ ms is the work function between the gate material and the semiconductor, Q f is the fixed oxide charges, OX is the capacitance of the oxide, A is the doping profile of the semiconductor, and ψ B is the surface potential. When the gate voltage < T, the conducting channel is closed, and the -MOSFET is working at the off mode, the current flowing through the drain electrode to source I D is zero. When > T, an inversion layer is formed, and current from drain electrode to source electrode I D begins to increase with increasing DS. When DS is small, the I D DS relationship is linear, and MOSFET is working in the linear mode 1 I μ W ( ) D n OX T DS DS To simplify the result, the ratio constant of the MOS is defined as K μ W/, thus Equation ( ) is rewritten as n ox I K [( ) ] (3) D T DS DS When DS continues to increase and reaches the saturation point Dsat T, then I D reaches a saturation value that is determined by, and MOSFET is working at the saturating mode I K ( ) (4) Dsat T For tribotronic devices, a is utilized to supply gate voltage. For the simplest case, we utilize a contact-mode attached-electrode. [19 ] We assume the is at steady state, and the inherent capacitance of the is much larger than the parasitic capacitance of MOSFETs so the inherent capacitance is ignored. Therefore, the gate voltage now applied is the open circuit voltage, as shown below. x O (5) where is the surface charge density of the polymer used in, x is the separation distance of the two surfaces in, and is the permittivity of vacuum space. With this small MOSFET parasitic capacitance assumption, by substitute Equation (5) into Equations (3) and (4), we can obtain that () Table 1. Parameters for s used in calculation. Mode Σ S d g A1(.1.1,..1) Attached-electrode 1 n m /A /A /A contact F1 (.1.) We have used the with parameters as A1 shown in Table 1 and n-type MOSFET (MOS) model described in Table. Using these parameters and Equations (5) (7), the I D curve of MOSFET under different output is shown in Figure S1b (Supporting Information). With the basic relationship between output and MOSFET response, motion-controlled logic operations can be realized. Inverter is the basic building block in digital electronics. One of the simplest forms of inverter is constructed using a single MOS/p-channel MOSFET (PMOS) transistor loaded with a resistor. The can act as the inverter input to realize a mechanical electronic interface. A -powered MOS inverter is shown in Figure 1 a. The is used as input for gate electrode, the source electrode of MOSFET was grounded, a resistor R D was connected in series with the MOS on the drain electrode on one side, and connected to a D voltage on the other side. The output voltage of the MOS inverter equals to DS of the MOS. Depending on the working status of the, the performance of this MOS inverter can vary. ow we analyze the output of the inverter. From Kirchhoff s aw, we have the relationship IDRD (7) Thus, as for the relationship between the displacement of the and of the inverter, there are also three regions. (1) When < T, MOS is working at the off region ( I D ), and the inverter is O, is logic 1. For x we have x < T/ (8) () When > T, > T, the load line of the resistor will first coincide with the MOS in its saturation region. < K R K x < T K R T Free-standing contact 1 n m 4 mm 5 µm µm F (..) 1 mm A(.1.3,..3) Attached-electrode 1 µ m 1 cm 5 µm /A contact D D I D T, x < x K [ T DS DS], x < < x Dsat K T, x > T Dsat (6) Table. Parameters for MOSFETS used in numerical calculation. T [] K /K P [Ω 1 ] MOS PMOS ( of 11) wileyonlinelibrary.com 15 WIEY-H erlag GmbH & o. KGaA, Weinheim Adv. Electron. Mater. 15, 1514

3 Figure 1. MOS inverter gated by fi xed capacitance. a) ircuit scheme of tribotronic device using as circuit input for a MOS inverter. b) alculated behavior of the MOS inverter (parameters from Table ) gated by (parameters A1 from Table 1 ) neglecting the parasitic capacitance of MOS. As the displacement of x goes up, the logic output of the inverter goes from 1 to. c) The value of,, and over 5 s for an MOS inverter gated by free-standing contact-mode. The MOS used in the simulation is 7 and is F1 from Table 1. d) The relationship between and x when stays 1 n m and changes. The red dashed line is x g µm. e) The relationship between x flip and S when, d, and g stay the same. The red dashed line is x g µm. f) The relationship between x flip and d g when and S stay the same. The red dashed line is x g and the shadowed area is where the inversion can be realized. x RDK T (9) (3) When exceeds the saturation point, the load line of the resistor will coincide with the MOS in its linear region, and inverter is off OFF, goes to logic x > 1 1 4K R K T K R D D 1 x T RK D 1 x 1 RD x T R D T R 4K K D (1) We take the typical value R D 1 Ω, 1, parameters for is the same as in Table 1 and parameters for MOS is shown in Table. By substituting these parameters into Equations (7) (1), the calculation result is shown in Figure 1 b, and we can see that the inversion is successfully realized, and as x increase from to about 1 mm, the output is logically expressed as 1 to. With this characteristic, this device can easily be integrated into more sophisticated circuit..1.. MOS Inverter Gated by with onstant apacitance The first-order equivalent circuit of a contains an A power source in series with a capacitor, as shown in Figure 1 a. And in real applications, the inherent capacitance is in the same order of magnitude compared with parasitic capacitance of MOSFET, leading to a large portion of voltage distributed on the inherent capacitance. Therefore, the coupled MOSFET gate voltage is much smaller than the open-circuit voltage. eakage current will be induced in the A mode through the capacitance and the current equation can be listed as R DG d( DS ) ID d( ) d (11) First, we consider a simplest case, in which the capacitance is a constant and independent of x. As an example, we consider a free standing contact-mode. In this, its open-circuit voltage and inherent capacitance can be given by [ 16 ] x (1) S d g (13) In the above equation, the effective dielectric thickness d is defined as the summation of all the thicknesses of the dielectric d i between the two metal electrodes divided by its relative effective permittivity ri, and g is the gap size between the electrodes. Adv. Electron. Mater. 15, WIEY-H erlag GmbH & o. KGaA, Weinheim wileyonlinelibrary.com (3 of 11) 1514

4 From Equation ( 13), we can see that the inherent capacitance is independent of x, and thus independent of. Therefore, the coupled gate voltage can be given by xs DG Q d g S DG d g D (14) to Equation ( 11), I D is the largest in the saturation region, and voltage drop is the largest. For a better understanding, for a MOSFET inverter, if its threshold gate voltage for inversion is a fixed value M, from Equation (15) we have x flip ( S ( )( d g)) Q S M DG Doff (16) where Q D is the integral of I D over time, which equals to the accumulative amount of charge going through the drain electrode. onsidering the MOSFET work region, Equation ( 14) can be solved analytically by substituting the value of from Equations (8) (1). xs DG d g,invertero S DG d g xs var( x) DG QDsat( x) d g, inverter saturation S DG d g (15) xs Q Doff d g,inverteroff S DG d g where var (x ) is a simplified term varying with x. Thus, from Equation (15), and x will have a linear relationship in the off region and on region, and a nonlinear relationship in the saturation region. From the analytical equations, we can also see that the design parameters of including, S, d, and g have influence on the logical operation of the tribotronics device. For optimized performance of the tribotronics device, these design parameters of should match with the MOSFET used. To get an intuitive sense, a simulation methodology has been designed and numerical simulation has been done. [,3 ] We first calculate a freestanding F1 shown in Table 1. For this device, is close to 15 pf. In the simulated circuit, a commercially available MOS model 7 is chosen, as it has relatively low DG and, and relationships among,, and DS are studied carefully. First, the is set as a harmonic A output with frequency of 1 Hz and amplitude of 1, as we assume that x of also follows harmonic vibration; is set as 15 pf in this simulation. Figure 1 c shows the response of,, and in a time span of 5 s and the inversion is successfully realized in each cycle of 1 s. When the inverter output is logic 1, the value of is close to the value of ; and when the inverter output is logic, becomes substantially lower than. The reason for this observation is that when the MOS is working in the saturation region, the voltage drop on drop is larger than drop when MOS is working in off region or linear region, referring How changes with x under different values of is plotted in Figure 1 d. Here we can see there are three regions in the x relationship referring to the three regions predicted in Equation (15): as x starts from, there is first a linear region where the inverter is on, and the slope of this region is S/ ( DG )( d g) S, and the intersect of this region [ ] ( )/[( )( ) ] isdg d g DG d g S ; followed by a flat plateau in Figure 1 d where stays at the same value when x increases, where the MOS is in the saturation region and the inverter is in the transition region from on to off ; and finally another linear region, where the inverter is off, and the [ ] slope of this region is still S/ ( DG )( d g) S, and the intersect of this region is. We notice that the values of in the plateau area are the same for different values, and smaller will result in a longer plateau and thus larger voltage drop in the saturation region. When the plateau is passed in the x relationship, the output of the inverter will be flipped from 1 to and inversion is completed, and the corresponding is denoted as flip. Only when goes above flip can the logic operation be realized. Thus, the value of x corresponding to flip, xflip flip / plays an important role in the device design. For a free-standing contactmode, the maximized moving distance x can only reach g, so only when x flip is under the limit can the tribotronic device can perform the logic operation. From Equation ( 1), the value of does not influence the value of, so the relationship between x flip and 1/ is strictly proportional. The relationship between x flip and S, d, and g is more complicated, and thus, we can use our simulation methodology to study the influence of S, d, and g on the influence of x flip in the same MOS circuit. For the device operation, the matching of area size S and x flip is important, avoiding the case of either a small device requiring a large displacement to realize the inversion or a large device requiring a tiny displacement. The relationship between x flip and S extracted from the simulated result is shown in Figure 1 e. Under a sigma value of 1 n m and value of d g of 5 μm, the value of x flip descends when the value of S ascends. This trend is also in agreement with the analytical analysis shown in Equation ( 1), as S is directly proportional to, and larger will result in smaller voltage drop on itself, so the coupling of into the logic circuit will be more efficient. The value of d and g is mainly involved in the fabrication of. Small value of d and g will potentially require more complicated processing and thus higher cost, and will also shorten the mechanical stability and durability of the device. The relationship between x flip and d g is plotted in Figure 1 f, and interestingly, the result is almost linear, consistent with the analytical equation shown above. The operation limit x g is plotted in Figure 1 d f as red dashed lines, showing that there 1514 (4 of 11) wileyonlinelibrary.com 15 WIEY-H erlag GmbH & o. KGaA, Weinheim Adv. Electron. Mater. 15, 1514

5 Table 3. MOSFET model used in simulation. Model no. Type DG [F] is a minimum value for both S and d g for fabrication. However, as x value under certain is proportional to 1/, so the limits for S and d g are extended when value increases. Thus, for free-standing contact-mode, whether high value of or low value of is desired depends on the designed geometric value of S and d g. We can also study how to choose the right MOS device for a designed. We have studied three different MOS, 7, 6659, and 676 and their parameters are shown in Table 3. Figure Sa (Supporting Information) plots the value of x flip corresponding to different values for these three MOS s. From Figure Sa (Supporting Information), we can clearly see that the x flip for all three MOS s show clear reciprocal relationships, which means x flip is proportional to 1/, and value of x flip under the same increases when the parasitic capacitance of MOS increases. With the plotted Figure for x flip for different MOS s, the match for device design can be easily realized using our simulation methodology MOS Gated by with ariable apacitance Most of the designs have inherent capacitance that is variable with x, which means that depends on x, and the tribotronic device using such a will have different criteria in design. One simple example is an attached electrode contact mode, the capacitance changes with the displacement x. The relationship between x and is S S d x d (17) From Equation ( 19), we can clearly see that for this device, decreases with x and thus decreases with. For the logic inversion from 1 to, the corresponding flip and x flip will have a relationship x flip S d (18) flip One easy way to obtain the x flip value for such a device is by solving Equation ( 18) in series with the x flip relationship extracted in Figure Sa (Supporting Information), the coinciding point will show the flip and x flip values for the device in certain MOS inverter logic circuit. While for free standing mode, the inversion is limited by the fact that x cannot exceed g, for attached electrode the inversion [F] K /K P [Ω 1 ] 6659 MOS MOS MOS BST11 PMOS PMOS T [] may also not happen if S or is too small or d is too large, as will always decrease when x increases, and there may be no coinciding point for Equation ( 18) and the x flip equation. Thus, the design is more restricted than in the freestanding contact mode. For a more thorough study, we substitute Equation ( 19) into Equation (11) xs DSDG d x Q S DG d x D (19) From Equation (19), the relationship between and x will be much more complicated than linear. As decreases when x increases, to ensure the logic inversion can be realized, should be efficiently coupled into the logic circuit, so should be kept at a higher value so flip can be reached, and both high values of S and are required for such device. As d determines the maximum value of and the value of when x is small, and smaller d will effectively lower the value of flip. We have used simulation method to study the influence of S,, and d on the logic operation and to prove our analytical analysis. Figure a shows the response of,, and in a time span of 5 s, for an attached electrode contact mode device A with size of 1 cm 1 cm, of 1 μ m, and d of 5 μm. We can see that the inversion from 1 to is successfully realized in each cycle. However, when < x < x flip, the MOS is always in the saturation region and is always in the plateau value. Using our simulation method, we have plotted in Figure b d the x relationship under different S,, and d values that can be realized in existing designs. From these results, it is shown that larger S and larger will effectively reduce the x flip required for logic inversion, and low values of S and will result in the failure of inversion even when x goes to an extremely high value. MOS is still operating in the saturation region when x. When d goes down, the required logic inversion is also reduced. When d goes below 1 μm, then MOS is in the on region when x. Depending on the application of such a tribotronics device, the design can be carried out according to our simulation result... MOS Gated by..1. MOS ircuit Basics ompared with inverters composed of a single MOS or PMOS, MOS inverter is most commonly used in industry. In a MOS inverter, the series resistance is replaced by a PMOS, so that there is no static current other than system leakage under either on or off condition. Besides, the "off" state voltage can effectively reduce to. A MOS inverter gated by the is shown in Figure S1c (Supporting Information), output is connected to the gates of both the PMOS and the MOS, drain electrode of MOS Adv. Electron. Mater. 15, WIEY-H erlag GmbH & o. KGaA, Weinheim wileyonlinelibrary.com (5 of 11) 1514

6 Figure. MOS inverter gated by variable capacitance. a) The value of,, and over 5 s for an MOS inverter gated by attached electrode contact-mode. The MOS used in the simulation is 7 and is A1 from Table 1. b) The relationship between x flip and S when and d stay the same. Inset is the relationship between and x under different S values. c) The relationship between x flip and when S and d remain the same. Inset is the relationship between flip and when S and d remain the same. d) The relationship between x flip and d when S and remain the same. Inset is the relationship between and x under different d values. and PMOS are connected together, source electrode of PMOS is connected with a D power source, and source electrode of MOS is grounded. From Kirchhoff s law, we have the relationships I I D DP DS SDP DS SGP () Similar to MOS, for a PMOS, there are also three working modes, off mode, linear mode, and saturation mode, and the current equations for these three modes are I DP ; SG < TP KP[( SG TP) SD SD]; <, < K ( ) ; <, > P SG TP SG TP SD SG TP SG TP SD SG TP (1) A more intuitive graph is shown in Figure S1d (Supporting Information). In this Figure, a MOS model 6659 and a PMOS model 684 is chosen, is set as 1, thus I D DS and I DP ( SDP ) curves are plotted on the same x and y axis. For a specific value, I D and I DP will coincide a specific value of DS, and by plotting each value with the corresponding coincided DS value, we have retrieved the relationship between I ( ) and ( DS ) of the MOS inverter. When is working at quasi-steady state, as the output increases from to above Gmax, the output of MOS inverter changes gradually. By analytically solving Equation ( ), we find that depending on the working mode of MOS and PMOS, there are five working regions for the MOS inverter. (1) MOS is working at off mode, and PMOS is working at T linear mode. x < () () MOS in saturated mode, PMOS in linear mode, KP ( TP) T T K < x < KP 1 K x TP x TP K K x T (3) P (3) MOS and PMOS are both in saturated mode, KP ( K TP) T x KP 1 K 1514 (6 of 11) wileyonlinelibrary.com 15 WIEY-H erlag GmbH & o. KGaA, Weinheim Adv. Electron. Mater. 15, 1514

7 x x K P < K x T T TP x < x K x (4) TP TP T K P which means that when x passes this point, a steep decrease in will occur, so inversion with the MOS inverter is more effective than the MOS inverter. (4) MOS in linear mode, and PMOS in saturated mode, KP ( K ) KP 1 K TP T ( TP) < x < can be easily realized without complicated modification for the devices.... MOS Gated by with onstant apacitance When is working at A mode, similar to MOS inverter, we have R DGP d( DS ) ID d( ) d (7) The solution of Equation (7) with a free standing contact mode gives x x K P K x T T TP (5) (5) MOS is working at off mode, and PMOS is working at linear mode, x > ( TP ) (6) Figure 3 b shows the inversion performance of an inverter using Equations () (6). The parameters for is A1 in Table 1, MOS and PMOS parameters are the same as in Table. The range of x for MOS inversion is similar to the range of x in MOS inversion in Figure 1 d. The steep inversion at the point when MOS and PMOS are both at the saturation region is observed when x 31 μm. The calculation shows that can power MOS inverter as good as MOS, and on the basis of current experimental results, MOS inversion G P xs Q D d g S d g (8) P By substituting Equations () (6) into Equation (8), we can see there are five phases in the relationship. Before the inversion from logic output of 1 to is completed, there will be three transition phases where either or both MOS and PMOS are in saturation region. Again, we use simulation method to study such a tribotronic device. Figure 3 c shows the calculation result of how can drive the MOS inverter and realize the inversion of signals. In this simulation, the is working at frequency of 1 Hz amplitude of, and is set as 15 pf. MOS is chosen as 7 and PMOS is chosen as BST11 as these two MOSFETs have low parasitic capacitance, as shown in Table. The inversion from 1 to is successfully realized when operates and Figure 3. MOS inverter gated by fi xed capacitance. a) ircuit scheme of tribotronic device using as circuit input for a MOS inverter. b) alculated behavior of the MOS inverter (parameters from Table ) gated by (parameters A1 from Table 1 ) neglecting the parasitic capacitance of MOS. As the displacement of x goes up, the logic output of the inverter goes from 1 to. c) The value of,, and over 5 s for a MOS inverter gated by free-standing contact-mode. The MOS used in the simulation is 7, PMOS is BST11, and is F from Table 1. d) The relationship between and x when stays 1 n m and changes. e) The relationship between x flip and S when, d, and g stay the same. f) The relationship between x flip and d g when and S stay the same. Adv. Electron. Mater. 15, WIEY-H erlag GmbH & o. KGaA, Weinheim wileyonlinelibrary.com (7 of 11) 1514

8 x changes from to 883 μm. However, the transition from 1 to is slower than in the MOS inverter, which comes from the transition phases mentioned in the analytical part. By plotting the x relationship under different, the five phases according to our analytical result shows clearly: as x starts from, there is first a linear x relationship referring to the on mode for the MOS output; a nonlinear region follows referring to the saturation mode of MOS and linear mode of PMOS; a flat plateau similar to the plateau in MOS referring to the saturation mode of both MOS and PMOS; another nonlinear region referring to the linear mode of MOS and saturation mode of PMOS; and following is a linear region referring to the off mode of MOS output where the inversion is completed. Thus, the completion of the inversion is characterized by the value of x when x relationship enters the last region, and we call this value x inv. In Figure 3 e,f, we have accordingly plotted the relationship of x inv S, and x inv d g. The result shows again that x inv is proportional to 1/ S, and a linear relationship between x inv and d g, meaning that the value of required to realize the inversion is independent of the inherent capacitance of the...3. MOS Gated by with apacitance hanging by Output The solution of Equation ( 9) with an attached-electrode contact mode gives G xs d x Q DS P D S P d x (9) Using the same simulation method as in Section.1. and the same device setup as in Section..1, the simulation on tribotronics device based on attached electrode contact mode is shown in Figure S3 (Supporting Information). Figure S3a (Supporting Information) shows the inversion behavior of such a in 5 s and Figure S3b d (Supporting Information) shows the relationship between x inv and the design parameters of, S, sigma, and d. The result not only gives instruction for design of but also confirms that the logic operation of the inverter only depends on the applied onto the gate electrode, and thus the inherent capacitance of the only influences the coupling efficiency from output of into the input of the logic device..3. Examples of ogic Operations With our methodology, we can test the realization of more complicated logic operation using tribotronic device. As a simple demonstration of logic operation, negative-ad (AD) gate and negative-or (OR) gate using two s are simulated. As shown in Figure 4 a, the AD circuit is composed of two PMOS connected parallel (1 and ) in series with two MOS connected in series (3 and 4). Two s (A and B) are used to control the gate voltage of one PMOS and one MOS each. The logic operation through this circuit is A B. The circuit is simulated using previous method, MOS is chosen as 7 and PMOS is chosen as BST11. For both s, the output of the is set as pulse output to demonstrate the logic operation, the parameters for design is F1 in Figure 4. Demonstration of logic operation realized by tribotronics device. a) ircuit scheme of AD logic gated by s. b) Simulation result of the AD logic output when input of the s has different values. c) ircuit scheme of OR logic gated by s. d) Simulation result of the OR logic output when input of the s has different values (8 of 11) wileyonlinelibrary.com 15 WIEY-H erlag GmbH & o. KGaA, Weinheim Adv. Electron. Mater. 15, 1514

9 Table 1, size of is mm mm so 15 pf, is set as 1 n m and x is set as 883 mm so. From the simulation result shown in Figure 4 b, the logic operation works well: When the A B 1, ; otherwise, 1. As shown in Figure 4 c, the OR circuit is composed of two PMOS connected series (5 and 6) in series with two MOS connected in parallel (7 and 8). Two s ( and D) are used to control the gate voltage of one PMOS and one MOS each. The MOSFETs and are set the same as in the AD circuit. The logic operation through this circuit is D. From the simulation result shown in Figure 4 d, the logic operation works well: when D, 1; otherwise, MOS Small Signal Analysis with From the equivalent circuit illustration of an MOS amplifier in Figure 5 a, using Kirchhoff s law, we have the current equations for each node jω jω jω 1 jω 1 gm 1 R 1 (3) (31) 3. Mechanical Sensing of by MOSFET ircuit Resistor loaded MOSFET transistor is also commonly used as small signal amplifier. [4 7 ] Under D bias in I of MOS transistor, a small A signal can be coupled into the input, and as changes, will change accordingly, so the A signal will be amplified. Such amplification can be utilized in tribotronic device as an effective mechanical sensor. The circuit for small signal sensing is schemed in Figure 5 a. In such a circuit, R1 and R are utilized to provide a D bias to the MOSFET. To analyze the gain of such a circuit, the small signal equivalent circuit is shown in Figure 5 b. We have carried out analytical analysis for the frequency response when is added in the circuit, and developed the method to optimize the gain using simulation method. where g m is the intrinsic transconductance of the MOSFET gm IDS/, which is an important figure of merit showing how the drain current respond to change of gate voltage. By solving Equations (3) and (31), we have 1 gmr 1 jω R 1 (3) ( jωr gmr ) ( jωr 1) ( jωr 1) ( gmr 1) A (33) The current can be expressed as Figure 5. Small signal analysis of tribotronic device. a) ircuit scheme of small signal model of tribotronic device. b) Equivalent circuit of the small signal model shown in Figure 5 a. c) hange of small signal gain over frequency range. d) hange of phase over frequency range. e) Relationship between gain and. f) Relationship between gain and R. Adv. Electron. Mater. 15, WIEY-H erlag GmbH & o. KGaA, Weinheim wileyonlinelibrary.com (9 of 11) 1514

10 i g g g m 1 m gmr 1 jω R 1 And the effective transconductance counting is mt I DS g m gmr 1 jω R 1 (34) (35) 3.. Simulation Results First, we have verified the analytical result with circuit simulation for the circuit shown in Figure 5 a. [3 ] The numerical value of parameters in Figure 5 a is set as 1, R 1 4 GΩ, and R 1 GΩ, so the D bias on gate voltage is 8, R 4 kω, MOS is 6659, and is set as F in Table 1, so 5 pf. By substituting Equation ( 1) into Equation (41), The amplification gain A A m (4) A x A ( ( ωgdr ) ( gmr) ) ( ( g R 1)) ( ) ( ω R ) m (36) When frequency is low, the maximum voltage gain for the amplifier A max gmr ( g R 1) m (37) When transconductance is large enough, A max decomposes to A max (38) Since the small signal application usually works in the saturation mode for the D bias, the transconductance is defined as g k W I k K W ( ) m D G T (39) Thus, larger will enhance the value of gm. As larger x leads to larger and, it is desired to have a larger output from the. However, larger also leads to larger Dsat. Thus, it also should be taken into account. In design and fabrication of tribotronics devices, the Dsat should be taken into account, generally, MOSFETs with higher breakdown voltage and lower Dsat under certain is desired for small signal tribotronic device. 1 At band wih, A Amax, so band wih frequency g m f (4) Thus, the bandwih is hardly affected by the nature of. onsidering the sensitivity of the small signal magnification, the mechanical sensitivity A m can be defined as A m A (41) Depending on the mode of the, A m can be calculated from A according to the x relationship of the. Since the small signal analysis only involves mechanical perturbation around the D point, can be considered as a fixed value no matter what type of is used here, so the analysis also applies to attached-electrode contact mode as well as other s. As shown in Figure 5 c, the small signal response A m at lower frequency is around dbm 1, and decreases when frequency goes above 1 5 Hz, together with a phase change as shown in Figure 5 d. As shown in Equation ( 38), there is a linear relationship between maximum A m and. In Figure 5 e, we have plotted the simulated relationship between and the maximum A m when changes from 5 pf to 3 nf. When is small, the linear relationship from the analytical results stands; yet when increases to above 3 nf, the maximum A m tends to saturate. From Equation ( 37), the maximum A m should increase when R increases and saturates when g m R >> 1. We have also calculated the relationship between R and A m when other parameters stay the same, and the result is shown in Figure 5 f. When R < 4.5 kω, the analytical result also stands, yet when R > 4.5 kω, A m begins to decrease. Such a mismatch from the analytical prediction comes from the fact that D working point has floated from saturation region to linear region when R changes and A m will decrease dramatically. For our simulated circuit, the small signal response is optimized when R is around 4.5 kω and when reaches 5 nf. The relationship between A m and parameters for the can be easily derived from the relationship in Figure 5 e using the relationship between and these parameters. 4. onclusions In summary, we have carried out the first theoretical analysis of tribotronic devices. For the mechanical controlled logic, we have studied the commonly used MOS inverter and MOS inverter gated by and discussed the influence of mode and design parameters on the logic operation. Through our analysis, the structural parameters control inherent capacitance and influence the coupling efficiency of the output into the logic circuit gate voltage input. Depending on the geometric requirements in the tribotronic device design, our result can be utilized as instruction for choosing the right and logic device. For mechanical signal sensing, we have studied the small signal amplification of the MOSFET circuit gated with. It is discovered that larger capacitance and 1514 (1 of 11) wileyonlinelibrary.com 15 WIEY-H erlag GmbH & o. KGaA, Weinheim Adv. Electron. Mater. 15, 1514

11 higher surface charge density will lead to higher gain in the same small signal circuit, yet depending on difficulty of fabrication and geometry match of devices, our methodology can be utilized to optimize the device design. Supporting Information Supporting Information is available from the Wiley Online ibrary or from the author. Acknowledgements Y.. and S.. contributed equally to this work. Research was supported by U.S. Department of Energy, Offi ce of Basic Energy Sciences (Award DE-FG-7ER46394). Received: April 13, 15 Revised: May 31, 15 Published online: [1] F. R. Fan, Z. Q. Tian, Z.. Wang, ano Energy 1, 1, 38. [] X. S. Zhang, M. D. Han, R. X. Wang, B. Meng, F. Y. Zhu, X. M. Sun, W. Hu, W. Wang, Z. H. i, H. X. Zhang, ano Energy 14, 4, 13. [3] S. Kim, M. K. Gupta, K. Y. ee, A. Sohn, T. Y. Kim, K. S. Shin, D. Kim, S. K. Kim, K. H. ee, H. J. Shin, D. W. Kim, S. W. Kim, Adv. Mater. 14, 6, [4]. Zhang, W. Tang,. M. Zhang,. B. Han, Z.. Wang, AS ano 14, 8, 87. [5]. Zhang,. M. Zhang, W. Tang,. B. Han, Z.. Wang, Adv. Mater. 15, DOI: 1.1/adma [6] M. emkin, B. E. Boser, IEEE J Solid-State ircuits 1999, 34, 456. [7]. F. hang, J. J. hen, Mechatronics 9, 19, 76. [8] B. rone, A. Dodabalapur, Y. Y. in, R. W. Filas, Z. Bao, A. aduca, R. Sarpeshkar, H. E. Katz, W. i, ature, 43, 51. [9] J. H. Ahn, H. S. Kim, K. J. ee, S. Jeon, S. J. Kang, Y. G. Sun, R. G. uzzo, J. A. Rogers, Science 6, 314, [1] T. Someya, T. Sekitani, S. Iba, Y. Kato, H. Kawaguchi, T. Sakurai, Proc. atl. Acad. Sci. USA 4, 11, [11] T. Someya, Y. Kato, T. Sekitani, S. Iba, Y. oguchi, Y. Murase, H. Kawaguchi, T. Sakurai, Proc. atl. Acad. Sci. USA 5, 1, 131. [1] Z.. Wang, Adv. Mater. 1, 4, 463. [13] W. Z. Wu, Y. G. Wei, Z.. Wang, Adv. Mater. 1,, [14] S. M. iu, Y. F. Hu, X.. Wen, Y. S. Zhou, F. Zhang,. in, S. H. Wang, Z.. Wang, Adv. Mater. 13, 5, 371. [15] S. M. iu, Z.. Wang, ano Energy 15, 14, 161. [16] S. M. iu, Y. iu, X. hen, S. Wang, Y. S. Zhou,. in, Y. Xie, Z.. Wang, ano Energy 15, 1, 76. [17] S. M. iu, Y. iu, S. H. Wang,. in, Y. S. Zhou, Y. F. Hu, Z.. Wang, Adv. Mater. 13, 5, [18] S. M. iu, Y. iu, S. H. Wang,. in, Y. S. Zhou, Y. F. Hu, Z.. Wang, Adv. Funct. Mater. 14, 4, 333. [19] S. M. iu, S. H. Wang,. in, Y. iu, Y. S. Zhou, Y. F. Hu, Z.. Wang, Energy Environ. Sci. 13, 6, [] S. M. iu, S. H. Wang, Y. iu, Y. S. Zhou,. in, Y. F. Hu, K.. Pradel, Z.. Wang, Energy Environ. Sci. 14, 7, 339. [1] S. M. Sze, Physics of Semiconductor Devices, Wiley, ew York []. Galup-Montoro, M. r.. Schneider, MOSFET Modeling for ircuit Analysis and Design, World Scientifi c, Hackensack, J 7. [3] S. M. iu, Y. S. Zhou, S. H. Wang, Y. iu,. in, Y. Bando, Z.. Wang, ano Energy 14, 8, 15. [4] D. ange,. Hagleitner,. Herzog, O. Brand, H. Baltes, Sens. Actuators A 3, 13, 15. [5] R. G. Beck, M. A. Eriksson, R. M. Westervelt, K. D. Maranowski, A.. Gossard, Semicond. Sci. Technol. 1998, 13, A83. [6] P. S. Waggoner, H. G. raighead, ab hip 7, 7, 138. [7] D. A. Bell, Electronic Devices ircuits, D. A. Bell, Sarnia, O Adv. Electron. Mater. 15, WIEY-H erlag GmbH & o. KGaA, Weinheim wileyonlinelibrary.com (11 of 11) 1514