MC14051B, MC14052B, MC14053B. Analog Multiplexers/Demultiplexers

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1 M405, M405, M4053 nalog Multiplexers/Demultiplexers The M405, M405, and M4053 analog multiplexers are digitallycontrolled analog switches. The M405 effectively implements an SP8T solid state switch, the M405 a DP4T, and the M4053 a Triple SPDT. ll three devices feature low ON impedance and very low OFF leakage current. ontrol of analog signals up to the complete supply voltage range can be achieved. Features Triple Diode Protection on ontrol Inputs Switch Function is reak efore Make Supply Voltage Range = 3.0 Vdc to 8 Vdc nalog Voltage Range ( ) = 3.0 to 8 V Note: must be V SS Linearized Trafer haracteristics Lownoise nv/ ycle, f.0 khz Typical PinforPin Replacement for D405, D405, and D4053 For 4PDT Switch, See M455 For Lower R ON, Use the H405, H405, or H4053 HighSpeed MOS Devices PbFree Packages are vailable* MXIMUM RTINGS (Voltages Referenced to V SS ) Symbol Parameter Value Unit D Supply Voltage Range (Referenced to, V SS ) 0.5 to +8.0 V V in, V out I in Input or Output Voltage Range (D or Traient) (Referenced to V SS for ontrol Inputs and for Switch I/O) Input urrent (D or Traient) per ontrol Pin 0.5 to V +0 m I SW Switch Through urrent ± 5 m P D Power Dissipation per Package (Note ) 500 mw T mbient Temperature Range 55 to +5 T stg Storage Temperature Range 65 to +50 T L Lead Temperature (8Second Soldering) 60 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditio is not implied. Extended exposure to stresses above the Recommended Operating onditio may affect device reliability.. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/ From 65 To 5 This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be cotrained to the range V SS (V in or V out ). Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS, or ). Unused outputs must be left open. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PDIP6 P SUFFIX SE 648 SOI6 D SUFFIX SE 75 TSSOP6 DT SUFFIX SE 948F SOEIJ6 F SUFFIX SE 966 MRKING DIGRMS M405xP WLYYWWG ORDERING INFORMTION See detailed ordering and shipping information in the package dimeio section on page 9 of this data sheet xG WLYWW 4 05x LYW M405x LYWG x =,, or 3 = ssembly Location WL, L = Wafer Lot Y = Year WW, W = Work Week G or = PbFree Package (Note: Microdot may be in either location) Semiconductor omponents Industries, LL, 006 December, 006 Rev. 0 Publication Order Number: M405/D

2 M405, M405, M4053 M405 8hannel nalog Multiplexer/Demultiplexer M405 Dual 4hannel nalog Multiplexer/Demultiplexer M4053 Triple hannel nalog Multiplexer/Demultiplexer ONTROLS SWITHES IN/OUT INHIIT X0 X X X X3 X4 X5 X6 X7 3 OMMON OUT/IN ONTROLS SWITHES IN/OUT INHIIT X0 X X X3 Y0 Y Y Y3 X Y 3 3 OMMONS OUT/IN ONTROLS SWITHES IN/OUT INHIIT X0 X Y0 Y Z0 Z X Y Z OMMONS OUT/IN = PIN 6 V SS = PIN 8 = PIN 7 = PIN 6 V SS = PIN 8 = PIN 7 = PIN 6 V SS = PIN 8 = PIN 7 Note: ontrol Inputs referenced to V SS, nalog Inputs and Outputs reference to. must be V SS. X4 X6 X X7 X5 INH V SS PIN SSIGNMENT M405 M405 M X Y0 Y 6 5 X Y Y X Y 3 4 X Z X0 Y3 4 3 X Z X3 Y 5 X0 Z0 5 6 INH 6 X3 INH V SS 8 9 V SS 8 9 Y X X X0

3 M405, M405, M4053 ELETRIL HRTERISTIS haracteristic Symbol Î 55 Î 5 5 V DD Test onditio Min Max Min Typ Max Min Max Unit (Note ) Î SUPPLY REQUIREMENTS (Voltages Referenced to ) Power Supply Voltage Range V DD 3.0 V SS V Î Quiescent urrent Per I DD 5.0 ontrol Inputs: Package 0 V in = V SS or, Switch I/O: V Î EE V I/O , and V switch Î 500 mv (Note 3) Total Supply urrent I D(V) 5.0 T = 5 only (The (0.07 /khz) f + I (Dynamic Plus 0 channel component, DD Quiescent, Per Package 5 (V in V out )/R on, is Typical (0.0 /khz) f + I DD (0.36 /khz) f + I Î not included.) DD ONTROL INPUTS INHIIT,,, (Voltages Referenced to V SS ) LowLevel Input Voltage V IL 5.0 R on = per spec, V 0 I 5 off = per spec HighLevel Input Voltage IHÎ Î V 5.0 R on = per spec, 0 I off = per spec V Î Input Leakage urrent Iin 5 V in = 0 or ± 0. ± ± 0..0 Î Input apacitance in pf SWITHES IN/OUT ND OMMONS OUT/IN X, Y, Z (Voltages Referenced to ) Î Recommended V I/O PeaktoPeak Voltage hannel On or Off V PP Î Into or Out of the Switch Recommended Static or Î V switch Dynamic Voltage cross the Switch (Note 3) hannel On mv Î Î (Figure 5) Output Offset Voltage V OO V in = 0 V, No Load 0 V ON Resistance R Î on 5.0 V 0 switch 500 mv (Note 3) V in = V IL or V IH (ontrol), and V in = to (Switch) ON Resistance etween R ny Two hannels in the on Same Package Offhannel Leakage I off 5 V in = V IL or V IH ± 00 ± 0.05 ± 00 ± 000 n urrent (Figure 0) (ontrol) hannel to Î hannel or ny One Î hannel apacitance, Switch I/O I/O Inhibit = 0 pf apacitance, ommon O/I O/I Inhibit = pf (M405) 60 Î (M405) 3 Î (M4053) 7 apacitance, Feedthrough I/O Pi Not djacent 0.5 pf (hannel Off) Pi djacent Data labeled Typ is not to be used for design purposes, but is intended as an indication of the I s potential performance. 3. For voltage drops across the switch ( V switch ) > 600 mv ( > 300 mv at high temperature), excessive current may be drawn, i.e. the current out of the switch may contain both and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.) 3

4 M405, M405, M4053 ELETRIL HRTERISTIS (Note 4) ( L = 50 pf, T = 5 ) ( V SS unless otherwise indicated) haracteristic Symbol Typ (Note 5) Î Max Vdc ll Types Unit Î Propagation Delay Times (Figure 6) t PLH, t PHL Switch Input to Switch Output (R L = 0 k ) Î M405 t PLH, t PHL = (0.7 /pf) L Î t PLH, t PHL = (0.08 /pf) L + Î 0 5 Î 40 t PLH, t PHL = (0.06 /pf) L M405 t PLH, t PHL = (0.7 /pf) L +.5 Î Î 75 t PLH, t PHL = (0.08 /pf) L t PLH, t PHL = (0.06 /pf) L Î M4053 t PLH, t PHL = (0.7 /pf) L Î Î 65 t PLH, t PHL = (0.08 /pf) L t PLH, t PHL = (0.06 /pf) L Î Î 5 Inhibit to Output (R L = 0 k, = V SS ) t PHZ, t PLZ, Output or 0 to High Impedance, or t Î PZH, t PZL High Impedance to or 0 Level M405 Î Î Î 80 M405 Î Î Î M Î ontrol Input to Output (R L = 0 k, = V SS ) t M405 PLH, t PHL Î Î Î M405 Î Î Î M Î Î 60 Second Harmonic Distortion (R L = 0K, f = khz) V in = 5 V PP Î % Î andwidth (Figure 7) (R L = k, V in = / ( ) pp, L = 50pF Î W 0 7 MHz 0 Log (V out /V in ) = 3 d) Off hannel Feedthrough ttenuation (Figure 7) 0 50 d R L = K, V in = / ( ) pp Î f in = 4.5 MHz M405 Î f in = 30 MHz M405 f in = 55 MHz M4053 Î hannel Separation (Figure 8) 0 (R L = k, V in = / ( ) pp, f in = 3.0 MHz Î 50 Î d Î rosstalk, ontrol Input to ommon O/I (Figure 9) 0 75 Î (R = k, R L = 0 k Î mv ontrol t TLH = t THL = 0, Inhibit = V SS ) 4. The formulas given are for the typical characteristics only at Data labelled Typ is not lo be used for design purposes but In intended as an indication of the I s potential performance. 4

5 M405, M405, M4053 IN/OUT OUT/IN LEVEL ONVERTED ONTROL IN/OUT OUT/IN ONTROL Figure. Switch ircuit Schematic ontrol Inputs Inhibit Select TRUTH TLE ON Switches * M405 M405 M X0 Y0 X0 Z0 Y0 X X Y X Z0 Y0 X X Y X Z0 Y X0 0 0 X3 Y3 X3 Z0 Y X X4 Z Y0 X0 0 0 X5 Z Y0 X 0 0 X6 Z Y X0 0 X7 Z Y X x x x None None None *Not applicable for M405 x = Don t are INH X0 3 X 4 X 5 X3 X4 X5 5 X6 X7 4 6 LEVEL ONVERTER 8 V SS 7 INRY TO OF8 DEODER WITH INHIIT Figure. M405 Functional Diagram 3 X 6 INH X0 X 4 X 5 X3 Y0 Y 5 Y Y3 4 LEVEL ONVERTER 8 V SS 7 INRY TO OF4 DEODER WITH INHIIT 3 X 3 Y INH X0 X 3 Y0 Y Z0 5 Z 3 6 LEVEL ONVERTER 8 V SS 7 INRY TO OF DEODER WITH INHIIT 4 X 5 Y 4 Z Figure 3. M405 Functional Diagram Figure 4. M4053 Functional Diagram 5

6 M405, M405, M4053 TEST IRUITS ON SWITH ONTROL SETION OF I V LOD PULSE GENERTOR INH R L L V out SOURE Figure 5. V cross Switch Figure 6. Propagation Delay Times, ontrol and Inhibit to Output,, and inputs used to turn ON or OFF the switch under test. V SS INH R L V out L = 50 pf INH ON OFF R L V out V in R L L = 50 pf V in Figure 7. andwidth and Offhannel Feedthrough ttenuation Figure 8. hannel Separation (djacent hannels Used For Setup) OFF HNNEL UNDER TEST V out ONTROL SETION OF I OTHER HNNEL(S) INH R L L = 50 pf R OMMON Figure 9. rosstalk, ontrol Input to ommon O/I Figure 0. Off hannel Leakage NOTE: See also Figures 7 and 8 in the M406 data sheet. 6

7 M405, M405, M k KEITHLEY 60 DIGITL MULTIMETER k RNGE XY PLOTTER = V SS Figure. hannel Resistance (R ON ) Test ircuit 350 TYPIL RESISTNE HRTERISTIS 350 R ON, ON" RESISTNE (OHMS) T = R ON, ON" RESISTNE (OHMS) T = V in, INPUT VOLTGE (VOLTS) Figure. = 7.5 V, = 7.5 V V in, INPUT VOLTGE (VOLTS) Figure 3. = 5.0 V, = 5.0 V R ON, ON" RESISTNE (OHMS) T = R ON, ON" RESISTNE (OHMS) T = 5 =.5 V 5.0 V 7.5 V V in, INPUT VOLTGE (VOLTS) Figure 4. =.5 V, =.5 V V in, INPUT VOLTGE (VOLTS) Figure 5. omparison at 5, = 7

8 M405, M405, M4053 PPLITIONS INFORMTION Figure illustrates use of the onchip level converter detailed in Figures, 3, and 4. The 0to5 V Digital ontrol signal is used to directly control a 9 V pp analog signal. The digital control logic levels are determined by and V SS. The voltage is the logic high voltage; the V SS voltage is logic low. For the example, = + 5 V = logic high at the control inputs; V SS = GND = 0 V = logic low. The maximum analog signal level is determined by and. The voltage determines the maximum recommended peak above V SS. The voltage determines the maximum swing below V SS. For the example, V SS = 5 V maximum swing above V SS ; V SS = 5 V maximum swing below V SS. The example shows a ± 4.5 V signal which allows a / volt margin at each peak. If voltage traients above and/or below are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure. These diodes should be small signal types able to absorb the maximum anticipated current surges during clipping. The absolute maximum potential difference between and is 8.0 V. Most parameters are specified up to 5 V which is the recommended maximum difference between and. alanced supplies are not required. However, V SS must be greater than or equal to. For example, = + 0 V, V SS = + 5 V, and 3 V is acceptable. See the Table below. + 5 V 5 V V SS V +5 V EXTERNL MOS DIGITL IRUITRY 9 V pp NLOG SIGNL 0TO5 V DIGITL ONTROL SIGNLS SWITH I/O INHIIT,,, M405 M405 M4053 OMMON O/I 9 V pp NLOG SIGNL GND 4.5 V Figure. pplication Example D X D X NLOG I/O OMMON O/I D X D X Figure. External Germanium or Schottky lipping Diodes Î POSSILE SUPPLY ONNETIONS Î ontrol Inputs Î V SS Î Î Logic High/Logic Low Maximum nalog Signal Range Î In Volts In Î In Volts Î In Volts In Volts Î Î 8 Î + 8/0 + 8 to 8 = 6 V p p Î Î Î + 5/0 + 5 to = 7 V p p Î Î 0 Î + 5/0 + 5 to 0 = 5 V p p Î Î 5 Î + 5/0 + 5 to 5 = 0 V p p Î Î 5 Î + 0/ to 5 = 5 V p p 8

9 M405, M405, M4053 ORDERING INFORMTION Device Package Shipping M405P PDIP6 500 Units / Rail M405PG PDIP6 500 Units / Rail (PbFree) M405D SOI6 48 Units / Rail M405DG SOI6 48 Units / Rail (PbFree) M405DR SOI6 500 / Tape & Reel M405DRG SOI6 500 / Tape & Reel (PbFree) M405DTR TSSOP6* 500 / Tape & Reel M405DTRG TSSOP6* 500 / Tape & Reel M405F SOEIJ6 50 Units / Rail M405FG SOEIJ6 50 Units / Rail (PbFree) M405FEL SOEIJ6 000 / Tape & Reel M405FELG SOEIJ6 (PbFree) 000 / Tape & Reel M405P PDIP6 500 Units / Rail M405PG PDIP6 500 Units / Rail (PbFree) M405D SOI6 48 Units / Rail M405DG SOI6 48 Units / Rail (PbFree) M405DR SOI6 500 / Tape & Reel M405DRG SOI6 500 / Tape & Reel (PbFree) M405DTR TSSOP6* 500 / Tape & Reel M405DTRG TSSOP6* 500 / Tape & Reel M405F SOEIJ6 50 Units / Rail M405FG SOEIJ6 50 Units / Rail (PbFree) M405FEL SOEIJ6 000 / Tape & Reel M405FELG SOEIJ6 (PbFree) 000 / Tape & Reel M4053P PDIP6 500 Units / Rail M4053PG PDIP6 500 Units / Rail (PbFree) M4053D SOI6 48 Units / Rail M4053DG SOI6 48 Units / Rail (PbFree) M4053DR SOI6 500 / Tape & Reel M4053DRG SOI6 500 / Tape & Reel (PbFree) M4053DTR TSSOP6* 500 / Tape & Reel M4053DTRG TSSOP6* 500 / Tape & Reel M4053F SOEIJ6 50 Units / Rail M4053FG SOEIJ6 50 Units / Rail (PbFree) M4053FEL SOEIJ6 000 / Tape & Reel M4053FELG SOEIJ6 (PbFree) 000 / Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio rochure, RD80/D. *This package is inherently PbFree. 9

10 M405, M405, M4053 PKGE DIMENSIONS PDIP6 P SUFFIX PLSTI DIP PKGE SE ISSUE T NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.5M, 98.. ONTROLLING DIMENSION: INH. 3. DIMENSION L TO ENTER OF LEDS WHEN FORMED PRLLEL. 4. DIMENSION DOES NOT INLUDE MOLD FLSH. 5. ROUNDED ORNERS OPTIONL. H G F D 6 PL S K 0.5 (0.00) M T T SETING PLNE M J L M INHES MILLIMETERS DIM MIN MX MIN MX D F G 0.00 S.54 S H S.7 S J K L M S SOI6 D SUFFIX PLSTI SOI PKGE SE 7505 ISSUE J P 8 PL 0.5 (0.00) M S NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.5M, 98.. ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS ND DO NOT INLUDE MOLD PROTRUSION. 4. MXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E 0.7 (0.005) TOTL IN EXESS OF THE D DIMENSION T MXIMUM MTERIL ONDITION. T SETING PLNE G K D 6 PL 0.5 (0.00) M T S S M R X 45 J F MILLIMETERS INHES DIM MIN MX MIN MX D F G.7 S S J K M P R

11 M405, M405, M4053 PKGE DIMENSIONS TSSOP6 DT SUFFIX PLSTI TSSOP PKGE SE 948F0 ISSUE 0.5 (0.006) T 0.5 (0.006) T 0.0 (0.004) T SETING PLNE L U PIN IDENT. U D S S X L/ 6X K REF 0.0 (0.004) M T U S V S V G U H N J N J F DETIL E DETIL E K K ÇÇÇ ÉÉÉ ÇÇÇ SETION NN 0.5 (0.00) M W NOTES:. DIMENSIONING ND TOLERNING PER NSI Y4.5M, 98.. ONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION DOES NOT INLUDE MOLD FLSH. PROTRUSIONS OR GTE URRS. MOLD FLSH OR GTE URRS SHLL NOT EXEED 0.5 (0.006) PER SIDE. 4. DIMENSION DOES NOT INLUDE INTERLED FLSH OR PROTRUSION. INTERLED FLSH OR PROTRUSION SHLL NOT EXEED 0.5 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E 0.08 (0.003) TOTL IN EXESS OF THE K DIMENSION T MXIMUM MTERIL ONDITION. 6. TERMINL NUMERS RE SHOWN FOR REFERENE ONLY. 7. DIMENSION ND RE TO E DETERMINED T DTUM PLNE W. MILLIMETERS INHES DIM MIN MX MIN MX D F G 0.65 S 0.06 S H J J K K L 6.40 S 0.5 S M SOLDERING FOOTPRINT PITH 6X X.6 DIMENSIONS: MILLIMETERS

12 M405, M405, M4053 PKGE DIMENSIONS SOEIJ6 F SUFFIX PLSTI EIJ SOI PKGE SE 9660 ISSUE e 6 9 Z b D H E 0.3 (0.005) M 0.0 (0.004) 8 E VIEW P M L E Q L DETIL P c NOTES: М. DIMENSIONING ND TOLERNING PER NSI Y4.5M, 98. М. ONTROLLING DIMENSION: MILLIMETER. М 3. DIMENSIONS D ND E DO NOT INLUDE MOLD FLSH OR PROTRUSIONS ND RE MESURED T THE PRTING LINE. MOLD FLSH OR PROTRUSIONS SHLL NOT EXEED 0.5 (0.006) PER SIDE. М 4. TERMINL NUMERS RE SHOWN FOR REFERENE ONLY. М 5. THE LED WIDTH DIMENSION (b) DOES NOT INLUDE DMR PROTRUSION. LLOWLE DMR PROTRUSION SHLL E 0.08 (0.003) TOTL IN EXESS OF THE LED WIDTH DIMENSION T MXIMUM MTERIL ONDITION. DMR NNOT E LOTED ON THE LOWER RDIUS OR THE FOOT. MINIMUM SPE ETWEEN PROTRUSIONS ND DJENT LED TO E 0.46 ( 0.08). MILLIMETERS INHES DIM MIN MX MIN MX b c D E e.7 S S H E L L E M Q Z ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any licee under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should uyer purchase or use SILL products for any such unintended or unauthorized application, uyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PULITION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution enter for ON Semiconductor P.O. ox 563, Denver, olorado 807 US Phone: or Toll Free US/anada Fax: or Toll Free US/anada orderlit@oemi.com N. merican Technical Support: Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative M405/D

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