MC14028B. BCD-To-Decimal Decoder Binary-To-Octal Decoder
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1 -To-ecimal ecoder inary-to-octal ecoder The decoder is constructed so that an 842 code on the four inputs provides a decimal (oneoften) decoded output, while a 3bit binary input provides a decoded octal (oneofeight) code output with forced to a logic 0. Expanded decoding such as binarytohexadecimal (oneofsixteen), etc., can be achieved by using other devices. The part is useful for code conversion, address decoding, memory selection control, demultiplexing, or readout decoding. MRKING IGRMS Features iode Protection on ll Inputs Supply Voltage Range = 3.0 Vdc to 8 Vdc apable of riving Two Lowpower TTL Loads or One LowPower Schottky TTL Load Over the Rated Temperature Range Positive Logic esign Low Outputs on ll Illegal Input ombinations Similar to 4028 These evices are PbFree and are RoHS ompliant NLV Prefix for utomotive and Other pplications Requiring Unique Site and ontrol hange Requirements; E0 Qualified and PPP apable WL YY, Y WW G PIP6 P SUFFIX SE SOI6 SUFFIX SE 75 = ssembly Location = Wafer Lot = Year = Work Week = PbFree Package P WLYYWWG 4028G WLYWW MXIMUM RTINGS oltages Referenced to V SS ) Parameter Symbol Value Unit Supply Voltage Range V 0.5 to +8.0 V Input or Output Voltage Range ( or Transient) V in, V out 0.5 to V V ORERING INFORMTION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. Input or Output urrent ( or Transient) per Pin I in, I out ±0 m Power issipation per Package (Note ) P 500 mw mbient Temperature Range T 55 to +25 Storage Temperature Range T stg 65 to +50 Lead Temperature (8Second Soldering) T L 260 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating onditions is not implied. Extended exposure to stresses above the Recommended Operating onditions may affect device reliability.. Temperature erating: Plastic P and /W Packages: 7.0 mw/ From 65 To 25 This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, V in and V out should be constrained to the range V SS in or V out ) V. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or V ). Unused outputs must be left open. Semiconductor omponents Industries, LL, 203 pril, 203 Rev. 8 Publication Order Number: /
2 PIN SSIGNMENT LOK IGRM V SS V Q IT INRY Q OTL EOE OUTPUTS EIML EOE OUTPUTS V = PIN 6 V SS = PIN 8 TRUTH TLE Q ORERING INFORMTION evice Package Shipping PG G PIP6 (PbFree) SOI6 (PbFree) 25 Units / Rail 48 Units / Rail R2G NLV4028R2G* SOI6 (PbFree) 2500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications rochure, R80/. *NLV Prefix for utomotive and Other pplications Requiring Unique Site and ontrol hange Requirements; E0 Qualified and PPP apable. 2
3 ELETRIL HRTERISTIS oltages Referenced to V SS ) Î ÎÎ 25 V ÎÎ Typ Î haracteristic Symbol Vdc Min Max Min (Note 2) Max Min Max Unit Output Voltage 0 Level Vdc Î V in = V or 0 Î V OL Î 0 Î Level Vdc Î V in = 0 or V Î V OH 0.5 Î.5 0 Î Î Î 4.5 Î Input Voltage 0 Level O Vdc = 4.5 or 0.5 Vdc) 5.0 V Î O =.0 or.0 Vdc) Î IL Î 4.50Î Î O = 3.5 or.5 Vdc) Level Vdc Î O = 0.5 or 4.5 Vdc) Î Î O =.0 or.0 Vdc) V IH O =.5 or 3.5 Vdc) Î Î 8.25Î Î Output rive urrent mdc Î OH = 2.5 Vdc) Source OH Î = 4.6 Vdc) I OH Î Î Î OH =.5 Vdc) 0.6 Î Î 0. Î OH = 3.5 Vdc) OL = 0.4 Vdc) Sink Î OL = 0.5 Vdc) OL Î I =.5 Vdc) OL Î Î 0. mdc Input urrent I in 5 ± 0. ± ± 0. ±.0 dc Input apacitance in = 0) in pf Quiescent urrent (Per Package) I Î dc 0 0Î 0.00Î Total Supply urrent (Note 3, 4) I Î T 5.0 I Î T = (0.3 /khz) f + I dc (ynamic plus Quiescent, 0 I T = (0.6 /khz) f + I Î Per Package) 5 ÎÎ I T = (0. /khz) f + I ( Î L = 50 pf on all outputs, all buffers switching) 2. ata labelled Typ is not to be used for design purposes but is intended as an indication of the I s potential performance. 3. The formulas given are for the typical characteristics only at To calculate total supply current at loads other than 50 pf: I T ( L ) = I T (50 pf) + ( L 50) Vfk where: I T is in (per package), L in pf, V = V SS ) in volts, f in khz is input frequency, and k = SWITHING HRTERISTIS (Note 5) ( L = 50 pf, T = 25 ) ÎÎ Typ ÎÎ haracteristic Symbol V Î Min (Note 6) Max Unit ÎÎ Output Rise and Fall Time t TLH, t THL = (.5 ns/pf) L t TLH, + 25 ns t THL ns ÎÎ t TLH, t THL = (0.75 ns/pf) L ns ÎÎ Î t TLH, t THL = (0.55 ns/pf) L +.5 ns Propagation elay Time t ÎÎ t PLH, t PHL = (.7 ns/pf) L + 25 ns PLH, ns t PHL t ÎÎ PLH, t PHL = (0.66 ns/pf) L + 7 ns ÎÎ ÎÎ t PLH, t PHL = (0.5 ns/pf) L + 65 ns 5. The formulas given are for the typical characteristics only at ata labelled Typ is not to be used for design purposes but is intended as an indication of the I s potential performance
4 20 ns 20 ns Inputs,, and switching in respect to a code. INPUT 0% 0% 50% /f V V SS ll outputs connected to respective L loads. f in respect to a system clock. Inputs,, and low. INPUT 0% t PLH 20 ns 20 ns 0% 50% t PHL V V SS 0% 0% 50% V OH V OL t TLH t THL Figure. ynamic Signal Waveforms Q LOGI IGRM PPLITIONS INFORMTION Expanded decoding can be performed by using the and other MOS Integrated ircuits. The circuit in Figure 2 converts any 4bit code to a decimal or hexadecimal code. The accompanying table shows the input binary combinations, the associated output numbers that go high when selected, and the redefined output numbers needed for the proper code. For example: For the combination = 0 the output number 7 is redefined for the 4bit binary, 4bit gray, excess3, or excess3 gray codes as 7, 5, 4, or 2, respectively. Figure 3 shows a 6bit binary of64 decoder using nine circuits and two M406U inverters. The can be used in decimal digit displays, such as, neon readouts or incandescent projection indicators as shown in Figure OUTPUT NUMERS Figure 2. ode onversion ircuit and Truth Table 4
5 Inputs Output Numbers ode and Redefined Output Numbers Hexadecimal 4it inary 4it Gray ecimal Excess3 Excess3 Gray iken 422 E F INHIIT (NO SELETION) - Figure 3. Sixit inary of64 ecoder */6 M406U 64 OUTPUTS (SELETE OUTPUT IS HIGH) Q PPROPRITE VOLTGE NEON ISPLY 0 OR 2 0 PPROPRITE VOLTGE INNESENT ISPLY Figure 4. ecimal igit isplay pplication 5
6 PKGE IMENSIONS PIP6 P SUFFIX SE ISSUE T 6 8 NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, ONTROLLING IMENSION: INH. 3. IMENSION L TO ENTER OF LES WHEN FORME PRLLEL. 4. IMENSION OES NOT INLUE MOL FLSH. 5. ROUNE ORNERS OPTIONL. H G F 6 PL S K 0.25 (0.00) M T SETING T PLNE M J L M INHES MILLIMETERS IM MIN MX MIN MX F G 0.00 S 2.54 S H S.27 S J K L M S
7 PKGE IMENSIONS SOI6 SUFFIX SE 7505 ISSUE K 6 8 P 8 PL 0.25 (0.00) M S NOTES:. IMENSIONING N TOLERNING PER NSI Y4.5M, ONTROLLING IMENSION: MILLIMETER. 3. IMENSIONS N O NOT INLUE MOL PROTRUSION. 4. MXIMUM MOL PROTRUSION 0.5 (0.006) PER SIE. 5. IMENSION OES NOT INLUE MR PROTRUSION. LLOWLE MR PROTRUSION SHLL E 0.27 (0.005) TOTL IN EXESS OF THE IMENSION T MXIMUM MTERIL ONITION. MILLIMETERS INHES IM MIN MX MIN MX F G.27 S S J K M P R T SETING PLNE G 6 PL 0.25 (0.00) M T S S K M R X 45 J F SOLERING FOOTPRINT 8X X.2 6 6X PITH 8 IMENSIONS: MILLIMETERS ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, LL (SILL). SILL owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. listing of SILL s product/patent coverage may be accessed at SILL reserves the right to make changes without further notice to any products herein. SILL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SILL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SILL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. ll operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SILL does not convey any license under its patent rights nor the rights of others. SILL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SILL product could create a situation where personal injury or death may occur. Should uyer purchase or use SILL products for any such unintended or unauthorized application, uyer shall indemnify and hold SILL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SILL was negligent regarding the design or manufacture of the part. SILL is an Equal Opportunity/ffirmative ction Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PULITION ORERING INFORMTION LITERTURE FULFILLMENT: Literature istribution enter for ON Semiconductor P.O. ox 563, enver, olorado 8027 US Phone: or Toll Free US/anada Fax: or Toll Free US/anada orderlit@onsemi.com N. merican Technical Support: Toll Free US/anada Europe, Middle East and frica Technical Support: Phone: Japan ustomer Focus enter Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative /
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The MC10176 contains six high-speed, master slave type D flip-flops. Clocking is common to all six flip-flops. Data is entered into the master when the clock is low. Master to slave data transfer takes
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More informationThe MC10107 is a triple 2 input exclusive OR/NOR gate. P D = 40 mw typ/gate (No Load) t pd = 2.8 ns typ t r, t f = 2.
The MC10107 is a triple input exclusive OR/NOR gate. P D = 0 mw typ/gate (No Load) t pd =. ns typ t r, t f =. ns typ (0% 0%) LOGIC DIAGRAM MARKING DIAGRAMS CDIP 16 L SUFFIX CASE 60 16 1 MC10107L AWLYYWW
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The MC06 contains six high speed, master slave type D flip flops. Clocking is common to all six flip flops. Data is entered into the master when the clock is low. Master to slave data transfer takes place
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