Modeling Random Variability of 16nm Bulk FinFETs

Transcription

1 Modeling Random Variability of 16nm Bulk FinFETs Victor Moroz, Qiang Lu, and Munkang Choi September 9,

2 Outline 2

3 Outline 3

4 16nm Bulk FinFETs for 16nm Node Simulation domain 24nm fin pitch 56nm gate pitch Define fin (spacer litho shown) STI 0.8 V Vdd 0.8 nm EOT 32 nm tall fins 8 nm wide fins Undoped channel In-situ doped S/D epi 33% Ge SiGe PMOS S/D Poly gate Spacers S/D epitaxy HKMG 4

5 S/D Shape Affects Stress, R cont, and C par Gate 2 {111} facets S Gate 1 Drain CV/I Trade-Off S Adjacent S/D merge 5

6 LER Analysis S D Due to the LER wavelength l~30nm >> fin size: Use a small set of deterministic extreme cases instead of massive random analysis A popular claim that etching is a low pass filter requires significant amount of under-etching that can not be used for tight fin pitches 6

7 Extreme FinFET Shapes for LER Analysis Fin shape Edge #1 phase shift Edge #2 phase shift Comment S D - - Perfect 0 p Fat 0 0 Bent p/2 -p/2 Big source -p/2 p Big drain p 0 Thin 7

8 Ioff, A/um Perfect Rectangular 16nm FinFET 1.E-07 1.E-08 Perfect 1.E-09 1.E-10 1.E-11 1.E-12 1.E-13 1.E Ion, ma/um 8

9 Ioff, A/um LWR: 3 Sigma = 3 nm 1.E-07 1.E-08 Perfect 3nm 3 sigma LWR 1.E-09 20% I on range 1.E-10 1.E-11 30x I off range 1.E-12 1.E-13 1.E Ion, ma/um 9

10 Ioff, A/um LWR: 3 Sigma = 6 nm 1.E-07 1.E-08 1.E-09 Perfect 3nm 3 sigma LWR 6nm 3 sigma LWR 40% I on range 1.E-10 1.E x I off range 1.E-12 1.E-13 1.E Ion, ma/um 10

11 Ioff, A/um LWR: 3 Sigma = 9 nm 1.E-07 1.E-08 1.E-09 Perfect 3nm 3 sigma LWR 6nm 3 sigma LWR 9nm 3 sigma LWR 80% I on range 1.E-10 1.E-11 1.E ,000x I off range ~400 mv V tsat variation 1.E-13 1.E Ion, ma/um 11

12 Ioff, A/um LER: Unacceptable State-of-the-Art Litho 1.E-07 1.E-08 1.E-09 1.E-10 1.E-11 1.E-12 1.E-13 1.E-14 Perfect 3nm 3 sigma LWR 6nm 3 sigma LWR 9nm 3 sigma LWR Ion, ma/um All LER cases line up along the same Ion/Ioff trade-off curve No performance gap with the perfect rectangular fin Variability dramatically increases with LER amplitude Unacceptable variability above 3nm 3*Sigma LER 12

13 Ioff, A/um LER: Particular Configurations 1.E-07 1.E-08 1.E-09 Perfect 3nm 3 sigma LWR 6nm 3 sigma LWR 9nm 3 sigma LWR 1.E-10 1.E-11 1.E-12 1.E-13 1.E Ion, ma/um S D Red color shows electrons 13

14 Ioff, A/um DL and DW Sensitivities: Quite High 1.E-07 1.E-08 1.E-09 1.E-10 1.E-11 long wide narrow short 1nm change in L or W changes: Ion by ~10% and Ioff by ~4x No performance degradation, you move along the same Ion/Ioff trade-off curve 1.E-12 1.E-13 1.E-14 Perfect Delta L Delta W Ion, ma/um Very similar DL and DW sensitivities, despite L~2W +/- 1nm L and W control is only possible with spacer litho 14

15 Spacer Lithography Definition Photo-lithographically defined sacrificial structures 1st Spacers 2nd Spacers 3rd Spacers 2 n lines after n iterations of spacer lithography! 15

16 Ioff, A/um Spacer Lithography: Small Impact 1.E-07 1.E-08 1.E-09 1.E-10 1.E-11 2x 10% Perfect 3nm 3s LWR 1.E-12 1.E-13 1.E-14 Perfect Fixed fin width with 1, 2, & 3nm waves Ion, ma/um 6nm 3s LWR 9nm 3s LWR 16

17 Spacer Lithography Imperfections Less deposition into small visibility angle <180 o 180 o 17

18 Spacer Lithography Imperfections Less deposition into small visibility angle Deposited layer (spacer) Dummy feature (top view) Deposition creates positive feedback, amplifying LER This gives you two edges that are in-sync (same phase), but different amplitudes Etching has the opposite, negative feedback, smoothing LER It might be possible to balance the deposition and etching effects, but Generally, spacer-litho-defined features will have some width variation 18

19 Ground Power Etch/Depo Micro-Loading Effects a b g NMOS PMOS PMOS Different fins experience different etch/deposition conditions Due to local visibility angles and pattern density This leads to variability in fin width and layer thicknesses 19

20 Ioff, A/um Imperfect Spacer Litho: Still OK 1.E-07 1.E-08 1.E-09 1.E-10 1.E-11 6x 12% Perfect Mid-thick 1.E-12 1.E-13 Perfect Fixed fin width with 1, 2, & 3nm waves 3nm waves+1nm fin width distortions Drain-thick 1.E Ion, ma/um Spacer litho is green : always reduces leakage! Mid-thin 20

21 Outline 21

22 Doping Random Dopant Fluctuations Gate Spacers As drain Source Drain As source Indium channel-stop Source Spacer Gate Spacer Drain 22

23 Ioff, A/um RDF: Insensitive to Junction Abruptness 1.E-06 1.E-07 1.E-08 Smooth 1nm/dec Atomistic 1nm/dec Smooth 3nm/dec Atomistic 3nm/dec 13mV s Vt 6mV s Vt Ion, ma/um Smooth junctions give similar performance for different amounts of abruptness The amount of RDF variability is quite moderate With junction abruptness degrading from 1nm/dec to 3nm/dec, s Vt only doubles Surprisingly low RDF sensitivity to junction abruptness Indium channel-stop RDF contribution is negligible 23

24 Ioff, A/um S/D RDF: Consistent with DL Variation 1.E-06 1.E-07 Smooth 1nm/dec Atomistic 1nm/dec Smooth 3nm/dec Atomistic 3nm/dec Top view of the fin: Indium below As As 11.2nm 13mV s Vt 1.E-08 6mV s Vt Ion, ma/um 12.6nm Apparent channel length difference is ~1.4nm S/D RDF are consistent with the DL sensitivity of 4x I off per 1nm 24

25 Ioff, A/um Single Dopant in the Channel: ~3e17 cm -3 1.E-06 Undoped channel One acceptor One donor Donor opens the channel for I off (3x), but not I on (3%) 1.E-07 Acceptor blocks the channel The impact is not catastrophic 1.E Ion, ma/um 25

26 Ioff, A/um Electrons wrap Single Dopant: Worst at Mid-Height 1.E-06 1.E-07 Undoped channel Top Middle Bottom around perimeter of the fin Electrons leak in the middle Top Middle Bottom I on I off Acceptors Donors 1.E Ion, ma/um Ions in the middle of the fin height affect I off the most Ions at the top of the fin affect I on the most Ions at the bottom of the fin have the least impact 26

27 Ioff, A/um Source Middle Drain Single Dopant: Worst at Mid-Length 1.E-06 1.E-07 Undoped channel Middle Source Drain Acceptors Donors 1.E Ion, ma/um Ions in the middle of the fin length have the most impact Ions at the source side have less impact Ions at the drain side have the least impact 27

28 Outline 28

29 Longitudinal Stress, GPa Hole Mobility Stress Enhancement Factor Stress Variation for Spacer Litho 0-1% -4% -8% 3 Stress and mobility values are averaged over the entire fin channel volume % +50% Before gate removal After metal gate Gate-first Gate-last Fin Wave Amplitude, nm Both the stress and the mobility increase upon poly removal Mobility enhancement degrades with fin curvature This adds (i.e. positive feedback) to the longer L with fin curvature 29

30 Longitudinal Stress, GPa Hole Mobility Stress Enhancement Factor Stress Variation for Distorted Spacer Litho -7% -4% Before poly gate removal for the gate-last HKMG, stress levels are very similar Before gate removal After metal gate Perfect Drain-thick Mid-thick Mid-thin However, after the poly removal, stress increases, but the amount is geometry-specific All non-rectangular shapes reduce mobility despite using the best patterning option: spacer lithography Gate-first HKMG has remarkably lower stress but remarkably lower stress variation 30

31 Non-Uniform Fin Stress Patterns -1 GPa -5 GPa Zero stress Huge stress variations, especially at the S/D junctions To get average fin stress of ~2 GPa, peak stress in the fin exceeds dangerous 5 GPa 31

32 High Shear Stress Levels High shear stress of ~1 GPa This is different from planar FETs Can affect mobility enhancement Can affect defect formation 32

33 Longitudinal Stress, GPa Hole Mobility Stress Enhancement Factor Gates DPT Mask Misalignment Impact on Stress Misalignment = 0nm 6nm 12nm Fins Mask #1 Mask #2-1% -5% Before gate removal After metal gate Gate-first Gate-last Mask Misalignment, nm Remarkably little stress loss even for major misalignment for gate-last HKMG Stronger effect for gate-first HKMG Again, perfect case performs the best Contact resistance will degrade much faster 33

34 Longitudinal Stress, GPa Hole Mobility Stress Enhancement Factor Gates DPT Mask Misalignment Impact on Stress Misalignment = 0nm 6nm 12nm Fins Mask #1 Mask #2-1% -5% Before gate removal After metal gate Gate-first Gate-last Mask Misalignment, nm Remarkably little stress loss even for major misalignment for gate-last HKMG Stronger effect for gate-first HKMG Again, perfect case performs the best Contact resistance will degrade much faster 34

35 Outline 35

36 Conclusions State-of-the-art litho is not good enough for fin and gate patterning Spacer lithography provides manageable amount of variations Geometry variation of +/- 1nm dominates variability over RDF & s S/D junction abruptness is not critical for performance & variability Single stray donor/acceptor dopant does not disturb performance significantly Remarkable stress gradients, from 5 GPa to 0 across the fin High shear stress levels, ~1 GPa 36