Variability-Aware Compact Model Strategy for 20-nm Bulk MOSFET
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1 Variability-Aware Compact Model Strategy for 20-nm Bulk MOSFET X. Wang 1, D. Reid 2, L. Wang 1, A. Burenkov 3, C. Millar 2, B. Cheng 2, A. Lange 4, J. Lorenz 3, E. Baer 3, A. Asenov 1,2! 1 Device Modelling Group,!! University of Glasgow, UK 2 Gold Standard Simulations Ltd, UK 3 Fraunhofer IISB, Erlangen, Germany 4 Fraunhofer IIS/EAS, Dresden, Germany Xingsheng.Wang@glasgow.ac.uk SISPAD, 8-11 Sept 2014, Yokohama Japan! 1!!
2 Outline! q Introduction! q 20-nm bulk MOSFET! q Simulations of Process variation and Statistical variability sources! q Compact Modelling Strategy! q Application! q Summary! 2!
3 Introduction Variability is a unavoidable challenge for advanced MOSFET technology and circuit design. Global process variation (PV) and local statistical variability (SV) both involve.! While novel technologies such as FinFET and FDSOI are being introduced, bulk planar technology is still adopted as major technology in 20-nm generation. It undergoes serious variability impact.! Statistical Compact Modelling is a key effort for variability-aware technology circuit co-optimization to achieve high yield, and low power designs.! 3!
4 Variability Decomposition (Takeuchi, Nishida, Hiramoto, SISPAD 2009)! (D. Frank, IBM)! In general, the variability can be decomposed into global process variation and local random variability.! PV: systematic, spatially correlated, long-range.! SV: random, no (weak) correlation, short-range.! 4!
5 Simulation of 20-nm bulk MOSFETs STI! (Fraunhofer, Sentaurus)! Process simulation! Process follows realistic gate stack, shallow trench isolation (STI)! L G =23.5nm, W=33nm.! Device simulation! Accurate meshing (gate interface, STI corner)! GSS Garand calibrated DD module! Coupled density gradient quantum corrections.! (Calibrated to experimental)! 5!
6 Large Devices L dependence! W dependence! Width! V T (V) V BB =-1.0V V BB =-0.5V V BB =0V V BB =0.5V V T (V) V BB =-1.0V V BB =-0.5V V BB =0V V BB =0.5V 0 Width=100nm V D =0.9V(black) / 0.05V(red) L G (nm) 0.3 L CH =100nm V D =0.9V(black) / 0.05V(red) W CH (nm) Length! Large devices are simulated in respect of CDs.! L/W effects are decoupled.! It affiliates the compact models of short-channel effects and width effect.! 6!
7 Variability simulation Process Variation L (nm)! 17! 20.25! 23.5! 26.75! 30! W (nm)! 24! 28.5! 33! 37.5! 42! 5 X 5 corner uniform simulation of CD variations! Short-channel effect (Vt roll off)! Width effect (STI corner enhanced field)! 7!
8 Variability simulation Statistical Variability RDD! RDD assignment is based on local channel doping and follows rejection technique; cloud in cell.! (GSS Garand)! 8!
9 Variability simulation Statistical Variability LER! RDD assignment is based on local channel doping and follows rejection technique; cloud in cell.! LER is modelled by Fourier synthesis based on Gaussian autocorrelation; 2nm LER! (GSS Garand)! 9!
10 Variability simulation Statistical Variability MGG! (GSS Garand)! RDD assignment is based on local channel doping and follows rejection technique; cloud in cell.! LER is modelled by Fourier synthesis based on Gaussian autocorrelation; 2nm LER! MGG in gate-first models two metal grains with workfunctions of 0.2eV difference and 0.4/0.6 occurrence; 5nm average grain size! 10!
11 Statistical simulation strategy Select from! 5x5 matrix! <Ion>=23.4µA! σv T =45.4mV! RDD, LER, MGG! Vd=0.9V!! 11!
12 Statistical simulation strategy <Ion>=40µA! <Ion>=15µA! Vd=0.9V! RDD, LER, MGG! Current: Fast/typical/slow corners!! 12!
13 Statistical simulation strategy σv T =66.9mV! σv T =38.3mV! Vd=0.9V! RDD, LER, MGG! Current: Fast/typical/slow corners! V T -variation: Large/typical/small corners! 13!
14 Outline! q Introduction! q 20-nm bulk MOSFET! q Simulations of Process variation and Statistical variability sources! q Compact Modelling Strategy! q Application! q Summary! 14!
15 Compact Model Extraction Strategy Cloud! PV! SV! First, comprehensive nominal model.! Second, one group of PV parameters are used to extract PV.! Third, one orthogonal group of SV parameters are used to extract SV.! Fourth, parameters are built as functions of PV space.!! 15!
16 Nominal model extraction I d (A) Reference Fitted V DS =0.9V V BS =0.5, 0, -0.5, -1.0V V g (V) Id (A) Reference Fitted Vg=0.9V 0.8V 0.7V Vg=0.6V Vd (V) Sub-Vth (SS, Vth, Ioff);! Low field mobility, Velocity saturation;! Output resistance! Vbb dependence, Vd dependence, Lg dependence! 16!
17 PV-SV Extraction Uniform PV extraction! (Group I parameters)! Statistical SV extraction! (Group II parameters)! (shown only for nominal)! Process variation extraction: average error ~ 3%! Statistical variability extraction: capturing 1) variability magnitudes 2) correlations of figures of merit! 17!
18 Application Demo of the methodology Step 1: For each circuit, (L, W) ~ Distribution (here Gaussian distribution with sigmas of 1.5nm and correlation of 0.5);! Step 2: Determine process variations by applying P = f (L, W) to group I parameters;! Step 3: For each transistor, apply SV (group II parameters orthogonal to PV parameters).! 18!
19 Statistical Models L=1.5nm W=1.5nm =0.5 W (nm) L (nm) CD process variations! CD process variation is globally randomized.! 19!
20 W (nm) L=1.5nm W=1.5nm =0.5 nominal! L (nm) CD process variations! Statistical Models V T (V) CD process variation is globally randomized.! Corresponding to each CD, local statistical variability is applied.! Occurrence Statistical variability ensemble! For each (W,L) input! SV only PV+SV 20!
21 38 36 L=1.5nm W=1.5nm =0.5 Statistical Models Statistical variability ensemble! For each (W,L) input! 120 W (nm) L (nm) CD process variations! V T (V) CD process variation is globally randomized.! Corresponding to each CD, local statistical variability is applied. SV could be different for dinstinct (L,W).! Occurrence SV only PV+SV 21!
22 Statistical Models 4 4 Normal quantiles ( ) SV only PV+SV Normal quantiles ( ) SV only PV+SV V T (V) DIBL (mv/v) With PV, the statistical variability magnitude is enhanced.! With PV, the distributions of figures of merit are changed.! Distribution of DIBL is largely changed due to a larger variation of L.! 22!
23 Summary We have simulated a matrix of PV and SV in 20-nm bulk planar MOSFETs following design of experiments.! A variability aware compact modelling strategy is carried out to extract both PV and SV.! This method can handle accurately the PV, SV and together total variability.! With interactions of PV and SV, statistical variability of transistor figures of merit is largely changed in fluctuation magnitudes and distributions.! 23!
24 Acknowledge The research leading to these results has received funding from the European Union Seventh Framework Programme (FP7/ ) under grant agreement no SUPERTHEME.!!!!! Thank you for your attention!! 24!
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