Simulation of statistical variability in nano-cmos transistors using drift-diffusion, Monte Carlo and non-equilibrium Green s function techniques

Transcription

1 J Comput Electron (2009) 8: DOI /s Simulation of statistical variability in nano-cmos transistors using drift-diffusion, Monte Carlo and non-equilibrium Green s function techniques Asen Asenov Andrew R. Brown Gareth Roy Binjie Cheng Craig Alexander Craig Riddet Urban Kovac Antonio Martinez Natalia Seoane Scott Roy Published online: 19 September 2009 Springer Science+Business Media LLC 2009 Abstract In this paper, we present models and tools developed and used by the Device Modelling Group at the University of Glasgow to study statistical variability introduced by the discreteness of charge and matter in contemporary and future Nano-CMOS transistors. The models and tools, based on Drift-Diffusion (DD), Monte Carlo (MC) and Non- Equilibrium Green s Function (NEGF) techniques, are encapsulated in the Glasgow 3D statistical atomistic device simulator. The simulator can handle most of the known sources of statistical variability including Random Discrete Dopants (RDD), Line Edge Roughness (LER), Thickness Fluctuations in the Oxide (OTF) and Body (BTF), granularity of the Poly-Silicon (PSG), Metal Gate (MGG) and High-κ (HKG), and oxide trapped charges (OTC). The results of the statistical simulations are verified with respect to measurements carried out on fabricated devices. Predictions about the magnitude of the statistical variability in future generations of nano-cmos devices are also presented. Keywords Semiconductors MOSFET Numerical simulation Variability A. Asenov ( ) A.R. Brown G. Roy B. Cheng C. Alexander C. Riddet U. Kovac A. Martinez N. Seoane S. Roy Device Modelling Group, Department of Electronics and Electrical Engineering, The University of Glasgow, Glasgow, G12 8LT, UK A.Asenov@elec.gla.ac.uk N. Seoane Dept. Electronics and Computing Science, Univ. Santiago de Compostela, Santiago de Compostela, 15782, Spain 1 Introduction The years of happy scaling are over and the fundamental challenges that the semiconductor industry faces at the technology and device level will deeply affect the design of the next-generation integrated circuits and systems. The progressive scaling of CMOS (Complementary Metal-Oxide- Semiconductor) transistors to achieve faster devices and higher circuit density has fuelled the phenomenal success of the semiconductor industry captured by Moore s famous law. Silicon technology has entered the nano-cmos era with 35 nm MOSFETs in mass production in the 45 nm technology generation. However it is widely recognised that the increasing variability in the device characteristics is among the major challenges to scaling and integration for the present and next generation of nano-cmos transistors and circuits. Variability of transistor characteristics has become a major concern associated with CMOS transistor scaling and integration [1, 2]. It already critically affects SRAM (Static Random Access Memory) scaling [3], and introduces leakage and timing issues in digital logic circuits [4]. Variability is the main factor restricting the scaling of the supply voltage, which for the last four technology generations has remained virtually constant, adding to the looming power crisis. This paper focuses on the simulation of statistical variability, which has become a dominant source of variability for the 45 nm technology generation and which cannot be reduced by tightening process control. While in the case of systematic variability the impact of lithography and stress on the characteristics of an individual transistor can be modelled or characterised and therefore factored into the design process, in the case of statistical variability only the statistical behaviour of the transistors can be simulated or characterised. Two adjacent macroscopically identical transistors

2 350 J Comput Electron (2009) 8: can have characteristics from the two distant ends of the statistical distribution. Figure 1 shows that MOSFETs are becoming truly atomistic devices. The conventional way of describing, designing, modelling and simulating such semiconductor devices, illustrated in Fig. 1(a), assuming continuous ionised dopant charge and smooth boundaries and interfaces, is no longer valid. The granularity of the electric charge and the atomicity of matter, as illustrated in Fig. 1(b), begin to introduce substantial variation in individual device characteristics. The variation in number and position of dopant atoms in the active region of decanano MOSFETs makes each transistor microscopically different and already introduces significant variations from device to device. In addition, the gate oxide thickness becomes equivalent to several atomic layers with a typical interface roughness of the order of 1 2 atomic layers. This will introduce a localised variation in the oxide thickness resulting in each transistor having a microscopically different oxide thickness or body thickness pattern. The granularity of the photoresist, together with other factors, will introduce unavoidable line edge roughness (LER) in the gate pattern definition and statistical variations in geometry between devices. The granularity of the poly-silicon or the metal gate and the granularity of the highκ dielectric introduced at the 45 nm technology generation are other prominent sources of statistical variability. In this paper, we present models and tools developed over more than a 10 year period and used by the Device Modelling Group at the University of Glasgow to study statistical variability introduced by the discreteness of charge and matter in contemporary and future nano-cmos transistors. The models and tools, based on Drift-Diffusion (DD), Monte Carlo (MC) and Non-Equilibrium Green s Function (NEGF) techniques, are encapsulated in the Glasgow 3D statistical atomistic device simulator. Section 2 describes the models, tools and limitations of the DD module of the Glasgow atomistic simulator, mainly targeting the electrostatic impact of the variability sources. The MC module of the simulator, developed to capture the transport variability and its specific impact on the current variability, is described in Sect. 3. The fully 3D NEGF module, designed for the accurate study of variability in 10 nm channel length transistors and used for the validation and calibration of the DD and MC modules, is described in Sect. 4. Finally the conclusions are drawn in Sect Drift diffusion simulation In the presence of statistical variability the aim of the numerical simulation shifts from predicting the characteristics of a single device towards estimating the mean values and the variance of basic design parameters, such as threshold Fig. 1 Transition from continuous towards atomistic device concepts (a) The traditional approach to semiconductor device simulation assumes continuous ionised dopant charge and smooth boundaries and interfaces; (b) Sketch of a 20 nm MOSFET corresponding to 22 nm technology generation. There are less than 50 Si atoms along the channel. Random discrete dopants, atomic scale interface roughness, and line edge roughness introduce significant intrinsic parameter fluctuations; (c) Sketch of a sub 10 nm MOSFET expected in mass production in There are a handful of Si atoms along the channel. The device becomes comparable to biologically important molecules such as ionic channels

3 J Comput Electron (2009) 8: voltage, subthreshold slope, transconductance, drive current, etc. for a whole ensemble of microscopically different devices in the system [5]. It must be emphasised that even the mean values obtained from, for example, statistical atomistic simulations are not identical to the values corresponding to continuous charge simulation [6]. The simulation of a single device in the presence of statistical variability sources requires a 3D solution with fine-grain discretisation. The requirement for statistical simulations transforms the problem into a four-dimensional one where the fourth dimension is the size of the statistical sample. This dictates that a fast simulation technique is used for which the drift-diffusion technique, with quantum corrections, is the best candidate. Simulations of bulk MOSFETs with a fine discretisation mesh (approximately 1,000,000 nodes) can be performed in a matter of a few hours on a single processor. 3D Drift Diffusion (DD) simulations are typically used to study statistical threshold voltage variability introduced by individual and combined variability sources [7, 8]. Although much faster compared to 3D MC or NEGF statistical simulations, the DD approximation does not capture nonequilibrium carrier transport effects and therefore underestimates the on-state drain current in decanano and nanometre scale devices. However it is perfectly adequate for calculating the threshold voltage and its variations based on a current criterion in the subthreshold region when the Poisson equation is decoupled from the current continuity equation, the electrostatics dominate the device behaviour and the current density depends exponentially on the surface potential and its fluctuations. We do not taken into account Fermi- Dirac statistics as it has been shown that in Si MOSFETs with high DOS this has negligible effect on the results of numerical simulations. Additionally, in the DG formulation, as presented in the original paper of Ancona [9], the DOS is consistent with Boltzmann statistics. 2.1 Density gradient quantum corrections Density gradient (DG) quantum corrections for both electrons and holes are implemented in the simulator to account for quantum confinement effects and to allow the fine grain resolution of individual discrete charges [10] which will be discussed in the next section. Typically in the DG simulation of, for example, n-channel MOSFETs it is sufficient to solve, self-consistently [11], the Poisson (1) and Density Gradient (2), using a modified Gummel approach: (ε ψ)= q(p n + N + D N A ) (1) where ψ is the electrostatic potential, ε is the dielectric constant of the material, q is the electronic charge, p is the hole concentration, n is the electron concentration, N D is the donor concentration and N A is the acceptor concentration, and 2bn ( 1 2 S n S n m nx x S n m ny y ) S n m nz z 2 = φ n ψ + k BT q ln(s2 n ) (2) where φ n is the quasi-fermi potential for electrons, S n = n/ni (n i is the intrinsic carrier concentration) and bn = 2 /4qr (r is a variable parameter). Equation (2) is the anisotropic density gradient equation [12] giving different effective mass components in the transport (longitudinal) direction, m nx, and in the confinement (transverse) directions, m ny and m nz. These effective masses are treated as fitting parameters [13]. The effective quantum-corrected potential is then calculated from ψ eff = ψ + 2b n S n ( 1 2 S n m nx x S n m ny y ) S n m nz z 2 = φ n + k BT q ln(s2 n ) (3) and is then used as the driving potential for the current continuity equation, J n = 0 (4) where J n = qnμ n ψ eff + qd n n (5) is the current density which is solved using a standard Scharfetter-Gummel discretisation based on the effective quantum-corrected potential, ψ eff. In the simulation of n-channel MOSFETs this takes care of problems associated with the atomistically doped source/drain regions. In order to avoid problems associated with the atomistically doped substrate the DG hole equationof-state, 2bp ( 1 2 S p m px x S p m py y ) S p m pz z 2 S p = ψ φ p + k BT q ln(s2 p ) (6) has to be added to the above system but without solving the hole current continuity equation. The systems of [(1), (2) and (6)] and [(5)] are solved self-consistently until convergence. Similarly to the NEGF approach described in Sect. 4, Neumann boundary conditions (NBC) are used in the source and drain, as the potential adjusts the electron injection to preserve charge neutrality [14]. The NBC work better in

4 352 J Comput Electron (2009) 8: conjunction with Density Gradient than Dirichlet boundary conditions, allowing the electron concentration in the source and drain to follow the quantum mechanical distribution. Following Jin et al. [15] the gradient of the electron concentration perpendicular to the Si/SiO 2 interface depends on the relative effective masses in the silicon and the SiO 2, accounting for penetration of the electron wave function into the oxide. 2.2 Introduction of variability sources In this section we describe the techniques and the models used to introduce some of the most important variability sources in the DD simulator. The impact of these variability sources on the device electrostatics also propagates in the corresponding MC and NEGF simulations Random discrete dopants The best way of introducing RDD in variability simulations is to use output from atomic scale process simulations like the one illustrated in Fig. 2(a). However this is very time consuming and, in most of the cases, random discrete dopants are generated based on the continuous doping profiles obtained from conventional TCAD process simulators. In our DD simulator, following the methodology described in [16], all sites of the silicon lattice covering the simulated device are scanned one by one. Dopants are introduced randomly in the sites with a probability given by the corresponding dopant-to-silicon concentration ratio using a rejection technique. The charge of each dopant is assigned to the eight surrounding mesh nodes using the cloudin-cell (CIS) technique commonly used in Monte Carlo simulations. A typical 3D potential distribution reflecting the impact of random discrete dopants in a typical 35 nm n- channel MOSFET [17] is illustrated in Fig 2(b). The resolution of individual charges in atomistic DD simulations using a fine mesh creates problems [18]. Due to the use of Boltzmann or Fermi-Dirac statistics in the classical drift-diffusion approach the electron concentration follows the electrostatic potential, gained from the solution of the Poisson equation. As a result, a significant amount of mobile charge can become trapped (localised) in the sharply resolved Coulomb potential wells created by discrete dopant charges assigned to a fine mesh. Such trapping is unphysical since, quantum mechanically, confinement keeps the ground electron state high in the Coulomb well. The artificial charge trapping increases the resistance of the source/drain regions and modifies the depletion layer resulting in artificial lowering of the threshold voltage. Another detrimental effect of this charge trapping in classical simulations is the strong sensitivity of the quantity of trapped charge to the mesh size. If a finer mesh is used, better resolving the singular Coulomb potential well, the amount of trapped charge increases. Fig. 2 (a) The position of discrete random dopants obtained from the output of an atomic scale process simulation and (b) a typical 3D potential distribution reflecting the impact of random discrete dopants in a typical 35 nm n-channel MOSFET Attempts to correct these problems in atomistic simulations have been made by charge smearing [19] or by splitting of the Coulomb potential into short- and long-range components based on screening considerations [18]. The charge smearing approach is however purely empirical and can result in a loss of resolution with respect to atomistic scale effects. The splitting of the Coulomb potential into shortand long-range components also suffers from drawbacks including the arbitrary choice of the cut off parameter and the potential double counting of the mobile charge screening. The depth of the well in the long range potential at the point charge is also much larger than the ground state in the coulomb well and still could result in substantial charge

5 J Comput Electron (2009) 8: trapping. The use of DG quantum corrections capture accurately not only the confinement effects in the channel but the confinement in the Coulomb potential well associated with individual discrete dopants. By adjusting the effective mass parameters it is possible to calibrate the Density Gradient simulations against rigorous 3D NEGF simulations [13] and we were able to reproduce accurately the quantum mechanical charge distribution around a single dopant in the channel of a nanowire MOSFET shown in Fig. 3 [14]. The reduction in mesh sensitivity when using DG corrections in the DD simulation is illustrated in the simulation of an atomistic silicon resistor with donor concentration N A = cm 3, representative of the MOS- FET source and drain regions. Figure 4 illustrates the mesh size dependence of the statistically simulated ohmic currentvoltage characteristics of the resistor. In the purely classical atomistic simulations the resistance increases with the re- duction of the mesh spacing while in the DG simulations the resistance is practically mesh spacing independent, although slightly higher than the resistance corresponding to continuous doping simulations. This slight increase in the resistance, associated with some remaining, but mesh size independent, degree of charge trapping, could be compensated for by adjustment of the doping concentration dependence of the mobility. For the accurate atomistic simulation of a MOSFET it is also important to consider the trapping of holes in the channel region when atomistic acceptors are considered. This trapping leads to a change in both the size and shape of the depletion region, which in turn alters the characteristics of the simulated device by reducing, for example, the threshold voltage. The smoothing effect of the DG approximation can be seen in Fig. 5 which shows the potential profile, taken from the interface down through the bulk of a nm n-channel MOSFET. Figure 5(a) shows the classical potential in which the sharply resolved potential of individual dopants can be observed, Fig. 5(b) shows the smoothed quantum potential obtained from DG for the same device Line edge roughness Fig. 3 Electron concentration along the centre of a nanowire MOS- FET with a dopant in the middle of the channel for different gate voltage, V G, comparing density gradient simulations with non-equilibrium Green s functions Line edge roughness (LER) illustrated in Fig. 6(a) caused by tolerances inherent to materials and tools used in the lithography processes is yet another source of fluctuations that needs close attention. It will be increasingly difficult to reduce LER below the current level of approximately 5 nm, which is limited by the molecular dimensions in the photoresist used in the 193 nm lithography systems, and therefore will be an increasingly important source of intrinsic parameter fluctuations in the future [20]. The method used to generate random junction patterns is based on a one-dimensional (1-D) Fourier synthesis that Fig. 4 I-V characteristics of a nm resistor comparing continuous doping distribution with atomistic averages for classical and DG simulations for different mesh spacing

6 354 J Comput Electron (2009) 8: Fig. 5 Vertical 2D profile of the classical electrostatic potential in a 30 nm atomistic MOSFET with (a) drift-diffusion and (b) density gradient for electrons and holes generates gate edges from a power spectrum corresponding to a Gaussian autocorrelation function. The parameters used to describe this gate edge are the correlation length,, and the rms amplitude,. The rms amplitude can be thought of as standard deviation of the x-coordinate of the gate edge if we assume that the gate edge is parallel to the y-direction. In most cases the value quoted for LER is traditionally defined as three times the rms amplitude (i.e. 3 ). The correlation length is obtained by fitting a particular type of autocorrelation function to the gate edge line. The algorithm for generating a random line creates a complex array of N elements whose amplitudes are determined by the power spectrum obtained from a Gaussian autocorrelation function. S G asshownin(7) is the power spectrum for a Gaussian auto- Fig. 6 (a) Typical LER in photoresist (Sandia Labs.) and (b) potential distribution in a 35 nm MOSFET subject to LER correlation function where k = i(2π/n,dx) is the discrete spacing used for the line and 0 i N/2. S G (k) = πδ 2 e k2 2 /4 The phases of each of the elements is selected at random which makes each line unique, however only (N/2)-2 elements are independent while the rest are selected through symmetry operations so that after an inverse Fourier transform the resulting height function, H(x)will be real. An example of the impact of LER on the potential distribution of the35nmtransistorusedalsoasanexampleinfig. 2(b) is illustrated in Fig. 6(b). (7)

7 J Comput Electron (2009) 8: Polysilicon granularity The polycrystalline granular structure of the polysilicon gate has also been identified as an important source of intrinsic parameter fluctuations [21 24]. Enhanced diffusion along the grain boundaries and localised penetration of dopants through the gate oxide into the channel from the high doping regions in the gate are potential sources of variability [25]. However, the most significant source of fluctuations within polysilicon gates is likely to be Fermi level pinning at the boundaries between grains due to the high density of defect states [26]. In order to introduce a realistic random grain structure in the simulations, a large AFM image of polycrystalline silicon grains [27],showninFig.7(a), has been used as a template. The grain boundaries in this image were traced in black in Adobe Illustrator leaving the grains white. The polysilicon grain size distribution depends strongly on the deposition and annealing conditions. In our simulations the image is scaled so that the average grain diameter can replicate an experimentally observed average diameter, and then a rasterised template image is saved in a format readable by the simulator. The simulator imports a random (in both location and orientation) section of the grain template image that corresponds to the gate dimensions of the simulated device. It pins the Fermi level along any grain boundaries, defined by black pixels in the image, detected in the template section. The typical device dimensions simulated are much smaller than the dimensions of the template image, meaning that a large number of completely independent grain patterns can be extracted and used for the simulation of each different device in the statistical ensemble. The energy position of the Fermi level pinning can be varied in the simulations. Figure 7(b) illustrates the impact of the surface potential pinning on the potential distribution in the same 35 nm MOSFET previously used as an example Other sources of variability The introduction of high-κ/metal gate technology improves the RDD-induced variability due to the reduction in the equivalent oxide thickness and removes the PSG effects. At the same time it introduces high-κ granularity illustrated in Fig. 8(a) and variability due to work-function variation due to the metal gate granularity illustrated in Fig. 8(b) [28]. In extremely scaled transistors atomic scale interface roughness illustrated in Fig. 8(c) [29] and corresponding body thickness variations [30] can become an important source of statistical variability. 2.3 Validation of the drift-diffusion simulation methodology The validation of our simulation technology is done in comparison with measured statistical variability data in 45 nm Fig. 7 (a) An SEM micrograph of typical PSG [27] and(b) Potential distribution in a 35 nm MOSFET subject to PSG LP CMOS transistors [31]. The simulator was adjusted to accurately match the carefully calibrated TCAD device simulation results of devices without variability by adjusting the effective mass parameters involved in DG formalism, and the mobility model parameters. The calibration results are shown in Fig. 9, where low and high drain bias stand for 50 mv and 1.1 V respectively. The simulation results for the standard deviation of the threshold voltage introduced by individual and combined

8 356 J Comput Electron (2009) 8: sources of statistical variability are compared with the measured data in Table 1. In the n-channel MOSFET case the accurate reproduction of the experimental measurements necessitates the assumption that, in addition to RDD and LER, the PSG related variability has to be taken into account. Good agreement has been obtained assuming that the Fermi level at the n-type poly-si gate grain boundaries is pinned in the upper half of the bandgap at approximately 0.35 ev below the conduction band of silicon. However, in the p- channel MOSFET case the combined effect of just the RDD and LER is sufficient to reproduce accurately the experimental measurements. The reason for this is the presence of acceptor type interface states in the upper half of the bandgap which pin the Fermi level in the case of n-type poly-si, and the absence of corresponding donor type interface states in the lower part of the bandgap which leaves the Fermi level unpinned in the case of p-type poly-si [32]. 2.4 Predicting the future Fig. 8 (a) Granularity in HfON high-κ dielectrics (Sematech), (b) metal granularity causing gate work-function variation and (c) interface roughness (IBM) In order to foresee the expected magnitude of statistical variability in the future we have studied the impact of RDD, LER and PSG on MOSFETs with 35 nm, 25 nm, 18 nm, 13 nm and 9 nm physical gate length. The scaling of the simulated devices is based on a 35 nm MOSFET published by Toshiba [33] against which our simulations were carefully calibrated. The scaling closely follows the prescriptions of the ITRS in terms of equivalent oxide thickness, junction depth, doping and supply voltage. The intention was also to preserve the main features of the reference 35 nm MOSFET and, in particular, to keep the channel doping concentration at the interface as low as possible. Figure 10 shows the structure of the scaled devices. More details about the scaling approach and the characteristics of the scaled devices may be found in [34]. Figure 11(a) compares the channel length dependence of σv T introduced by random dopants, line edge roughness and poly-si grain boundaries with Fermi level pinning. The average size of the polysilicon grains was kept at 40 nm for all channel lengths. Two scenarios for the magnitude of LER were considered in the simulations. In the first scenario the LER values decrease with the reduction of the channel length following the prescriptions of the ITRS. In this case the dominant source of variability at all channel lengths are the random discrete dopants. The variability introduced by the polysilicon granularity is similar to that introduced by random discrete dopants for the 35 nm and 25 nm MOSFETs, but at shorter channel lengths the random dopants take over. The combined effect of the three sources of variability is also shown in the same figure. In the second scenario LER remains constant and equal to its current value of approximately 4 nm the results for the 35 nm and the 25 nm MOSFETs are very similar to the results with scaled LER but below 25 nm channel length LER rapidly becomes the dominant source of variability. Figure 11b is analogous to Fig. 11(a) exploring the scenario when the oxide thickness, which is difficult to scale

9 J Comput Electron (2009) 8: Fig. 9 Top: structure of the simulated 45 nm LP technology transistors; Middle: Agreement between the commercial TCAD and the Glasgow atomistic simulator results; bottom potential distribution in one of the simulated 200 microscopically different characteristics in the presence of RDD, LER and PSG

10 358 J Comput Electron (2009) 8: Table 1 σv T introduced by individual and combined n-channel MOSFET p-channel MOSFET sources of statistical variability σv T [mv] σv T [mv] σv T [mv] σv T [mv] (V DS = 0.05 V) (V DS = 1.1 V) (V DS = 0.05 V) (V DS = 1.1 V) RDD LER PSG Combined Experimental Fig. 10 Examples of realistic conventional MOSFETs scaled from a template 35 nm device according to the ITRS requirements for the 90 nm, 65 nm, 45 nm, 32 nm and 22 nm technology generations, obtained from process simulation with Taurus Process further, even with the introduction of high-κ gate stacks will remain stagnated at 1 nm. This will lead to an explosion in the threshold voltage variability for bulk MOSFETs with physical channel length below 25 nm. Thin-body SOI transistors tolerate very low channel doping and therefore are resilient to the main source of statistical variability in bulk MOSFETs, the RDD. At the same time very good electrostatic integrity and the corresponding reduction of the threshold voltage sensitivity on channel length and drain voltage also reduces their susceptibility to LER induced variability. However the introduction of a high-κ gate dielectric and the corresponding relatively high density of fixed and trapped charge (FTC) introduces unwanted variability, which can neutralise the benefits obtained from low channel doping and reduced short channel effects. Figure 12 illustrates the impact of FTC with different areal density on the potential distribution in 32 nm ultrathin body (UTB) silicon-on-insulator (SOI) MOSFETS described in detail elsewhere [35]. The simulation results of the impact of RDD, LER and FTC with different areal densities on threshold voltage variation are summarised in Table 2. 3 Monte Carlo simulations 3.1 Ab initio ionised impurity scattering Monte Carlo (MC) simulations are needed when studying current variability in nanoscaled MOSFETs for two rea- Fig. 11 (a) Channel length dependence of σv T introduced by random dopants, line edge roughness and poly-si granularity: (A) LER scales according ITRS; (B) LER = 4nmand(b) Channel length dependence of σv T introduced by random dopants, line edge roughness and poly-si granularity: (A) t ox scales according ITRS; (B): t ox = 1nm sons. Firstly, the DD simulation cannot properly represent the non-equilibrium, quasi-ballistic transport in contemporary sub-50 nm MOSFETs. Secondly, the DD simulations

11 J Comput Electron (2009) 8: Table 2 Summary of simulation results with trapped charges 32 nm σv T (mv) 22 nm σv T (mv) V ds V ds V ds V ds (50 mv) (1.0 V) (50 mv) (1.0 V) Trap (1e11 cm 2 ) Trap (5e11 cm 2 ) Trap (1e12 cm 2 ) accurately capture the electrostatic impact of the different variability sources but have conceptual problems in resolving their impact on transport and therefore on the on-current variability. Transport variation may be naturally included within 3D MC via the propagation of carriers within the unique potential landscapes resulting from random device configurations. Scattering is then no longer treated as an instantaneous event, as is traditionally the case when considering scattering rates within MC, but is instead recovered from particle trajectories extended over time. Such an ab initio scattering approach will necessarily include dynamic screening effects, simultaneous scattering from multiple sources of variability as well as scattering from interactions within the carrier ensemble itself. (Note that ab initio is used here in the general sense of the term to describe the scattering in MC, and should not be confused with the specific meaning adopted for use with respect to electronic structure calculations.) The electrostatic modulation in carrier density captured within DD simulations will be recovered in MC. However, accuracy demands that both the interaction potential and the carrier propagation be accurately resolved Implementation of short range corrections Fig. 12 Typical potential profiles corresponding to trap charge with sheet density at (a) cm 2, (b) cm 2, and (c) cm 2 In the case of ionised impurity scattering, which represents the source of largest variation within conventional (bulk) MOSFETs [17], the interaction potential is the unscreened Coulomb potential of the RDD. The long-range component of this potential is accurately determined by the mesh-based solution of Poisson s equation in which ionised impurities are represented as point charges. Due to aliasing in this solution however, the potential within a few mesh spacings of a point charge is under represented and needs to be corrected. This is also needed in order to avoid the artificial carriertrapping in Coulomb wells due to the classical treatment of the particles, as discussed in Sect. 1. Short-range corrections could be introduced via a molecular-dynamics-like approach in which short-range particle-particle interactions are evaluated directly, the so-called P 3 M algorithm [36]. Using this method, efficient evaluation of long-range forces is obtained from the mesh-based potential. This additionally includes contributions from all applied external biases as well as effects associated with changes in dielectrics throughout the

12 360 J Comput Electron (2009) 8: device structure. A short-range correction for all interactions within a certain radius then accurately accounts for the total interaction. Care must be taken to avoid double counting the short-range interaction as it is partly resolved by the mesh. It is therefore necessary to approximate and remove this mesh-based contribution [36, 37]. With minimal effort spent in sorting the simulated particles, searching for nearest neighbour interactions may be optimised [36]. For the short-range interactions we adopt a well-tested analytical model, (8) [36], defining the interaction at separation r from a point charge. It agrees with the long-range Coulomb field at large separation but reaches a maximum at characteristic radius r = r c. At radii smaller than this cut-off radius the field decreases to zero, removing the rapidly varying short-range component and the potential singularity and reducing the artificial carrier trapping. E(r) = qr 4πε 0 ε r (r 2 + 2r 2 c )3/2 (8) Increasing r c improves numerical integration but reduces the contribution of the short-range Coulomb scattering. However, resolving short-range collisions is necessary for the accurate direct treatment of ionised impurity scattering and so choosing r c is a compromise between maximising the short-range interaction while minimising propagation errors. As a means of quantifying the impact of this shortrange correction approach, simulation of Rutherford scattering of electrons was studied using values of r c in the range of 0 2 nm. Figure 13 shows the corresponding scattering angle dependence upon impact parameter for propagation with t = 0.1 fs. The repulsive interaction with the negative charge is again well reproduced over all cutoff radii and closely follows the Rutherford result, while the reduction in maximum scattering angle with increasing r c is seen in the attractive interaction. Based upon this, we adopt r c = 0.5nm to maximise scattering with a propagation time step of 0.1 fs to maximise efficiency. The reproduction of the field concentration dependent bulk mobility in Silicon is a reasonable validation test for the ab initio ionised impurity scattering approach. Simulation of a series of simple n + n-n + diodes containing around 15,000 donors within the central bulk region was performed in this regard and the size of the simulation region was changed accordingly. The resultant potential distributions for donor concentrations of 10 15,10 16,10 17 and cm 3 are shown in Fig. 14 and clearly indicate the mesh resolved potential fluctuation associated with the random distribution of donors. Mobility estimated from the ratio of average velocity to average field within the central bulk region is plotted in Fig. 15 together with results of similar MC device [38] and molecular dynamics [39] simulations. It is seen that the electron-donor interaction is well Fig. 13 Scattering angle dependence upon impact parameter for various values of r c Fig. 14 Potential distribution from ab initio MC simulation of n + n-n + diodes

13 J Comput Electron (2009) 8: Fig. 15 Simulated bulk mobility compared with experimental results reproduced and that it compares well with the other reported results Impact on on-current variability Drain current variation associated with RDD was estimated via statistical DD and both frozen-field (FF) and selfconsistent (SC) ab initio MC at both low and high drain bias for a series of realistic, scaled devices. The standard deviation of the drain current distribution as a function of device channel length is shown in Fig. 16. In each case, and consistently with previously published results [17], the distribution in drain current variation increases with the reduction of the gate length. It is also seen that the MC simulation with ab initio ionised impurity scattering consistently yields greater variation compared with corresponding DD results. This is attributed to the additional position dependent variation in transport accompanying the electrostatic variation in electron density from device to device. At low drain bias, V D = 0.01 V, the frozen-field and selfconsistent MC results are in good agreement, reproducing the same trend and justifying the use of the frozen-field approximation in this regime. The frozen field results consistently show a slightly larger current variation but the difference does not exceed more than 6 7% over the whole channel length range. This difference may be related to the overestimation of the Coulomb potential screening in the static screening inherent to the DD simulations used to deliver the potential landscape for frozen field MC simulations. Since DD simulation only captures the electrostatic variation, the contribution of transport variation to the total drain current variation can be inferred if it is assumed the electrostatic contribution within MC simulation is well reproduced Fig. 16 Percentage drain current variation as a function of channel length from DD simulation and frozen field and self-consistent ab initio MC. The contribution from transport variation within MC is shown in the inset by DD simulation. This approximation fails if the dynamic screening of impurities by electrons within the ab initio MC simulation significantly differs from the static screening within DD. Within frozen-field simulation the electrostatic potential is identically that from DD and the simulated electron dynamics do not alter the electron distribution around acceptor ions and hence the screening of their Coulomb potential. Within self-consistent simulations, the electron distribution around acceptor ions is determined by the carrier dynamics and the corresponding dynamic screening is captured by the self-consistent solution of the Poisson equation. The percentage contribution of transport variation to the total drain current variation from MC simulation is then determined and plotted as an inset to Fig. 16. While results of current variation from MC simulation are always larger than that of DD, their comparison differs at low and high drain bias and will be discussed separately. The correlation of percentage drain current variation from self-consistent ab initio MC simulations and DD simulations for each device within a statistical ensemble of 100 devices is plotted in Fig. 17. The correlation coefficient is also indicated in the figure and is rather high (correlation coefficient on the order of 0.98) at the largest gate lengths, while decreasing very slightly with decreasing gate length. Correlation is to be expected since the electrostatic influence of the random acceptor configuration is the same within both DD and MC simulations. The spread in data reflects the influence of the acceptor configuration on electron transport. While some impurity configurations give rise to similar electrostatic variation in current, their impact on scattering may vary greatly. The slight reduction in correlation at smaller

14 362 J Comput Electron (2009) 8: of combined variation in the MC simulations indicate that the percentage of the total variation associated with transport in the high drain bias case is less than at low drain bias. This is highlighted in the inset of Fig. 16 where transport variation accounts for, at most, around 25% of the total. The reason for this decrease of the transport related variability is twofold. At higher drain bias the average energy of the carriers in the channel is higher and the ionised impurity scattering, the source of the transport variation, is less effective. 3.2 Robust density gradient quantum corrections Quantum confinement is increasingly important in contemporary MOSFETS and has to be accurately captured not only in DD but also in MC simulations [40]. Several techniques have been implemented before with varying success. We have opted to use in the MC module the same Density Gradient (DG) approach already implemented in the DD module of the Glasgow atomistic simulator Implementation Fig. 17 Correlation of DD and MC estimated drain current variation at low drain over the entire device ensembles gate lengths indicates that scattering can become increasingly sensitive to variation in dopant positions. Figure 16 also reveals that at a high drain bias of V D = 0.8 V the current variation estimated by DD simulations are larger compared with DD results at low drain bias. The MC simulations again reveal more variation compared to the DD simulations, but show less variation compared to the low drain bias MC results. In this case the self-consistent MC simulation yields larger variation compared to frozen field simulations, though again both recover the same trend and the results are comparable. The increase of electrostaticassociated variation in the DD simulations and the reduction Density Gradient quantum corrections [9] have been incorporated within the 3D MC module following three approaches, each introducing an increasing degree of selfconsistency between transport, field and the quantum corrections. These approaches are illustrated in Fig. 18. Inthe frozen field approach (Frozen Field Monte Carlo FFMC) the DG effective quantum potential solution from 3D quantum corrected DD is used in the MC module as the sole driving force for the particles and is never updated. This approach targets low drain voltage (V D ) MOSFET operation in the linear regime where non-equilibrium transport effects are negligible. The greatest benefit of FFMC is its computational efficiency allowing for transport variability to be studied over large statistical samples. Simulation at higher V D, aiming to capture non-equilibrium transport effects, requires the field to be updated self-consistently with the carrier distribution over the course of the MC simulation. This particle-field self-consistency is at the heart of the frozen quantum corrections approach (Frozen Quantum Monte Carlo FQMC). In this approach a quantum correction term, ψ qc, defined as the difference between the classical and effective quantum potential from an initial DD solution, is calculated for each mesh point. During selfconsistent MC simulation, the quantum corrected driving force F q is then calculated based upon the classical potential, ψ cl, using: F q = (ψ cl + ψ qc ) (9) In the third, fully self-consistent approach (Self-Consistent Quantum Monte Carlo SCQMC), the above quantum correction term is updated periodically during the course of the

15 J Comput Electron (2009) 8: Fig. 18 Flowchart showing the computational steps needed for FFMC, FQMC and SCQMC self-consistent simulation. Time averaging is used to smooth out the inherently noisy carrier distribution that usually restricts the use of DG corrections in MC. The quantum correction is updated by first solving the modified DG equation [41] for the quantum density, n q : 2bn ( 1 2 S n S n m nx x S n m ny y ) S n m nz z 2 = φ n ψ t + k BT q ln(s2 n ) (10) Again, S = n q /n i, the other symbols have their usual meaning, and... t denotes a time-averaged value. Equation (10) is discretised using a finite box method; the corresponding system of equations is linearised and solved using a Red-Black Successive Over-Relaxation (SOR) iterative scheme, which is amenable to parallelisation. A Maxwell- Boltzmann equation of state is assumed [42], and ψ n is updated using: φ n = ψ cl + ψ qc t k BT q ( ) ln nmc t n i (11) where n mc is the electron distribution obtained from a cloudin-cell assignment of the MC particles to the mesh. From the new distribution of n q, obtained by solving equation (10), a new quantum correction term is calculated using: ψ qc = φ n + k ( ) BT q ln nq ψ cl t (12) n i This may then be applied within self-consistent MC as in (9).AsshowninFig.18, the update of ψ qc is carried out self-consistently with Poisson s equation and the propagation/scattering routines in the MC engine throughout the course of the simulation. This implementation is similar in spirit to the Schrödinger-based quantum correction scheme in [42]. The quantum correction is not updated during the initial transient period to avoid excessive noise in the calculation and, due to the averaging, the SCQMC technique is not suitable for transient simulations. The quantum correction is typically updated every few 100-fs. For the self-consistent FQMC and SCQMC simulations, careful implementation of the Ohmic particle contacts in the source and drain regions is essential in order to avoid instabilities and a build-up of a space-charge region that can destabilise the simulation. Carriers reaching the contact boundary are removed and replaced in order to maintain local charge neutrality and to ensure that the difference in ψ n between the source and drain contacts is equal to the applied drain bias. In the case of classical MC simulations, different approaches to carrier injection have been implemented, from sophisticated techniques to the use of reservoir contacts in the place of planar ones. However, the inclusion of

16 364 J Comput Electron (2009) 8: Fig. 19 Comparison of I D V G characteristics from DD, FFMC, FQMC and SCQMC at V D = 1mVandV D = 0.7 Vin the absence of interface roughness showing an excellent agreement for all, except for FFMC at low V D which underestimates I D Table 3 Dimensions and doping of the double gate device studied, with channel doping of cm 3 Architecture Channel Length (L chan ) Device Width Silicon Thickness (t Si ) Oxide Thickness (t ox ) Source/Drain Doping Channel Doping Double Gate 20 nm 20 nm 3.3 nm 1.05 nm cm cm 3 quantum corrections alters the confined carrier distribution, shifting the peak away from the semiconductor/oxide interface, and can complicate carrier injection when the contact is adjacent to a confined system. Therefore, Neumann BCs [43, 44] have been implemented at the Ohmic contact regions similar to the techniques used in NEGF simulations [14], which help maintain stability in the simulation. The validity of the three self-consistency schemes introduced above is evaluated in comparison with DD simulations for the device with dimensions shown in Table 3. Figure 19 compares the I D V G characteristics at low and high V D obtained using all simulation methodologies. Here, FFMC fails to accurately reproduce the value of I D achieved by the other MC methods and the calibrated DD simulation, particularly at high drain voltage. The explanation of this can be found in Fig. 20 which compares the velocity distribution along the channel from the three different MC approaches, along with the quantum corrected potential obtained from the FQMC for V D = 0.7 V,V G = 0.8 V.The lack of self-consistency in the FFMC simulations results in the incorrect velocity at the source end of the channel and underestimation of the current at high drain voltage. At the same time, the good agreement between FQMC and SC- QMC suggests that the self-consistency of the quantum cor- Fig. 20 Velocity profiles at V D = 0.7 V for all versions of the MC simulator, along with the quantum corrected potential from FQMC. In FFMC the carriers fail to react to changes in the field, and thus the velocity profile is incorrect rections in this case is not important, and the V T shift and the quantum carrier distribution at the source end of the channel, which do not change significantly with the applied drain voltage, are the main effects that need to be captured [45]. As the FFMC simulation does not involve the self-consistent solution of Possion s equation the simulation time is relatively short (a few hours). The self-consistent FQMC and SCQMC simulations take substantially longer (up to one week) Application to ab-initio impurity scattering The incorporation of DG quantum corrections in the MC module creates interesting opportunities for consistent handling of the ab-initio impurity scattering. The effective quantum potential from the density gradient solution surrounding a point charge is compared in Fig. 21 with the potential corresponding to the short-range force model used in

17 J Comput Electron (2009) 8: Fig. 23 Potential distribution throughout the simulated bulk resistor structure comparing the classical potential (top) with the density gradient resolved potential (bottom) Fig. 21 Comparison of the density gradient solution surrounding a point charge with the analytical short-range model used in ab initio ionised impurity scattering Fig. 22 Comparison of simulated Rutherford scattering using analytical short-range correction and density gradient mesh solution the ab initio ionised impurity scattering. The two are in a very close agreement for mesh spacing below 1 nm, which implies that the derivative of the effective quantum potential can be used as a particle driving force instead of (8). This assumption needs validation similar to the validation of the short-range correction model. Figure 22 shows results of the scattering angle dependence for thermal electrons interacting with both a posi- tive and negative central ion indicating a close agreement between the effective quantum potential and the analytical short-range interaction model. In both models the scattering angle closely agrees with the Rutherford model over the complete range of impact parameters in the case of a repulsive interaction with a negative ion, while significant underestimation of the scattering angle is seen at small impact parameters for attractive interactions. Further validation requires the reproduction of experimental concentration-dependent bulk mobility using the previously described simulation of atomistically doped resistor structures. However, such simulations using the effective quantum potential are limited by practicality to small, highly doped simulation domains due to the upper limit of 1 nm on the mesh spacing. We therefore extend previous results of the self-consistent simulation of an n + n-n + diode with central bulk doping of cm 3, relevant to the channel of modern nanoscale bulk MOSFETs. Mobility results were obtained by averaging 10 simulations with unique random dopant configurations. The classical electrostatic potential is compared with the effective quantum potential from density gradient for one such simulated structure in Fig. 23.The effective quantum potential is seen to smooth the peaks associated with the donor impurities and limit their interaction with electrons as expected. The simulated mobility is plotted in Fig. 24 and compared with experimental data and previous ab initio results obtained using the short-range correction. Good agreement is seen with experimental data and with the continuation of the trend of the prior simulation results. 4 Non-equilibrium Green s function simulations When the nano-cmos devices reach sub-10 nm dimensions, not only quantum confinement effects but also source-

18 366 J Comput Electron (2009) 8: Fig. 24 Simulated bulk mobility using density gradient mesh resolved interaction alone. Previous results using an analytic short-range correction are shown for comparison to-drain tunnelling will start to affect their performance. Although the DG approach described in the previous two sections can cope successfully with the impact of quantum confinement on the operation and the performance of contemporary CMOS transistors it conceptually cannot accurately model source-to-drain tunnelling. Therefore for sub-10 nm transistors the development of a full-scale quantum transport simulator becomes a necessity. The non-equilibrium Green s Function (NEGF) formalism is a well-established technique for quantum transport simulation. It has certain advantages if scattering also needs to be included in the realistic simulation of nano-cmos transistors. 4.1 Implementation In the quantum transport module of the Glasgow atomistic simulator the carrier transport is described using the NEGF approach, which is a generalisation of Landauer s formalism [46] to treat many body systems at room temperature in the context of the one particle Green s function. The Hamiltonian used in the discretisation of the NEGF equations is an effective-mass Hamiltonian that folds the full crystal interaction into the electron effective masses. The effective masses of the transport valleys are extracted from Tight Binding calculations that capture the dependence of the electron band structure on the nanowire diameter [47]. Sources of incoherent scattering such as phonon interaction, and the corresponding self-energies, are not currently included in the NEGF module. We calculate the correlation matrix, G <, using the recursive algorithm described in [48]. Fig. 25 Flow chart of the NEGF simulation process From the correlation matrix, the electron and current densities are calculated by the following equations: n(e, x) = ig < (E,x,x) (13) J(E,x)= i qh 2m ( )G < (E,x,x ) (14) x=x The boundary conditions of the Green s function equations at the contacts, which are given through the contact selfenergies, are defined using the algorithm described in [49]. Figure 25 shows the flow chart of our simulator illustrating the computational procedure used to solve the coupled Poisson-NEGF equations. The electrostatic potential and the electron density obtained from a density gradient (DG) solution of the Drift-Diffusion (DD) equations [50] serve as an initial condition for the Poisson-NEGF cycle. The DD solver has Neumann boundary conditions for Poisson s equation in the source and drain instead of the Dirichlet boundary conditions usually used in the DD formalism [14], which matches well with the Green s function boundary conditions. Such close initialisation of the potential distribution at the beginning of the Poisson-NEGF loop drastically reduces the number of NEGF iterations.

19 J Comput Electron (2009) 8: After the first Poisson-NEGF iteration the change in electron concentration from the initial DG solution to the new NEGF solution is moderated by damping. A gradual change in the electron density prevents oscillatory behaviour of the solution around the impurities leading to divergence. The solution instabilities are associated with the extreme sensitivity of the quantum density to the shape of the attractive potential. This is related to the discrete nature of the quasi-bound states and their energy sensitivity to the shape of the potential. We have found that solving the non-linear Poisson equation results in a much more stable convergence of the Poisson-NEGF system than if the linear version is used. Once a new electron density is obtained from the NEGF solver, a quasi-fermi level, f n, is calculated using the new density and the old potential [51]. This quasi-fermi level is used to update the electron concentration and the Jacobian when solving the non-linear Poisson equation iteratively (see Fig. 25). Adaptive damping is used after the solution of the Poisson equation to limit the change in potential and to improve convergence. The alternate solutions of Poisson and NEGF are iterated until density and current converge. This fully-3d self-consistent simulation is computationally very expensive and a single device simulation can take from a few days to over a week to run on a single processor depending on bias conditions and the number of energy levels used. 4.2 Simulation of statistical variability in nanowire transistors We have studied the impact of different variability sources on Si nanowire transistors (NWT). The simulated devices have a 6 nm undoped channel with nm 2 crosssection, 0.8 nm SiO 2 oxide and 10 nm S/D regions doped at cm 3. The transport in the nanowire occurs in the 100 direction. The nanowire diameter-dependent effective masses are extracted from sp 3 d 5 second-neighbour-basis tight-binding calculations [47]. All the simulations in this work have been done at room temperature. The oxide thickness is 0.8 nm and is not included in the NEGF solution region but is included in the electrostatic potential calculation. We do not consider charge penetration in the oxide. Nevertheless the electrostatic potential at the interface (which includes the conduction band offset of the oxide) is given as a boundary potential in the calculation of the electron density using the NEGF. The electron concentration is not forced to zero at the discretisation point at SiO 2 interface, but in the next discretisation point inside the oxide, providing a softer boundary condition, which allows the electron wave function to interact with the interface Impact of single donors Firstly, we study a single donor located at the middle of the channel of a nanowire MOSFET transistor at different screening conditions. The importance of studying a single donor is twofold: it is relatively easy to isolate the resonances coming from a single donor compared to the case of several dopants, which produce complex interference patterns and common resonances; secondly, the screening by conducting electrons around the single impurity under strong quantisation conditions, and also the self-consistent electrostatic potential, can be investigated in isolation from the influence of other fixed charge sources. All simulations in this subsection were carried out close to equilibrium at V D = 1 mv in order to study more easily the charge density around the impurity. Figure 26 maps the 3D self-consistent potential and electron density distribution along the wire at V G = 0.4 V showing also the equipotential/equiconcentration lines. The equipotential contours around the dopant are denser along the channel direction showing a higher degree of screening in this direction compared to the orthogonal direction. The screening electron concentration extends for several nanometres from the impurity centre along the channel direction. This is formed by resonances (extended states) connecting the source and drain. The 1D electrostatic potential and the electron concentration distribution along the channel in the middle of the cross-section, for different gate voltages, are shown in Fig. 27. Note the inverse sombrero shape of the potential in Fig. 27(a), which is a combination of the Coulomb potential of the ionised donor and the potential associated with the electron screening charge. This double barrier shape produces quasi-bound states similar to those that appear in resonant tunnelling structures. At low gate bias the electrons are repelled from the channel, therefore the electron density Fig. 26 3D potential and density for the device with the donor at the middle

20 368 J Comput Electron (2009) 8: Fig. 28 Transmission coefficients at different VG Fig. 27 Self-consistent electrostatic potential (a) and electron density (b) along the wire at different VG around the impurity is very low. At high gate bias the potential barrier of the channel decreases. As a consequence, the electrons penetrate the channel and therefore contribute to the screening of the impurity. At gate voltages lower than 0.3 V the electron concentration at the impurity position is negligible compared to the source/drain (S/D) doping. This, however, does not indicate an absence of the resonances, as they can be clearly seen in the transmission coefficients illustrated in Fig. 28 at different gate bias conditions. The transmission coefficient contains one resonance (or quasibound state) at the onset of each sub-band s conductance. This resonance can be clearly seen in the density of states plot in Fig. 29 along the middle of the wire for the first sub-band. The energy resolution of this plot is 0.1 mev. The impurity potential of Fig. 27(a) introduces transmission channels, which increase the current in this device when compared with the impurity-free device. Fig. 29 Density of states along the middle of the wire for the first sub-band Discrete dopants in the source and drain In this section we study the effect of the discreteness of dopants in the S/D on the performance of the Si nanowire transistor. The discrete dopants are located in a 4 nm extension of the S/D regions preserving the same average doping as in the previously homogeneously doped source/drain regions. The total length of the wire simulated is ( ) nm = 26 nm, where the five numbers represent the length of the different regions into which the device is subdivided. The 6 nm regions on the far left (source) and right (drain) represent regions of continuous doping, which guarantee smooth contact injection self-energies and charge neutrality on the contacts. The 4 nm regions are where the discrete dopants are located. The central 6 nm region is the gate or channel region.

21 J Comput Electron (2009) 8: Fig. 30 I D V G characteristics, on linear and logarithmic scales, for the smooth device and the three different dopant configurations Fig. 31 Transmission probability at V G = 0.3 V, for the smooth device and the three different dopant configurations We have studied three cases with different spatial dopant arrangements denoted Ra, Ch and Cr for randomly arranged, channel aligned and cross-section aligned donor placements respectively. The Ch case has been chosen to enhance the injection of electrons in the channel. In the Cr case, the channel injection diminishes because electrons are naturally repelled from the interface by quantum confinement effects. The simulations are done at V D = 0.05 V. Figure 30 shows the I V characteristics for the smooth (continuous doping), Ra, Ch and Cr devices. There is an average threshold voltage shift of approximately 20 mv due to the discrete dopants. The sub-threshold slope is worse in the Ch case due to poor gate control of the charge which is concentrated, in this case, along the middle of the wire. The Ra case has almost identical subthreshold slope compared to the smooth case. The effect of the discreteness of the impurities on the oncurrent is more dramatic. Compared to the smooth device the on-current falls by approximately 70% in the Cr case, and by approximately 27% in the Ch case. The detailed explanation of this behaviour is based on an analysis of the corresponding transmission coefficient as a function of energy illustrated in Fig. 31 for the four devices considered in this work at V G = 0.3 V. The presence of resonances in the transmission coefficients is typical for devices with discrete donor dopants, since there are electrons partially reflected by the impurity potential, decreasing the total transmission. This partial reflection of the electrons can be considered as coherent scattering from the impurity potential. The integrated transmission is quite similar for the Ch and Cr cases, and therefore the current is almost the same. The transmission of the Ra configuration shows less backscattering, higher transmission and therefore produces a higher current compared to the other two discrete cases Random dopants in source and drain The random dopants have been introduced in a4nmregion of the S/D leads between the channel and the continuously doped S/D regions next to the contacts. Each Si lattice site in these regions is considered and whether this site has a dopant or not is determined using the same rejection technique used for the DD simulations. The total number of dopants in the discrete dopant regions closely follows a Poisson distribution. The charge of each dopant is distributed to the surrounding nodes of the discretisation mesh using the cloud-in-cell technique. The region with continuous doping between the discrete dopant regions and the contacts guarantees a homogeneous injection into the source/drain from the reservoirs. Due to the significant computational burden associated the 3D NEGF approach, and its slow convergence in the presence of attractive impurity potentials, the statistical simulation study has been restricted to a small statistical sample of 30 randomly generated device configurations. All simulations were carried out at V D = 1 mv in the linear mode of device operation. Figure 32 shows, on a linear and logarithmic scale, the current-voltage characteristics of the 30 microscopically different NWTs with different RDD (Random Discrete Dopant) configurations. The nanowire with continuous doping (labelled as smooth in the figure), and one with no dopants at all in the random dopant regions, are shown for comparison. At V G < 0.3 V, which marks the transition between the subthreshold and the linear region of the transistor operations, the device configurations with a high concentration of discrete dopants located close to the channel lower the gate barrier potential, leading to a higher current than in the smooth case. At V G > 0.3 V the smooth device always delivers a higher current than in the RDD devices. This is mainly associated with the coherent impurity

22 370 J Comput Electron (2009) 8: Fig. 32 I D V G characteristics of 30 microscopically different nanowires with different random dopant configurations scattering in RDD devices, which reduces the current due to partial reflection from the impurity potentials. The degree of backscattering, for a particular RDD configuration, depends strongly on the gate voltage. As a consequence, the on-current in unlucky RDD devices is reduced to as low as 20% of the current for the smooth device. A particular configuration may have low scattering at low V G and high scattering at high V G, or vice versa, relative to other configurations. This sensitivity to the gate voltage is a result of the relative proximity of the discrete dopants to the tail of the channel potential barrier and lead to a crossing of the I D V G curves as can be seen in Fig. 32. There is a variation in the sub-threshold slope of the I D V G curves produced by the different atomistic configurations. Devices with configurations of dopants close to the central axis of the wire, far from the SiO 2 interfaces, will have relatively poor electrostatic control compared with devices with dopants distributed closer to the interfaces and to the channel/source and channel/drain junctions. In addition to the subthreshold slope variation due purely to electrostatics, which have been observed in drift-diffusion simulations, there is an additional contribution from the varying degrees of source-to-drain tunnelling. Figure 33 shows the 3D self-consistent electrostatic potential for the lowest, middle and highest current in the lot, illustrating the localised potential features created by the discrete dopants. The trend observed in the figure is an increase in the current when the impurities are closer to the middle of the channel as they weaken the channel barrier potential. In the presence of RDD in the access regions the average magnitude of the on-current drops by 48% compared to the uniformly doped purely ballistic device. More importantly, despite the absence of channel doping the standard deviation of the on-current is extremely high at 38%. This is beyond the variability level of tolerance for the present circuit design practices. Either the design practices need to be changed to Fig. 33 3D potential for the low, median and high current (from top to bottom) of the random dopant devices at V G = 0.1 V cope with such levels of variability or Schottky source drain contacts have to be considered to remove the doping granularity issues from the extensions Interface roughness In the study of interface roughness the random rough interface between Si and SiO 2 is introduced using the approach described in [52]. Essentially the interface is modelled as a randomly generated surface with exponential autocorrelation function and specified rms amplitude and correlation length selected based on results reported in [53]. The correlation length of the order of 2 nm is similar to the one typically used in Monte Carlo simulations used to reproduce the universal mobility curve [54]. The generated analogue random surface is interdigitised on the scale of one interatomic layer steps. We have assumed rough interface only in the channel and have ignored any roughness between the oxide and the gate material. In order to study the statistical effect associated with the interface roughness the I D V G characteristics of thirty nanowire transistors with different randomly generated interface roughness patterns were simulated and analysed. The collection of individual I D V G characteristics of the different surface roughness device configurations are shown in Fig. 10. The devices with a smooth interface and with the smallest possible cross-section (all the interface roughness steps are in the direction that decreases the body thickness of the channel) are also presented in Fig. 34 for comparison. The three surface roughness cases selected for analysis produce the lowest, median and the second highest current at both low (V G = 0.1 V) and higher (V G = 0.4 V) gate biases. At 2.2 nm body thickness even a small intrusion of the interface into the channel is sufficient to raise the ground state of

23 J Comput Electron (2009) 8: top and the highest current device at the bottom. The impact of the reductions in channel body thickness on the potential distribution can be seen in the figure. This together with the corresponding up-shift in the ground-state sub-band resulting from the increased confinement leads to a decrease in the electron current. 5 Conclusions Fig. 34 I D V G characteristics of 30 microscopically different nanowires with different rough interfaces Fig. 35 3D potential for the low, median and high current (from top to bottom) of the surface roughness devices the transverse wavefunction resulting in the step increases in transmission occurring at higher energies. This effect, together with the roughness induced scattering, means that the current of the rough devices are generally lower compared to that of the smooth device. It is possible to have a rough device, with a higher current than that of the smooth device if there is no overall narrowing of the channel, but the probability for this is very low. The body thickness confinement variation causes a large spread in threshold voltage which (for the 30 devices simulated here) spans 124 mv. In the extreme random roughness case there is a decrease in the on-current by more than 25% compare to that of the smooth device if the threshold voltages are aligned. The 3D distribution of the self-consistent electrostatic potential for the three selected devices at low gate (V g = 0.1V) are shown in Fig. 35 with the lowest current device at the In this paper we have presented the most comprehensive currently available 3D tool for statistical simulation of variability in contemporary and future nano-cmos transistors including drift diffusion, Monte Carlo and non-equilibrium Green s function transport modules. The tool allows the simulation of all of the important sources of statistical variability introduced by discreteness of charge and matter. The DD results accurately reproduce the measured threshold voltage variability in real devices. MC simulations with ab initio ionised impurity scattering are needed to capture properly the transport variability introduced by the random number and position of scatterers in the devices. In the sub-100 nm channel-length range, full-scale quantum transport simulations will be needed to reflect potential contributions from source-to-drain tunnelling. Predictive simulations carried out with the developed tools show that the statistical variability introduced by discreteness of charge and matter has become one of the major concerns for the semiconductor industry. More and more the strategic technology decisions that the industry will be making in the future will be motivated by the desire to reduce statistical variability. The useful life of bulk MOSFETs, from a statistical variability point of view, can be extended below the 20 nm technology mark only if the LER and the equivalent oxide thickness (EOT) could be successfully scaled to the required values. The introduction of fully-depleted SOI MOSFETs, and perhaps FinFETs, will mainly be motivated by the necessity to reduce the statistical variability. This, however, might be jeopardised by other sources of variability associated with the introduction of the high-κ/metal gate stack and increased statistical reliability problems. References 1. Bernstein, K., Frank, D.J., Gattiker, A.E., Haensch, W., Ji, B.L., Nassif, S.R., Nowak, E.J., Pearson, D.J., Rohrer, N.J.: IBM J. Res. Develop. 50, 433 (2006) 2. Brown, A.R., Roy, G., Asenov, A.: IEEE Trans. Electron Devices 54, 3056 (2007) 3. Cheng, B.-J., Roy, S., Asenov, A.: In: Proc. 30th European Solid- State Circuits Conference (ESSCIRC), Leuven, p. 219 (2004) 4. Agarwal, A., Chopra, K., Zolotov, V., Blaauw, D.: In: Proc. 42nd Design Automation Conference, Anaheim, p. 321 (2005)