CMOS Cross Section. EECS240 Spring Dimensions. Today s Lecture. Why Talk About Passives? EE240 Process

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1 EECS240 Spring 202 CMOS Cross Section Metal p - substrate p + diffusion Lecture 2: CMOS Technology and Passive Devices Poly n - well n + diffusion Elad Alon Dept. of EECS EECS240 Lecture 2 4 Today s Lecture EE240 CMOS Technology Dimensions Passive devices Motivation Resistors Capacitors (Inductors Next time: MOS transistor modeling Drawing is not to scale! EECS240 Lecture 2 2 EECS240 Lecture 2 5 EE240 Process Why Talk About Passives? 90nm P7M CMOS Minimum channel length: 90nm level of polysilicon 7 levels of metal (Cu.2 supply Models for this process not real Other processes you might see Shorter channel length (28nm / Bipolar, SiGe HBT SOI EECS240 Lecture 2 3 EECS240 Lecture 2 6

2 Resistors Resistor Temp-Co. Example No provisions in standard CMOS Resistors are bad for digital circuits Minimized in standard CMOS But, often want big, well-controlled R for analog Sheet resistance of available layers: Layer Aluminum Polysilicon N+/P+ diffusion N-well Sheet resistance 60 mω/ 5 Ω/ 5 Ω/ kω/ EECS240 Lecture 2 7 EECS240 Lecture 2 0 How about an N-Well Resistor? oltage Dependence EECS240 Lecture 2 8 EECS240 Lecture 2 Silicide Block Option Layer N+ poly P+ poly N+ diffusion P+ diffusion N-well R/ [Ω/ ] T C [ppm/ o T 25 o C C [ppm/] ,000 B C [ppm/] Non-silicided layers have significantly larger sheet resistance Even with silicide block, many non-idealities: Temperature coefficient: R f(t oltage coefficient: R f( Manufacturing ariations ,000 EECS240 Lecture 2 9 oltage Coefficient p - substrate n - well 2 B R p + diffusion n + diffusion 2 R I Ro + TC Example: Diffusion resistor Applied voltage modulates depletion width (cross-section of conductive channel Well acts as a shield o + ( T 25 + C ( 2 + BC B 2 2 EECS240 Lecture 2 2

3 Compensation Common Centroid and Dummies Example: R : R2 : 2 Dummy gradient 0.5 * R2 + R R 0.5 * R2 - R Dummy EECS240 Lecture 2 3 EECS240 Lecture 2 6 Resistor Matching Types of mismatch: Run-to-run variations Global differences in thickness, doping, etc. Systematic (e.g. contacts Random variations between devices Run-to-run variations in absolute R value: 20+% Can be problematic for termination, bias current, etc. Best case: make circuit depend only on ratios E.g., use feedback to control opamp gain With careful layout, can get 0. % matching Resistor Layout (cont. Serpentine layout for large values: Better layout (mitigates offset due to thermoelectric effects: See Hastings, The art of analog layout, Prentice Hall, 200. EECS240 Lecture 2 4 EECS240 Lecture 2 7 Systematic ariations from Layout Example: R 2R? Use unit element instead: 2R R EECS240 Lecture 2 5 MOSFETs as Resistors Triode region ( square law : W L I D µ Cox GS for GS > Small signal resistance: I D W µ Cox ( GS R L R C R GS 2 R for W µ Cox ( GS L oltage coefficient: TH >> EECS240 Lecture 2 8 GS TH

4 MOS Resistors Example: R MΩ Large R-values realizable in small area ery large voltage coefficient C R W µ Cox ( GS L W L µ CoxR( GS µa 00 MΩ GS 2 TH Applications: MOSFET-C filters: (linearization Ref: Tsividis et al, Continuous- Time MOSFET-C Filters in LSI, JSSC, pp. 5-30, Feb Biasing: (>GΩ Ref: Geen et al, Single-Chip Surface-Micromachined Integrated Gyroscope with o /hour Root Allen ariance, ISSCC, pp , Feb Capacitors Improved capacitor: substrate Is this only capacitor? EECS240 Lecture 2 9 EECS240 Lecture 2 22 Resistor Summary Capacitor Options No or limited support in standard CMOS Costly: large area (compared to FETs Nonidealities: Large run-to-run variations Temperature coefficient oltage coefficients (nonlinear Avoid them when you can Especially in critical areas, e.g. Amplifier feedback networks Electronic filters A/D converters We will get back to this point Type Gate Poly-poly (option Metal-metal Metal-substrate Metal-poly Poly-substrate Junction caps C [af/µm 2 ] 0, ~ 000 C [ppm/] Huge 0 20 Big T C [ppm/ o C] Big Big EECS240 Lecture 2 20 EECS240 Lecture 2 23 Capacitors Simplest capacitor: MOS Capacitor High non-linearity, temperature coefficient substrate What s the problem with this? But, still useful in many applications, e.g.: (Miller compensation capacitor Bypass capacitor (supply, bias EECS240 Lecture 2 2 EECS240 Lecture 2 24

5 Capacitor Layout MOM Capacitors Unit elements Shields: Etching Fringing fields Common-centroid Wiring and interconnect parasitics Ref.: Y. Tsividis, Mixed Analog-Digital LSI Design and Technology, McGraw-Hill, 996. Metal-Oxide-Metal capacitor. Free with modern CMOS. Use lateral flux (~L min and multiple metal layers to realize high capacitance values EECS240 Lecture 2 25 EECS240 Lecture 2 28 MIM Capacitors Some processes have MIM cap as add-on option Separation between metals is much thinner Higher density Used to be fairly popular But not as popular now that have many metal layers anyways MOM Capacitor Cross Section Use a wall of metal and vias to realize high density More layers higher density May want to chop off lower layers to reduce C bot Reasonably good matching and accuracy EECS240 Lecture 2 26 EECS240 Lecture 2 29 Capacitor Geometries Horizontal parallel plate ertical parallel plate Combinations Distributed Effects Can model IC resistors as distributed RC circuits. Could use transmission line analysis to find equivalent 2-port parameters. Ref: R. Aparicio and A. Hajimiri, Capacity Limits and Matching Properties of Integrated Capacitors, JSSC March 2002, pp Inductance negligible for small IC structures up to ~0GHz. EECS240 Lecture 2 27 EECS240 Lecture 2 30

6 Effective Resistance What About Inductors? High frequency resistance depends on W, e.g.: Wµ 0kΩ resistor works fine at GHz W5µ 0kΩ resistor drops to 5kΩ at GHz May need distributed model for accurate freq response EECS240 Lecture 2 3 Mostly not used in analog/mixed-signal design Usually too big More of a pain to model than R s and C s But they do occasionally get used Example inductor app.: shunt peaking Can boost bandwidth by up to 85%! Q not that important (L in series with R But frequency response may not be flat EECS240 Lecture 2 34 Capacitor Q Spiral Inductors Current density drops as you go farther from contact edge Used widely in RF circuits for small L (~-0nH. Use top metal for Q and high self resonance frequencies. ery good matching and accuracy if you model them right EECS240 Lecture 2 32 EECS240 Lecture 2 35 Double Contact Strucutre If contact on both edges, R drops 4X Can be a good idea even if not hitting distributed effects EECS240 Lecture 2 33

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