NANO-CMOS DESIGN FOR MANUFACTURABILILTY
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1 NANO-CMOS DESIGN FOR MANUFACTURABILILTY Robust Circuit and Physical Design for Sub-65nm Technology Nodes Ban Wong Franz Zach Victor Moroz An u rag Mittal Greg Starr Andrew Kahng WILEY A JOHN WILEY & SONS, INC., PUBLICATION
2 CONTENTS PREFACE ACKNOWLEDGMENTS xi xv 1 Introduction Value of Design for Manufacturability / Deficiencies in Boolean-Based Design Rules in the Subwavelength Regime / Impact of Variability on Yield and Performance / Industry Challenge: The Disappearing Process Window / Mobility Enhancement Techniques: A New Source of Variability Induced by Design-Process Interaction / Design Dependency of Chip Surface Topology / Newly Exacerbated Narrow Width Effect in Nano-CMOS Nodes / Well Proximity Effect / Need for Model-Based DFM Solutions Beyond 65 nm / Summary / 16 References / 16 I NEWLY EXACERBATED EFFECTS 19 2 Lithography-Related Aspects of DFM Economic Motivations for DFM / Lithographic Tools and Techniques for Advanced Technology Nodes / Lithographic Approaches to Sub-90-nm Lithography / Lithographic Infrastructure / Immersion Exposure Tools / 32 v
3 Vi CONTENTS Overlay / Cooptimization of the Mask, the Illuminator, and Apodization / Optical Proximity Correction / Double Patterning / Lithographic Roadmap / Lithography Limited Yield / Deviations of Printed Shape from Drawn Polygon / Increased Variabilities / Catastrophic Failures / Lithography-Driven DFM Solutions / Practical Boundary Conditions for DFM / Classical Approach / Printability Checkers / Model-Based Design Rule Checks / ASIC Cell Optimizations / Lithography-Aware Routers / Advanced OPC Techniques for Improved Manufacturing /108 References / Interaction of Layout with Transistor Performance and Stress Engineering Techniques Introduction / Impact of Stress on Transistor Performance / Electron Mobility / Hole Mobility / Threshold Voltage / Junction Leakage / High Stress Levels / Crystal Orientations / Uniaxial, Biaxial, and Arbitrary Stress Patterns / Stress Gradients / Effects of Temperature and High Dopant Concentrations / Stress Effects in Nonsilicon Semiconductors / Stress Propagation / Stress Propagation for Various Stress Source Geometries / Stress Propagation Through STI and Other Barriers / Free Boundaries / 155
4 CONTENTS VÜ 3.4 Stress Sources / Thermal Mismatch: STI and Suicide / Lattice Mismatch: esige and Si:С / Layer Growth / Intrinsic Stress: CESL and DSL / Stress Memorization Technique / Stress Measurement Techniques / Stress Simulation Techniques / Introducing Stress into Transistors / Stress Evolution During Process Flow / Stress Relaxation Mechanisms / Combining Several Stress Sources / Stress-Engineered Memory Retention / Layout-Induced Variations / Bulk Transistors versus SOI and FinFET / 179 References / 181 II DESIGN SOLUTIONS Signal and Power Integrity Introduction / Interconnect Resistance, Capacitance, and Inductance / Process Scaling and Interconnect Fabrication / Impact of Process Scaling on Resistance and Capacitance / Scaling and Reliability / Interconnect Delay, Energy, and Scaling Implications / Inductance Effects on an Interconnect / Emergence of Inductance as a Limiting Characteristic on Signal Integrity / Inductance Simulation and Extraction / Inductance-Influenced (RLC) Signal Delay / Single-Line Delay Considerations / Delay and Crosstalk for Buses / Optimized Bus Design / Clock Line Design / Power Grid Design / 229 References / 253
5 VIII CONTENTS 5 Analog and Mixed-Signal Circuit Design for Yield and Manufacturability Introduction / Device Selection / "Heartbeat" Device Size / Device Matching / Shallow Trench Isolation / Well Proximity Effects / Poly Gate Variation / Design Guidelines / Simulation Methodology / Monte Carlo Analysis / Device Configuration / Layout Guidelines / Analog Layout Design Rules / Floor Planning / Power Busing / Signal Routing / Dummy Diffusion-Poly-Metal / Testing / 280 References / Design for Variability, Performance, and Yield Introduction / Impact of Variations on Design / Impact of Variation on Bitcell Design / Impact of Variation on Analog Circuits / Impact of Variation on Digital Circuits / Some Parametric Fluctuations with New Implications for Design / Random Dopant Fluctuations / Line-Edge Roughness Impact on Leakage / Poly Critical Dimension Uniformity and Oxide Thickness Variation / Stress Variation of Straining Film and esige with Different Contexts / Process Variations in Interconnects / Impact of Deep-Submicron Integration in SRAMs / Impact of Layout Styles on Manufacturability, Yield, and Scalability / Insufficiency of Meeting Design Rules Alone / Wire Uniformity and Density; High Diffusion Density / 308
6 CONTENTS ix Minimum-Spaced Wire over Wide Metals / Misaligment Issues Coupled with Poly Corner Rounding and Diffusion Flaring / Well Corner Rounding Issues / OPC and OPC Reproducibility / Timing Implications of Cell Mirroring / Mask Cost, Complexity, and Building Throughput Time / Design for Variations / Limiting the Degrees of Freedom to Improve Design Uniformity / Stress Proximity Extraction / Contour-Based Extraction: Design in the Era of Lithographic Distortion / Design Compensation for Variations / Layout Optimization to Maximize Useful Stress and Reduce Variability / Summary / 330 References / 331 III THE ROAD TO DFM Nano-CMOS Design Tools: Beyond Model-Based Analysis and Correction Introduction / Electrical Design for Manufacturability / Library Preparation Methodology / Leakage Optimization Methodology / Criticality-Aware DFM / Definition of Criticalities / Applications of the Criticality-Aware Approach / Automatic Layout Optimization Flow / Optimizing the Layout / Examples of Cost Function Trade-offs / Criticality-Aware Layout Optimization Summary / On Guardbands, Statistics, and Gaps / Time Constants and the Inevitability of Guardbanding / Practicality and the Value of Statistical Design / Gaps in Nascent Flows / 358
7 X CONTENTS 7.5 Opportunistic Mindsets / The CORR Methodology / Auxiliary Pattern for Cell-Based OPC / Futures at <45nm / Glue Technologies in Place-and-Route Tools / Double-Patterning Lithography / Hotspot Detection and Fixing / Improvements to Optical Proximity Correction Methodology / Stress Modeling and Exploitation / Design for Equipment / Summary / 378 References / 378 INDEX
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