Lecture 30 The Short Metal Oxide Semiconductor Field Effect Transistor. November 15, 2002

Transcription

1 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 1 Lecture 30 The Short Metal Oxide Semiconductor Field Effect Transistor November 15, 2002 Contents: 1. Short channel effects Reading assignment: P. K. Ko, Approaches to Scaling.

2 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 2 Key questions Why does it seem that in practice the drain current is significantly smaller than predicted by simple long MOSFET models? What is the impact of velocity saturation in the device characteristics?

3 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Short channel effects Mobility degradation: mobility dependence on E x (vertical field). Experimental observation in linear regime: ID gm small V DS small V DS Vth VGS Vth VGS Experimental observation: µ o ν µ eff = 1+ E av E o where E av is average normal field in inversion layer: E av = Q dmax Q i ɛ s Due to semiconductor oxide interface roughness.

4 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 4 µ eff vs. E av : universal relationship for many MOSFET designs: Fig. 4. Measured universal µeff vs. Eeff curves for electrons and holes in the inversion layer. (After Liang et al. [20].) Parameters for the effective mobility models for electrons and holes: electrons µ o (cm 2 /V s) 670 E o (MV/cm) 0.67 ν 1.6 holes

5 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 5 Figure 6 graph from Inversion layer electron mobility data, graph from: Arora and Richardson, P. Ko, "Approaches to Scaling," in VLSI Electronics: Microstructure Science, vol. 18, chapter 1, pp , Academic Press, 1989.

6 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 6 Simplified expression of E av for n + polysi gate: 1) Relationship between Q dmax and V th : with: V th = V FB + φ sth Q dmax C ox E g V FB = φ bi = (W M W S )= (W M χ s Eg qφ f )= q 2 φ f q q 2 Plug into V th and solve for Q dmax : E g E g Q dmax = C ox (V th + +φ f 2φ f )= C ox (V th + φ f ) C ox V th 2q 2q 2) Relationship between Q i and V GS V th : Q i = C ox (V GS V th ) 3) Plug Q dmax and Q i into E av : 1 1 E av Q dmax + 2 Qi C ox V th + = 2 C ox(v GS V th ) ɛ ox V GS + V th = ɛ s ɛ s ɛ s 2x ox

7 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 7 E av ɛ ox V GS + V th ɛ s 2x ox Key dependences: V GS E av µ eff V th E av µ eff x ox E av µ eff Fig. 5. Calculated µeff of current carrier, graph. From: VLSI Electronics P. Ko, "Approaches to Scaling," in VLSI Electronics: Microstructure Science, vol. 18, chapter 1, pp , Academic Press, 1989.

8 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 8 Several comments: Since I D µ e, mobility degradation more severe as V GS increases I D won t rise as fast with V GS. Since µ e depends on E av µ eff depends on y. Disregard to first order use same µ eff everywhere. Mobility degradation considered short channel effect because as L x ox and µ degradation becomes important.

9 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture 30 9 g m in linear regime (V DS =0.1 V ) for L g =1.5 µm MOSFET: g m in linear regime (V DS =0.1 V ) for L g =0.18 µm MOSFET:

10 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Velocity saturation At high longitudinal fields, v e cannot exceed v sat : vdrift vsat µ 0 0 ε sat ε Best fit to experiments: v e = µ e E (1 + µ ee n ) 1/n v sat For inversion layer: electrons holes v sat (cm/s) cm/s cm/s n 2 1 To develop analytical model, use n =1: v e = µ e E 1+ µ ee v sat

11 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture New current model: dv J e = µ e Q i dy = µ e dv 1+ E E sat Qi dy with E sat = v sat µ e Rewrite current equation: J e =[µ e Q i J e ] dv dy E sat Plug in fundamental charge relationship: Q i = C ox (V GS V V th ) and integrate along channel: Solve for J e : J e J e L = µ e C ox V DS (V GS V V th )dv Esat V DS 0 µ e C ox J e = V DS (V GS V th L + E sat 1 2 V DS)V DS

12 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Terminal drain current in linear regime: I D = W µ e C ox 1 V L 1+ DS (V GS V th V DS )V DS E 2 sat L Effectively, impact of velocity saturation: µ e µ e 1+ V DS E sat L with V DS average longitudinal field. L For V DS E sat velocity saturation irrelevant (mobility regime). L V For DS L E sat velocity saturation prominent (velocity saturation regime). Since E sat 10 5 V/cm and V DS order 1 10 V, velocity saturation important if L µm.

13 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Current saturation occurs when v sat reached anywhere in the channel I D won t increase anymore with V DS : n + n + n + p v=vsat ε=ε sat V=V DSsat I D =I Dsat Bottleneck is current flowing through v sat region: I Dsat = Wv e Q i = Wv sat C ox (V GS V th V DSsat ) = W µ e C ox 1 V L 1+ DSsat (V GS V th V DSsat )V DSsat 2 E sat L Solve for V DSsat : V GS V th V DSsat = E sat L( ) E sat L

14 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture V GS V th V DSsat = E sat L( 1+ 2 E sat L 1) For long L, V DSsat V GS V th For short L, V DSsat 2E sat L(V GS V th ) <V GS V th VDSsat mobility regime velocity saturation regime 0 0 VGS-Vth Velocity saturation results in premature current saturation and less current: I Dsat = Wv sat C ox (V GS V th V DSsat )

15 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Experiments: Fig. 7. The saturation voltage for several channel lengths, graph. From: VLSI P. Ko, "Approaches to Scaling," in VLSI Electronics: Microstructure Science, vol. 18, chapter 1, pp , Academic Press, 1989.

16 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Current voltage characteristics: Fig. 15 Comparison of drain characteristics for constant mobility case and P. Ko, "Approaches to Scaling," in VLSI Electronics: Microstructure Science, vol. 18, chapter 1, pp , Academic Press, 1989.

17 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Impact of velocity saturation on transconductance: g m = I Dsat V GS = Wv sat C ox (1 V DSsat ) V GS with V DSsat 1 V GS = 1+2 V GS V th E sat L Then: 1 g m = Wv sat C ox (1 ) 1+2 V GS V th E sat L In the limit of short L: g m = Wv sat C ox In the limit of short L, g m determined only by x ox.

18 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Fig. 10: Deep submicon NMOS transistors, graph. From: VLSI Electronics P. Ko, "Approaches to Scaling," in VLSI Electronics: Microstructure Science, vol. 18, chapter 1, pp , Academic Press, theoretical limit for L=0

19 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Fig. 9: Measured and calculated gm, graph. From: VLSI Electronics Microstructure P. Ko, "Approaches to Scaling," in VLSI Electronics: Microstructure Science, vol. 18, chapter 1, pp , Academic Press, L=1 µm, xox=20 nm L=2 µm, xox=30 nm L=3 µm, xox=50 nm L=1.3 µm, xox=20 nm L=2.3 µm, xox=30 nm L=3.3 µm, xox=50 nm

20 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture MOSFET I d scaling (Ko, 1989) long-channel theory mobility degradation due to Ex I d at V g-v t =5 V (µa/µm) 1000 velocity degradation due to Ey short-channel theory L g (µm)

21 6.720J/3.43J Integrated Microelectronic Devices Fall 2002 Lecture Key conclusions Inversion layer mobility degraded by transveral field due to roughness of semiconductor oxide interface I D lower than predicted by simple models. There is a universal relationship between mobility and average transversal field in inversion layer. For short L, velocity saturation in inversion layer important I D lower than predicted by simple models. Velocity saturation premature MOSFET saturation V DSsat lower than predicted by simple models. Velocity saturation g m saturation in limit of short L: g m = Wv sat C ox