Arithmetic Circuits-2

Transcription

1 Arithmetic Circuits-2 Multipliers Array multipliers Shifters Barrel shifter Logarithmic shifter ECE 261 Krish Chakrabarty 1 Binary Multiplication M-1 X = X i 2 i i=0 Multiplicand N-1 Y = Y i 2 i i=0 Multiplier Product Z = X * Y N-1 M-1 = ( X i Y j 2 i+j ) i=0 j=0 Partial products Product = Sum of partial products ECE 261 Krish Chakrabarty 2 1

2 Multiplication Example: ECE 261 Krish Chakrabarty 3 Example: Multiplication ECE 261 Krish Chakrabarty 4 2

3 Multiplication Example: ECE 261 Krish Chakrabarty 5 Example: Multiplication ECE 261 Krish Chakrabarty 6 3

4 Multiplication Example: ECE 261 Krish Chakrabarty 7 Example: Multiplication ECE 261 Krish Chakrabarty 8 4

5 Multiplication Example: M x N-bit multiplication Produce N M-bit partial products Sum these to produce M+N-bit product ECE 261 Krish Chakrabarty 9 The Binary Multiplication Multiplicand Multiplier A N D o p e r a t i o n P a r t i a l P r o d u c t s ECE 261 Krish Chakrabarty 10 5

6 General Form Multiplicand: Y = (y M-1, y M-2,, y 1, y 0 ) Multiplier: X = (x N-1, x N-2,, x 1, x 0 ) Product: ECE 261 Krish Chakrabarty 11 Dot Diagram Each dot represents a bit ECE 261 Krish Chakrabarty 12 6

7 x 3 The Array Multiplier x 3 x 3 H A F A F A H A Z 1 x 2 x 3 x 2 x 1 F A F A F A H A x 2 x 1 x 0 Z 2 F A F A F A H A Z 7 Z 6 Z 5 Z 4 Z 3 ECE 261 Krish Chakrabarty 13 y 3 x 2 x 1 x 0 y 2 x 1 x 0 y 1 x 0 Z 0 y 0 FA: Full adder HA: Half adder (two inputs) Propagation delay =? The MxN Array Multiplier Critical Path H A F A F A H A F A F A F A F A F A F A H A H A C r i t i c a l P a t h 1 C r i t i c a l P a t h 2 Critical Path 1 & 2 ECE 261 Krish Chakrabarty 14 7

8 Carry-Save Multiplier H A H A H A H A H A F A F A H A F A F A F A H A F A F A H A F A Carries saved for next adder stage Unique critical path Trade offs? ECE 261 Krish Chakrabarty 15 Adder Cells in Array Multiplier V D D A A A P V D D B A P B C i C i A I d e n t i c a l D e l a y s f o r C a r r y a n d S u m P C i P C i P A P C i P V D D S V D D C o ECE 261 Krish Chakrabarty 16 8

9 Y 0 Y 1 Y 2 Y 3 Z 7 X 3 Z 6 Multiplier Floorplan X 2 Z 5 X 1 Z 4 X 0 Z 3 Z 0 Z 1 Z 2 H A M u l t i p l i e r C e l l F A M u l t i p l i e r C e l l V e c t o r M e r g i n g C e l l X a n d Y s i g n a l s a r e b r o a d c a s t e d t h r o u g h t h e c o m p l e t e a r r a y. ECE 261 Krish Chakrabarty 17 Multipliers Summary O p t i m i z a t i o n G o a l s D i f f e r e n t V s B i n a r y A d d e r O n c e A g a i n : I d e n t i f y C r i t i c a l P a t h O t h e r p o s s i b l e t e c h n i q u e s - L o g a r i t h m i c v e r s u s L i n e a r - D a t a e n c o d i n g ( B o o t h ) - P i p e l i n i n g (Wallace tree multiplier) ECE 261 Krish Chakrabarty 18 9

10 Comparators 0 s detector: A = s detector: A = Equality comparator: A = B Magnitude comparator: A < B ECE 261 Krish Chakrabarty 19 1 s & 0 s Detectors 1 s detector: N-input AND gate 0 s detector: NOTs + 1 s detector (N-input NOR) ECE 261 Krish Chakrabarty 20 10

11 Equality Comparator Check if each bit is equal (XNOR, aka equality gate) 1 s detect on bitwise equality ECE 261 Krish Chakrabarty 21 Magnitude Comparator Compute B-A and look at sign B-A = B + ~A + 1 For unsigned numbers, carry out is sign bit ECE 261 Krish Chakrabarty 22 11

12 Shifters Logical Shift: Shifts number left or right and fills with 0 s 1011 LSR 1 = LSL1 = 0110 Arithmetic Shift: Shifts number left or right. Rt shift sign extends 1011 ASR1 = ASL1 = 0110 Rotate: Shifts number left or right and fills with lost bits 1011 ROR1 = ROL1 = 0111 ECE 261 Krish Chakrabarty 23 The Binary Shifter R i g h t n o p L e f t One-bit shifts A i B i A i - 1 B i - 1 B i t - S l i c e i ECE 261 Krish Chakrabarty 24 12

13 Multi-bit Shifters Cascade one-bit shifters? Complex, unwieldy, slow for larger number of shifts Two other types of shifters Barrel shifter Logarithmic shifter ECE 261 Krish Chakrabarty 25 A 3 A 2 A 1 A 0 S h 1 S h 2 S h 3 The Barrel Shifter B 3 B 2 B 1 B 0 Shift by 0 to 3 bits : D a t a W i r e : C o n t r o l W i r e S h 0 S h 1 S h 2 S h 3 ECE 261 Krish Chakrabarty 26 13

14 The Barrel Shifter Area dominated by wiring Propagation delay is theoretically constant (at most one transmission gate), independent of shifter size, no. of shifts Reality: Capacitance on buffer input maximum shift width ECE 261 Krish Chakrabarty 27 A 3 A 2 A 1 A 0 4x4 barrel shifter S h 0 S h 1 S h 2 Width barrel ~ 2 p m M S h 3 B u f f e r p m = metal/poly pitch M = no. of shifts ECE 261 Krish Chakrabarty 28 14

15 Logarithmic Shifter Staged approach, e.g. 7 = , 5 = Shifter with maximum shift width M consists of log 2 M stages S h 1 S h 1 S h 2 S h 2 S h 4 S h 4 A 3 B 3 A 2 A 1 A 0 B 2 B 1 B 0 ECE 261 Krish Chakrabarty bit Logarithmic Shifter A 3 Out3 A 2 Out2 A 1 Out1 A 0 Out0 ECE 261 Krish Chakrabarty 30 15