Binary Multipliers. Reading: Study Chapter 3. The key trick of multiplication is memorizing a digit-to-digit table Everything else was just adding

Transcription

1 Binary Multipliers The key trick of multiplication is memorizing a digit-to-digit table Everything else was just adding You ve got to be kidding It can t be that easy Reading: Study Chapter 3. L Multiplication

2 Have We Forgotten Something? Our ALU can add, subtract, shift, and perform Boolean functions. But, even rabbits know how to multiply But, it is a huge step in terms of logic Including a multiplier unit in an ALU doubles the number of gates used. A good (compact and high performance) multiplier can also be tricky to design. Here we will give an overview of some of the tricks used. L Multiplication 2

3 Hey, that looks like an AND gate Binary Multiplication The Binary Multiplication Table X Binary multiplication is implemented using the same basic longhand algorithm that you learned in grade school. x A 2 B 2 A B A A 3 B B 3 A j B i is a partial product A 3 B A 3 B A 2 B A B A 2 B A B A B A B 2 A B + A 3 B 3 A 3 B 2 A 2 B 2 A B 2 A 2 B 3 A B 3 A B 3 Multiplying N-digit number by M-digit number gives (N+M)-digit result Easy part: forming partial products (just an AND gate since B I is either or ) Hard part: adding M, N-bit partial products L Multiplication 3

4 Sequential Multiplier Assume the multiplicand (A) has N bits and the multiplier (B) has M bits. If we only want to invest in a single N-bit adder, we can build a sequential circuit that processes a single partial product at a time and then cycle the circuit M times: S N S N- S LSB Init: P, load A&B P N B M bits + N+ NC xn A N Repeat M times { P P + (B LSB ==? A : ) shift P/B right one bit } Done: (N+M)-bit result in P/B L Multiplication 4

5 Simple Combinational Multiplier t PD = * t PD,FA not 6 Co HA A S B Co HA A S B Co HA A S B Co HA A S B t PD = (2*(N-) + N) * t PD,FA Components N * HA N(N-) * FA The Logic of a Half- Adder CO A B S NB: this circuit only works for nonnegative operands L Multiplication 5

6 Carry-Save Combinational Multiplier Observation: Rather than propagating the sums across each row, the carries can instead be forwarded onto the next column of the following row t PD = 8 * t PD,FA t PD = (N+N) * t PD,FA Components N * HA N 2 * FA These Adders can be removed, and the AND gate outputs tied directly to the Carry inputs of the next stage. This small improvement in performance hardly seems worth the effort, however, this design is easier to pipeline. L Multiplication 6

7 Higher-Radix Multiplication Idea: If we could use, say, 2 bits of the multiplier in generating each partial product we would halve the number of columns and halve the latency of the multiplier! A N- A N-2 A 4 A 3 A 2 A A x B M- B M-2 B 3 B 2 B B M/ Booth s insight: rewrite 2*A and 3*A cases, leave 4A for next partial product to do! B K+,K *A = *A = *A A = 2*A 2A or 4A 2A = 3*A 4A A! L Multiplication 7

8 Booth Recoding current bit pair -89 =. Hey, isn t that a negative number? = - * 2 (-) + 2 * 2 2 (8) + (-2) * 2 4 (-32) + (-) * 2 6 (-64) -89 B 2K+ B 2K B 2K- from previous bit pair action add add A add A add 2*A sub 2*A sub A sub A add A in this bit means the previous stage needed to add 4*A. Since this stage is shifted by 2 bits with respect to the previous stage, adding 4*A in the previous stage is like adding A in this stage! -2*A+A -A+A Each bit can be considered to have the following weights: W(B 2K+ ) = -2 W(B 2K ) = W(B 2K- ) = L Multiplication 8

9 Booth Recoding Logic surrounding each basic adder: A i A i- x2 Sub - Control lines (x2, Sub, Zero) are shared across each row - Must handle the + when Sub is (extra half adders in a carry save array) A CO FA S B CI Zero NOTE: - Booth recoding can be used to implement signed multiplications B 2K+ B 2K B 2K- x2 Sub Zero X X X X L Multiplication 9

10 Bigger Multipliers Using the approaches described we can construct multipliers of arbitrary sizes, by considering every adder at the bit level We can also, build bigger multipliers using smaller ones A 4 B 4 4 P HI 4 P LO Considering this problem at a higher-level leads to more non-obvious optimizations L Multiplication

11 Can We Multiply With Less? How many operations are needed to multiply 2, 2-digit numbers? 4 multipliers 4 Adders This technique generalizes You can build an 8-bit multiplier using 4 4-bit multipliers and 4 8-bit adders O(N 2 + N) = O(N 2 ) A B X C D DB + DA + + C B + CA L Multiplication

12 An O(N 2 ) Multiplier In Logic The functional blocks would look like B C A D B Mult Mult Mult Mult Add Add HA Add Add A B X C D DB DA C B CA Product bits L Multiplication 2

13 A Trick The two middle partial products can be computed using a single multiplier and other partial products DA + CB = (C + D)(A + B) (CA + DB) 3 multipliers 8 adders This can be applied recursively (i.e. applied within each partial product) Leads to O(N.58 ) adders This trick is becoming more popular as N grows. However, it is less regular, and the overhead of the extra adders is high for small N A B X C D DB DA C B CA L Multiplication 3

14 Let s Try it By Hand ) Choose 2, 2 digit numbers to multiply ab cd 42 x 37 2) Multiply p = a x c, p 2 = b x d, p 3 = (c + d)(a + b) p = 4 x 3 = 2, p 2 = 2 x 7 = 4, p 3 = (4+2)(3+7) = 6 3) Find partial subtracted sum, SS = p 3 (p + p 2 ) SS = 6 (2 + 4) = 34 4) Add to find product, p = *p + *SS + p 2 p = = 554 = 42 x x 37 =? L Multiplication 4

15 An O(N.58 ) Multiplier In Logic The functional blocks would look like C A D B A B X C D DB SS CA Mult Add Mult Add Add Add Add SS Mult Add Where SS = (C+D)(A+B) (CA+DB) HA Add Add Product bits L Multiplication 5

16 Binary Division Division merely reverses the process Rather than adding successively larger partial products, subtract successively smaller divisors When multiplying, we knew which partial products to actually add (based on the whether the corresponding bit was a or a ) In division, we have to try *both ways* Multiplication Upside-down P P P P P P P P - D D D D Q 3 = or? - D D D D Q 2 = or? - D D D D Q = or? - D D D D Q = or? R R R R L Multiplication 6

17 Restoring Division Start: Align MSBs of Divisor and Remainder, K = number of bits shifted, Quotient = Subtract Divisor from the Remainder leave the result in the Remainder < Test Remainder Shift Quotient left one bit set rightmost bit = Restore Remainder by adding Divisor Shift Quotient left one bit set rightmost bit = Shift Divisor right one bit Repeat K+ times L Multiplication 7

18 Division Example Step : R D Q 42 7 = 6 Start: Q = = R = 42 = D = (7*8) = Note: K = 3, so repeat 4 times Subtract: R = 42 = D = -(7*8) = -4 = Restore: R = 42 = Shifts: Q = D = Step 2: R D Q 42 7 = 6 Q = = R = 42 = D = (7*4) = Subtract: R = 42 = D = -(7*4) = R = 4 = Shifts: Q = D = L Multiplication 8

19 Division Example (cont) Step 3: R D Q 42 7 = 6 Step 4: R D Q 42 7 = 6 Q = = R = 4 = D = (7*2) = Subtract: R = 4 = D = -(7*2) = = No Restore Shifts: Q = D = Q = 3 = R = = D = 7 = Subtract: R = = D = -7 = -7 = Restore: R = = Shifts: Q = D = R = L Multiplication 9

20 Next Time We dive into floating point arithmetic L Multiplication 2