MC14001UB, MC14011UB. UB-Suffix Series CMOS Gates

Transcription

1 MC4UB, MC4UB UB-Suffix Series CMOS Gtes The UB Series logi gtes re onstruted with P nd N hnnel enhnement mode devies in single monolithi struture (Complementry MOS). Their primry use is where low power dissiption nd/or high noise immunity is desired. The UB set of CMOS gtes re inverting nonuffered funtions. Fetures Supply Voltge Rnge =. Vd to 8 Vd Liner nd Osilltor Applitions Cple of Driving Two LowPower TTL Lods or One LowPower Shottky TTL Lod Over the Rted Temperture Rnge Doule Diode Protetion on All Inputs PinforPin Replements for Corresponding CD4 Series UB Suffix Devies NLV Prefix for Automotive nd Other Applitions Requiring Unique Site nd Control Chnge Requirements; AECQ Qulified nd PPAP Cple This Devie is PFree nd is RoHS Complint MAXIMUM RATINGS (Voltges Referened to V SS ) Symol Prmeter Vlue Unit DC Supply Voltge Rnge. to +8. V V in, V out Input or Output Voltge Rnge (DC or Trnsient). to +. V I in, I out Input or Output Current (DC or Trnsient) per Pin ± ma MARKING DIAGRAM 4 xx A WL, L YY, Y WW, W G SOIC4 D SUFFIX CASE 7A 4xxUG AWLYWW = Speifi Devie Code = Assemly Lotion = Wfer Lot = Yer = Work Week = PFree Pkge ORDERING INFORMATION See detiled ordering nd shipping informtion in the pkge dimensions setion on pge 4 of this dt sheet. P D Power Dissiption, per Pkge (Note ) mw T A Amient Temperture Rnge to + C T stg Storge Temperture Rnge to + C T L Led Temperture (8Seond Soldering) C Stresses exeeding those listed in the Mximum Rtings tle my dmge the devie. If ny of these limits re exeeded, devie funtionlity should not e ssumed, dmge my our nd reliility my e ffeted.. Temperture Derting: D/DW Pkge: 7. mw/ C From C To C This devie ontins protetion iruitry to gurd ginst dmge due to high stti voltges or eletri fields. However, preutions must e tken to void pplitions of ny voltge higher thn mximum rted voltges to this highimpedne iruit. For proper opertion, V in nd V out should e onstrined to the rnge V SS (V in or V out ). Unused inputs must lwys e tied to n pproprite logi voltge level (e.g., either V SS or ). Unused outputs must e left open. Semiondutor Components Industries, LLC, 4 July, 4 Rev. Pulition Order Numer: MC4UB/D

2 MC4UB, MC4UB LOGIC DIAGRAMS MC4UB Qud Input NOR Gte MC4UB Qud Input NAND Gte = PIN 4 V SS = PIN 7 FOR ALL DEVICES PIN ASSIGNMENTS MC4UB Qud Input NOR Gte MC4UB Qud Input NAND Gte IN A IN A 4 IN D IN A IN A 4 OUT A IN D OUT A OUT B 4 OUT D OUT B 4 IN B OUT C IN B IN B 9 IN C IN B 9 V SS 7 8 IN C V SS 7 8 IN D IN D OUT D OUT C IN C IN C

3 MC4UB, MC4UB ELECTRICAL CHARACTERISTICS (Voltges Referened to V SS ) Chrteristi Output Voltge V in = or Level Symol Vd V OL. V in = or Level V OH. C C C Min Mx Min Typ (Note ) Mx Min Mx V Input Voltge Level Vd (V O = 4. Vd) (V O = 9. Vd) (V O =. Vd) IL (V O =. Vd) Level V IH Vd (V O =. Vd) (V O =. Vd) Output Drive Current I OH mad (V OH =. Vd) Soure (V OH = 4. Vd) (V OH = 9. Vd) (V OH =. Vd) (V OL =.4 Vd) Sink I OL mad (V OL =. Vd) (V OL =. Vd) Input Current I in ±. ±. ±. ±. Ad Input Cpitne (V in = ) C in. 7. pf Quiesent Current (Per Pkge) Totl Supply Current (Notes, 4) (Dynmi plus Quiesent, Per Gte C L = pf) I DD. I T I T = (. A/kHz) f + I DD /N I T = (. A/kHz) f + I DD /N I T = (.8 A/kHz) f + I DD /N Produt prmetri performne is indited in the Eletril Chrteristis for the listed test onditions, unless otherwise noted. Produt performne my not e indited y the Eletril Chrteristis if operted under different onditions.. Dt lelled Typ is not to e used for design purposes ut is intended s n indition of the IC s potentil performne.. The formuls given re for the typil hrteristis only t C. 4. To lulte totl supply urrent t lods other thn pf: I T (C L ) = I T ( pf) + (C L ) Vfk where: I T is in H (per pkge), C L in pf, V = ( V SS ) in volts, f in khz is input frequeny, nd k =. x the numer of exerised gtes per pkge. ÎÎÎ SWITCHING CHARACTERISTICS (Note ) (C L = pf, T A = C) Chrteristi Symol V ÎÎÎ DD Min Typ Mx ÎÎÎ Unit Vd (Note ) Output Rise Time t TLH ÎÎ ns t TLH = (. ns/pf) C L + ns. 8 ÎÎÎ t TLH = (. ns/pf) C L + ns 9 8 t TLH = (. ns/pf) C L + ns ÎÎÎ Output Fll Time Î t THL ÎÎ ns t THL = (. ns/pf) C L + ns. ÎÎÎ t THL = (.7 ns/pf) C L +. ns t THL = (. ns/pf) C L + 9. ns 4 8 ÎÎÎ Propgtion Dely Time Î t PLH, t PHL ÎÎ ns t PLH, t PHL = (.7 ns/pf) C L + ns. 9 8 t PLH, t PHL = (. ns/pf) C L + ns t PLH, t PHL = (. ns/pf) C L + ns 4 8 ÎÎÎ. The formuls given re for the typil hrteristis only t C.. Dt lelled Typ is not to e used for design purposes ut is intended s n indition of the IC s potentil performne. 7. Unit Vd Vd Ad Ad

4 MC4UB, MC4UB ORDERING INFORMATION MC4UBDG Devie Pkge Shipping SOIC4 (PFree) Units / Ril NLV4UBDG* MC4UBDRG NLV4UBDRG* SOIC4 (PFree) SOIC4 (PFree) SOIC4 (PFree) Units / Ril / Tpe & Reel / Tpe & Reel MC4UBDG NLV4UBDG* MC4UBDRG SOIC4 (PFree) SOIC4 (PFree) SOIC4 (PFree) Units / Ril Units / Ril / Tpe & Reel NLV4UBDRG* SOIC4 (PFree) / Tpe & Reel For informtion on tpe nd reel speifitions, inluding prt orienttion nd tpe sizes, plese refer to our Tpe nd Reel Pkging Speifitions Brohure, BRD8/D. *NLV Prefix for Automotive nd Other Applitions Requiring Unique Site nd Control Chnge Requirements; AECQ Qulified nd PPAP Cple. ns ns PULSE GENERATOR INPUT * 4 7 V SS OUTPUT C L INPUT t PHL OUTPUT INVERTING 9% % % 9% % % t PLH V V OH V OL *All unused inputs of AND, NAND gtes must e onneted to. All unused inputs of OR, NOR gtes must e onneted to V SS. t THL t TLH Figure. Swithing Time Test Ciruit nd Wveforms 4

5 MC4UB, MC4UB MC4UB CIRCUIT SCHEMATIC MC4UB CIRCUIT SCHEMATIC (/4 of Devie Shown) , 4,,,, 8,,, 9, 7 V SS 4 7 V SS Vout, OUTPUT VOLTAGE (Vd) = Vd T A = + C Unused input onneted to V SS. Vd One input only Both inputs. Vd Vd Vd ID, DRAIN CURRENT (mad) Vout, OUTPUT VOLTAGE (Vd) Vd. Vd = Vd Unused input onneted to V SS. T A = + C T A = - C V in, INPUT VOLTAGE (Vd) Figure. Typil Voltge nd Current Trnsfer Chrteristis V in, INPUT VOLTAGE (Vd) Figure. Typil Voltge Trnsfer Chrteristis versus Temperture ID, DRAIN CURRENT (mad) T A = - C T A = + C T A = + C V GS = -. Vd - Vd - Vd ID, DRAIN CURRENT (mad) Vd V GS = Vd. Vd T A = - C T A = + C T A = + C V DS, DRAIN VOLTAGE (Vd) V DS, DRAIN VOLTAGE (Vd) Figure 4. Typil Output Soure Chrteristis Figure. Typil Output Sink Chrteristis

6 MC4UB, MC4UB PACKAGE DIMENSIONS H 4 8. M B M e D 7 X A B E. M C A S B S A A C SEATING PLANE SOIC4 NB CASE 7A ISSUE K DETAIL A h X 4 M L A DETAIL A NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.M, CONTROLLING DIMENSION: MILLIMETERS.. DIMENSION DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE. TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS.. MAXIMUM MOLD PROTRUSION. PER SIDE. MILLIMETERS INCHES DIM MIN MAX MIN MAX A A...4. A D E e.7 BSC BSC H h....9 L M 7 7 SOLDERING FOOTPRINT*. 4X.8.7 PITCH 4X.8 DIMENSIONS: MILLIMETERS *For dditionl informtion on our PFree strtegy nd soldering detils, plese downlod the ON Semiondutor Soldering nd Mounting Tehniques Referene Mnul, SOLDERRM/D. ON Semiondutor nd the re registered trdemrks of Semiondutor Components Industries, LLC (SCILLC) or its susidiries in the United Sttes nd/or other ountries. SCILLC owns the rights to numer of ptents, trdemrks, opyrights, trde serets, nd other intelletul property. A listing of SCILLC s produt/ptent overge my e essed t SCILLC reserves the right to mke hnges without further notie to ny produts herein. SCILLC mkes no wrrnty, representtion or gurntee regrding the suitility of its produts for ny prtiulr purpose, nor does SCILLC ssume ny liility rising out of the pplition or use of ny produt or iruit, nd speifilly dislims ny nd ll liility, inluding without limittion speil, onsequentil or inidentl dmges. Typil prmeters whih my e provided in SCILLC dt sheets nd/or speifitions n nd do vry in different pplitions nd tul performne my vry over time. All operting prmeters, inluding Typils must e vlidted for eh ustomer pplition y ustomer s tehnil experts. SCILLC does not onvey ny liense under its ptent rights nor the rights of others. SCILLC produts re not designed, intended, or uthorized for use s omponents in systems intended for surgil implnt into the ody, or other pplitions intended to support or sustin life, or for ny other pplition in whih the filure of the SCILLC produt ould rete sitution where personl injury or deth my our. Should Buyer purhse or use SCILLC produts for ny suh unintended or unuthorized pplition, Buyer shll indemnify nd hold SCILLC nd its offiers, employees, susidiries, ffilites, nd distriutors hrmless ginst ll lims, osts, dmges, nd expenses, nd resonle ttorney fees rising out of, diretly or indiretly, ny lim of personl injury or deth ssoited with suh unintended or unuthorized use, even if suh lim lleges tht SCILLC ws negligent regrding the design or mnufture of the prt. SCILLC is n Equl Opportunity/Affirmtive Ation Employer. This literture is sujet to ll pplile opyright lws nd is not for resle in ny mnner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literture Distriution Center for ON Semiondutor P.O. Box, Denver, Colordo 87 USA Phone: 77 or 8448 Toll Free USA/Cnd Fx: 77 or Toll Free USA/Cnd Emil: orderlit@onsemi.om N. Amerin Tehnil Support: 8898 Toll Free USA/Cnd Europe, Middle Est nd Afri Tehnil Support: Phone: Jpn Customer Fous Center Phone: ON Semiondutor Wesite: Order Literture: For dditionl informtion, plese ontt your lol Sles Representtive MC4UB/D