NTE4501 Integrated Circuit CMOS, Dual 4 Input NAND Gate, 2 Input NOR/OR Gate, 8 Input AND/NAND Gate
|
|
|
- Christal Chapman
- 5 years ago
- Views:
Transcription
1 NTE4501 Integrated Circuit CMOS, Dual 4 Input NAND Gate, 2 Input NOR/OR Gate, 8 Input AND/NAND Gate Description: The NTE4501 is a triple gate device in a 16 Lead DIP type package constructed with MOS P Channel and N Channel enhancement mode devices in a single monolithic structure. These complementary MOS logic gates find primary use where low power dissipation and/or high noise immunity is desired. Features: Quiescent Current = 0.5nA/package Typ at 5Vdc Noise Immunity = 45% of Typ Diode Protection on All Inputs Supply Voltage Range: 3Vdc to 18Vdc Single Supply Operation Positive or Negative High Fanout > 50 Logic Swing Independent of fanout Capable of Driving Two Low Power TTL Loads, One Low Power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range Absolute Maximum Ratings: (Voltages referenced to V SS, Note 1) DC Supply Voltage, to +18.0V Input Voltage (All Inputs), V in to to +0.5V DC Current Drain (Per Pin), I... 10mA Operating Temperature Range, T A to +125 C Storage Temperature Range, T stg to +150 C Note 1. Maximum Ratings are those values beyond which damage to the device may occur.
2 Electrical Characteristics: 55 C +25 C +125 C Symbol Vdc Min Max Min Typ Max Min Max Unit Output Voltage 0 Level V OL Vdc V in = or Vdc Vdc 1 Level V OH Vdc V in = 0 or Vdc Vdc Input Voltage (Note 2) 0 Level (V O = 3.6 or 1.4Vdc) V IL Vdc (V O = 7.2 or 2.8Vdc) Vdc (V O = 11.5 or 3.5Vdc) Vdc 1 Level (V O = 1.4 or 3.6Vdc) V IH Vdc (V O = 12.8 or 7.2Vdc) Vdc (V O = 3.5 or 11.5Vdc) Vdc Output Drive Current I OH (V OH = 2.5Vdc) Source madc (V OH = 4.6Vdc) madc (V OH = 9.5Vdc) NAND madc (V OH = 13.5Vdc) madc (V OH = 2.5Vdc) NOR madc (V OH = 4.6Vdc) madc (V OH = 9.5Vdc) madc (V OH = 13.5Vdc) madc (V OH = 2.5Vdc) NOR madc (V OH = 4.6Vdc) madc (V OH = 9.5Vdc) Inverter madc (V OH = 13.5Vdc) madc (V OL = 0.4Vdc) Sink I OL madc (V OL = 0.5Vdc) NAND madc (V OL = 1.5Vdc) madc (V OL = 0.4Vdc) NOR madc (V OL = 0.5Vdc) madc (V OL = 1.5Vdc) madc (V OL = 0.4Vdc) NOR madc (V OL = 0.5Vdc) Inverter madc (V OL = 1.5Vdc) madc Note 2. Noise immunity specified for worse case input combination. Note 4. To calculate total supply current at loads other than 50pF: I T (C L ) = I T (50pF) + 4 x 10 3 (C L 50) /f where: I T is in μa (per package), C L in pf, in Vdc, f in khz is input frequency.
3 Electrical Characteristics (Cont d): 55 C +25 C +125 C Symbol Vdc Min Max Min Typ Max Min Max Unit Input Current I in 15 ±0.1 ± ±0.1 ±0.1 μadc Input Capacitance (V IN = 0) C in pf Quiescent Current I DD μadc (Per Package) μadc Total Supply Current (Dynamic plus Quiescent, Per Package, C L = 50pF on all outputs, all buffers switching, Note 3, Note 4) μadc I T 5.0 I T = (1.2μA/kHz) f + I DD μadc 10 I T = (2.4μA/kHz) f + I DD μadc 15 I T = (3.6μA/kHz) f + I DD μadc Note 2. Noise immunity specified for worse case input combination. Note 4. To calculate total supply current at loads other than 50pF: I T (C L ) = I T (50pF) + 4 x 10 3 (C L 50) /f where: I T is in μa (per package), C L in pf, in Vdc, f in khz is input frequency. Switching Characteristics: (C L = 50pF, T A = +25 C, Note 2, Note 3) Symbol Vdc Min Typ Max Unit Output Rise Time NAND, NOR t TLH = (3.0ns/pf) C L + 30ns t TLH ns t TLH = (1.5ns/pf) C L + 15ns ns t TLH = (1.1ns/pf) C L + 10ns ns Output Fall Time NAND, NOR t THL = (1.5ns/pf) C L + 25ns t THL ns t THL = (0.75ns/pf) C L ns ns t THL = (0.55ns/pf) C L + 9.5ns ns Output Rise Time NOR Inverter t TLH = (1.35ns/pf) C L ns t TLH ns t TLH = (0.60ns/pf) C L + 20ns ns t TLH = (0.40ns/pf) C L + 17ns ns Output Fall Time NOR Inverter t THL = (0.67ns/pf) C L ns t THL ns t THL = (0.45ns/pf) C L ns ns t THL = (0.37ns/pf) C L ns ns Note 2. Data labeled Typ is not to be used for design purposes but is intended as an indication of the device s potential performance.
4 Switching Characteristics (Cont d): (C L = 50pF, T A = +25 C, Note 2, Note 3) Propagation Delay Time t PLH, t PHL = (1.7ns/pf) C L + 45ns Symbol Vdc Min Typ Max Unit t PLH. t PHL ns NAND t PLH, t PHL = (0.66ns/pf) C L + 37ns ns t PLH, t PHL = (0.5ns/pf) C L + 25ns ns ns ns t PLH, t PHL = (1.7ns/pf) C L + 30ns NOR t PLH. t PLH, t PHL = (0.66ns/pf) C L + 32ns t PHL ns t PLH, t PHL = (0.5ns/pf) C L + 20ns ns t PLH, t PHL = (1.7ns/pf) C L + 45ns NOR Inverter t PLH. t PLH, t PHL = (0.66ns/pf) C L + 37ns t PHL ns t PLH, t PHL = (0.5ns/pf) C L + 25ns ns Note 2. Data labeled Typ is not to be used for design purposes but is intended as an indication of the device s potential performance. Logic Diagram AND 15 NAND 10 = Pin16 V SS = Pin8 Use Dotted Connection Externally to Obtain 8 Input AND/NAND Note: Pin14 must not be used as an input to the inverter.
5 (22.0) Max.260 (6.6) Max.200 (5.08) Max.100 (2.54).099 (2.5) Min.700 (17.78)
NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder
NTE4514B & NTE4515B Integrated Circuit CMOS, 4 Bit Latch/4 to 16 Line Decoder Description: The NTE4514B (output active high option) and NTE4515B (output active low option) are two output options of a 4
NTE4035B Integrated Circuit CMOS, 4 Bit Parallel In/Parallel Out Shift Register
NTE4035B Integrated Circuit CMOS, 4 Bit Parallel In/Parallel Out Shift Register Description: The NTE4035B is a 4 bit shift register in a 16 Lead DIP type package constructed with MOS P Channel an N Channel
NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register
NTE74HC165 Integrated Circuit TTL High Speed CMOS, 8 Bit Parallel In/Serial Out Shift Register Description: The NTE74HC165 is an 8 bit parallel in/serial out shift register in a 16 Lead DIP type package
Features Y Wide supply voltage range 3 0V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL fan out of 2 driving 74L
CD4025 CD4023BM CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM CD4025BC Buffered Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs Description: The NTE74HC173 is an high speed 3 State Quad D Type Flip Flop in a 16 Lead DIP type package that
MM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation
MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B
MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary
MM74HC00 Quad 2-Input NAND Gate
MM74HC00 Quad 2-Input NAND Gate General Description The MM74HC00 NAND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption
CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate
Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate General Description The CD4071BC and CD4081BC quad gates are monolithic complementary MOS (CMOS) integrated circuits constructed
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset
NTE74HC109 Integrated Circuit TTL High Speed CMOS, Dual J K Positive Edge Triggered Flip Flop w/set & Reset Description: The NTE74HC109 is a dual J K flip flip with set and reset in a 16 Lead plastic DIP
MM74HC157 Quad 2-Input Multiplexer
Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and
CD40106BC Hex Schmitt Trigger
CD40106BC Hex Schmitt Trigger General Description The CD40106BC Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N and P-channel enhancement transistors.
CD4049UBC CD4050BC Hex Inverting Buffer Hex Non-Inverting Buffer
CD4049UBC CD4050BC Hex Inverting Buffer Hex Non-Inverting Buffer General Description The CD4049UBC and CD4050BC hex buffers are monolithic complementary MOS (CMOS) integrated circuits constructed with
CD4028BC BCD-to-Decimal Decoder
BCD-to-Decimal Decoder General Description The is a BCD-to-decimal or binary-to-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to the 4 inputs, A,
MM74HC154 4-to-16 Line Decoder
4-to-16 Line Decoder General Description The MM74HC154 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications. It possesses high
CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset
October 1987 Revised January 1999 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset General Description The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits
MM74HC138 3-to-8 Line Decoder
3-to-8 Line Decoder General Description The MM74HC138 decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications. The circuit features
MM74HC32 Quad 2-Input OR Gate
Quad 2-Input OR Gate General Description The MM74HC32 OR gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard
MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer
September 1983 Revised February 1999 MM74HC540 MM74HC541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description The MM74HC540 and MM74HC541 3-STATE buffers utilize advanced silicon-gate
MM74HCT138 3-to-8 Line Decoder
3-to-8 Line Decoder General Description The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits
MM74HC244 Octal 3-STATE Buffer
MM74HC244 Octal 3-STATE Buffer General Description The MM74HC244 is a non-inverting buffer and has two active low enables (1G and 2G); each enable independently controls 4 buffers. This device does not
NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output
NTE74HC299 Integrated Circuit TTL High Speed CMOS, 8 Bit Universal Shift Register with 3 State Output Description: The NTE74HC299 is an 8 bit shift/storage register with three state bus interface capability
MM74HC08 Quad 2-Input AND Gate
Quad 2-Input AND Gate General Description The MM74HC08 AND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption of standard
MM74HC139 Dual 2-To-4 Line Decoder
MM74HC139 Dual 2-To-4 Line Decoder General Description The MM74HC139 decoder utilizes advanced silicon-gate CMOS technology, and is well suited to memory address decoding or data routing applications.
MM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter
February 1984 Revised February 1999 MM74HC4020 MM74HC4040 14-Stage Binary Counter 12-Stage Binary Counter General Description The MM74HC4020, MM74HC4040, are high speed binary ripple carry counters. These
MM74HCT540 MM74HCT541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer
February 1984 Revised February 1999 MM74HCT540 MM74HCT541 Inverting Octal 3-STATE Buffer Octal 3-STATE Buffer General Description The MM74HCT540 and MM74HCT541 3-STATE buffers utilize advanced silicon-gate
MM74HC164 8-Bit Serial-in/Parallel-out Shift Register
8-Bit Serial-in/Parallel-out Shift Register General Description Ordering Code: September 1983 Revised February 1999 The MM74HC164 utilizes advanced silicon-gate CMOS technology. It has the high noise immunity
Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics
CD4001BM CD4001BC Quad 2-Input NOR Buffered B Series Gate CD4011BM CD4011BC Quad 2-Input NAND Buffered B Series Gate General Description These quad gates are monolithic complementary MOS (CMOS) integrated
MM74HC175 Quad D-Type Flip-Flop With Clear
Quad D-Type Flip-Flop With Clear General Description The MM74HC175 high speed D-type flip-flop with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise immunity
Features. Y Wide supply voltage range 3 0V to 15V. Y High noise immunity 0 45 VDD (typ ) Y Low power TTL fan out of 2 driving 74L
CD4023BM CD4023BC Buffered Triple 3-Input NAND Gate CD4025BM CD4025BC Buffered Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits
74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting. Product data sheet
3-to-8 line decoder, demultiplexer with address latches; inverting Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky
CD4013BC Dual D-Type Flip-Flop
Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors. Each
MC14532B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648
The MC4532B is constructed with complementary MOS (CMOS) enhancement mode devices. The primary function of a priority encoder is to provide a binary address for the active input with the highest priority.
MM74HC74A Dual D-Type Flip-Flop with Preset and Clear
MM74HC74A Dual D-Type Flip-Flop with Preset and Clear General Description The MM74HC74A utilizes advanced silicon-gate CMOS technology to achieve operating speeds similar to the equivalent LS-TTL part.
CD4071BC CD4081BC Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate
Quad 2-Input OR Buffered B Series Gate Quad 2-Input AND Buffered B Series Gate General Description The CD4071BC and CD4081BC quad gates are monolithic complementary MOS (CMOS) integrated circuits cotructed
CD4028BC BCD-to-Decimal Decoder
CD4028BC BCD-to-Decimal Decoder General Description The CD4028BC is a BCD-to-decimal or binary-to-octal decoder consisting of 4 inputs, decoding logic gates, and 10 output buffers. A BCD code applied to
MM74HC251 8-Channel 3-STATE Multiplexer
8-Channel 3-STATE Multiplexer General Description The MM74HC251 8-channel digital multiplexer with 3- STATE outputs utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and
M74HC20TTR DUAL 4-INPUT NAND GATE
DUAL 4-INPUT NAND GATE HIGH SPEED: t PD = 9ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 1µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
MM74HCT08 Quad 2-Input AND Gate
MM74HCT08 Quad 2-Input AND Gate General Description The MM74HCT08 is a logic function fabricated by using advanced silicon-gate CMOS technology which provides the inherent benefits of CMOS low quiescent
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate General Description Employing complementary MOS (CMOS) transistors to achieve wide power supply operating
CD54HC11, CD74HC11, CD54HCT11, CD74HCT11
CDHC, CD7HC, CDHCT, CD7HCT Data sheet acquired from Harris Semiconductor SCHS7E August 997 - Revised September 00 High-Speed CMOS Logic Triple -Input AND Gate [ /Title (CD HCT, CD7 HC, CD7 HCT ) /Subject
MC14511B. MARKING DIAGRAMS 16. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2) ORDERING INFORMATION
The MC14511B BCD to seven segment latch/decoder/driver is cotructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar output drivers in a single monolithic structure. The circuit provides
MM74HC373 3-STATE Octal D-Type Latch
3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption
Excellent Integrated System Limited
Excellent Integrated System Limited Stocking Distributor Click to view price, real time Inventory, Delivery & Lifecycle Information: Fairchild Semiconductor CD4050BCN For any questio, you can email us
Obsolete Product(s) - Obsolete Product(s)
8-INPUT NAND GATE HIGH SPEED: t PD = 13ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 1µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: I
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate
CD4023M CD4023C Triple 3-Input NAND Gate CD4025M CD4025C Triple 3-Input NOR Gate General Description These triple gates are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and
Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics
CD4001BM CD4001BC Quad 2-Input NOR Buffered B Series Gate CD4011BM CD4011BC Quad 2-Input NAND Buffered B Series Gate General Description These quad gates are monolithic complementary MOS (CMOS) integrated
CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop
Hex D-Type Flip-Flop Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered D- type flip-flops; the true outputs from each flip-flop are externally available. The
CD4021BC 8-Stage Static Shift Register
8-Stage Static Shift Register General Description The CD4021BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individual JAM inputs to each of 8 stages.
Features. Y Low power TTL Fan out of 2 driving 74L. Y 5V 10V 15V parametric ratings. Y Symmetrical output characteristics
CD4071BM CD4071BC Quad 2-Input OR Buffered B Series Gate CD4081BM CD4081BC Quad 2-Input AND Buffered B Series Gate General Description These quad gates are monolithic complementary MOS (CMOS) integrated
MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter
MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power
CD4024BC 7-Stage Ripple Carry Binary Counter
CD4024BC 7-Stage Ripple Carry Binary Counter General Description The CD4024BC is a 7-stage ripple-carry binary counter. Buffered outputs are externally available from stages 1 through 7. The counter is
NTE40160B, NTE40161B NTE40162B, NTE40163B Integrated Circuit CMOS, Synchronous Programmable 4 Bit Counters
NTE40160B, NTE40161B NTE40162B, NTE40163B Integrated Circuit CMOS, Synchronous Programmable 4Bit Counters Description: The NTE40160B (Decade w/asynchronous Clear), NTE40161B (Binary w/asynchronous Clear),
UNISONIC TECHNOLOGIES CO., LTD U74HC14
UNISONIC TECHNOLOGIES CO., LTD U74HC14 HIGH-SPEED CMOS LOGIC HEX INVERTING SCHMITT TRIGGER DESCRIPTION The UTC U74HC14 each contain six inverting Schmitt triggers in one package. Each of them perform the
74VHC00 Quad 2-Input NAND Gate
Quad 2-Input NAND Gate General Description The HC00 is an advanced high-speed CMOS 2-Input NAND Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent
MM74HC373 3-STATE Octal D-Type Latch
MM74HC373 3-STATE Octal D-Type Latch General Description The MM74HC373 high speed octal D-type latches utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power
MM74HC374 3-STATE Octal D-Type Flip-Flop
3-STATE Octal D-Type Flip-Flop General Description The MM74HC374 high speed Octal D-Type Flip-Flops utilize advanced silicon-gate CMOS technology. They possess the high noise immunity and low power consumption
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines
CD4528BC Dual Monostable Multivibrator
Dual Monostable Multivibrator General Description The CD4528BC is a dual monostable multivibrator. Each device is retriggerable and resettable. Triggering can occur from either the rising or falling edge
MM54HC08 MM74HC08 Quad 2-Input AND Gate
MM54HC08 MM74HC08 Quad 2-Input AND Gate General Description These AND gates utilize advanced silicon-gate CMOS technology to achieve operating speeds similar to LS-TTL gates with the low power consumption
Obsolete Product(s) - Obsolete Product(s)
DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT LOW ON SELECT EXPANDABLE WITH MULTIPLE PACKAGES STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V
MM74HC573 3-STATE Octal D-Type Latch
MM74HC573 3-STATE Octal D-Type Latch General Description The MM74HC573 high speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low
HCF4555B DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT HIGH ON SELECT
DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXER OUTPUT HIGH ON SELECT EXPANDABLE WITH MULTIPLE PACKAGES STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V 5V, 10V AND 15V
BCD-TO-DECIMAL DECODER HIGH-VOLTAGE SILICON-GATE CMOS IW4028B TECHNICAL DATA
TECHNICAL DATA BCD-TO-DECIMAL DECODER HIGH-OLTAGE SILICON-GATE CMOS IW4028B The IW4028B types are BCD-to-decimal or binary-tooctal decoders consisting of buffering on all 4 inputs, decoding-logic gates,
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate
CD4070BM CD4070BC Quad 2-Input EXCLUSIVE-OR Gate CD4077BM CD4077BC Quad 2-Input EXCLUSIVE-NOR Gate General Description Employing complementary MOS (CMOS) transistors to achieve wide power supply operating
MM74HC574 3-STATE Octal D-Type Edge-Triggered Flip-Flop
3-STATE Octal D-Type Edge-Triggered Flip-Flop General Description The MM74HC574 high speed octal D-type flip-flops utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity
MM54HCT193 MM74HCT193 Synchronous Binary Up Down Counters
MM54HCT193 MM74HCT193 Synchronous Binary Up Down Counters General Description These high speed synchronous counters utilize advanced silicon-gate CMOS technology to achieve the high noise immunity and
MM54HC244 MM74HC244 Octal TRI-STATE Buffer
MM54HC244 MM74HC244 Octal TRI-STATE Buffer General Description These TRI-STATE buffers utilize advanced silicon-gate CMOS technology and are general purpose high speed noninverting buffers They possess
MM74C906 Hex Open Drain N-Channel Buffers
Hex Open Drain N-Channel Buffers General Description The MM74C906 buffer employs monolithic CMOS technology in achieving open drain outputs. The MM74C906 consists of six inverters driving six N-channel
74HC257; 74HCT257. Quad 2-input multiplexer; 3-state
Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has four identical 2-input multiplexers with
NTE40194B Integrated Circuit CMOS, 4 Bit Bidirectional Universal Shift Register
NTE4194B Integrated Circuit CMOS, 4Bit Bidirectional Universal Shift Register Description: The NTE4194B is a universal shift register in a 16Lead DIP type package featuring parallel inputs, parallel outputs
MM54HC154 MM74HC154 4-to-16 Line Decoder
MM54HC154 MM74HC154 4-to-16 Line Decoder General Description This decoder utilizes advanced silicon-gate CMOS technology and is well suited to memory address decoding or data routing applications It possesses
2 Input NAND Gate L74VHC1G00
Input NAND Gate The is an advanced high speed CMOS input NAND gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining
NTE74LS181 Integrated Circuit TTL Arithmetic Logic Unit/Function Generator
NTE74LS181 Integrated Circuit TTL Arithmetic Logic Unit/Function Generator Description: The NTE74LS181 is an arithmetic logic unit (ALU)/function generator in a 24 Lead DIP type package that has the complexity
INTEGRATED CIRCUITS. 74ALS11A Triple 3-Input AND gate. Product specification 1991 Feb 08 IC05 Data Handbook
INTEGRATED CIRCUITS Triple 3-Input AND gate 1991 Feb 08 IC05 Data Handbook TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 5.5ns 1.3mA PIN CONFIGURATION 1A 1 1B 2 14 13 V CC 1C ORDERING INFORMATION
Obsolete Product(s) - Obsolete Product(s)
DUAL 4 CHANNEL MULTIPLEXER 3 STATE OUTPUT HIGH SPEED: t PD = 16ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL
MC14175B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648
The MC14175B quad type D flip flop is cotructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure. Each of the four flip flops is positive edge triggered by a common
MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter
MM74C00 MM74C02 MM74C04 Quad 2-Input NAND Gate Quad 2-Input NOR Gate Hex Inverter General Description The MM74C00, MM74C02, and MM74C04 logic gates employ complementary MOS (CMOS) to achieve wide power
MM74HC4020 MM74HC Stage Binary Counter 12-Stage Binary Counter
MM74HC4020 MM74HC4040 14-Stage Binary Counter 12-Stage Binary Counter General Description The MM54HC4020/MM74HC4020, MM54HC4040/ MM74HC4040, are high speed binary ripple carry counters. These counters
MM74HC161 MM74HC163 Synchronous Binary Counter with Asynchronous Clear Synchronous Binary Counter with Synchronous Clear
September 1983 Revised February 1999 MM74HC161 MM74HC163 Synchronous Binary Counter with Asynchronous Clear Synchronous Binary Counter with Synchronous Clear General Description The MM74HC161 and MM74HC163
INTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS
CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders
CD4514BC CD4515BC 4-Bit Latched/4-to-16 Line Decoders General Description The CD4514BC and CD4515BC are 4-to-16 line decoders with latched inputs implemented with complementary MOS (CMOS) circuits constructed
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS
1-OF-8 DECODER/DEMULTIPLEXER High-Speed Silicon-Gate CMOS The IN74AC138 is identical in pinout to the LS/ALS138, HC/HCT138. The device inputs are compatible with standard CMOS outputs; with pullup resistors,
CD54/74HC147, CD74HCT147. High Speed CMOS Logic 10-to-4 Line Priority Encoder. Features. [ /Title (CD74 HC147, CD74 HCT14 7) /Subject
CD/7HC7, CD7HCT7 Data sheet acquired from Harris Semiconductor SCHS9B September 997 - Revised March 00 High 0-to- Encoder [ /Title (CD7 HC7, CD7 HCT 7) /Subject (High 0-to- Encode r) /Autho r () /Keywords
HCF4532B 8-BIT PRIORITY ENCODER
8-BIT PRIORITY ENCODER CONVERTS FROM 1 TO 8 TO INPUTS BINARY PROVIDES CASCADING FEATURE TO HANDLE ANY NUMBER OF INPUTS GROUP SELECT INDICATES ONE OR MORE PRIORITY INPUTS QUIESCENT CURRENT SPECIFIED UP
Octal 3-State Noninverting Transparent Latch
SL74HC73 Octal 3-State Noninverting Traparent Latch High-Performance Silicon-Gate CMOS The SL74HC73 is identical in pinout to the LS/ALS73. The device inputs are compatible with standard CMOS outputs;
M74HCT138TTR 3 TO 8 LINE DECODER (INVERTING)
3 TO 8 LINE DECODER (INVERTING) HIGH SPEED: t PD = 16ns (TYP.) at V CC = 4.5V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C COMPATIBLE WITH TTL OUTPUTS : V IH = 2V (MIN.) V IL = 0.8V (MAX) SYMMETRICAL
CD74HC151, CD74HCT151
Data sheet acquired from Harris Semiconductor SCHS150 September 1997 CD74HC151, CD74HCT151 High Speed CMOS Logic 8-Input Multiplexer [ /Title (CD74H C151, CD74H CT151) /Subject High peed MOS ogic 8- nput
74VHC00 Quad 2-Input NAND Gate
Quad 2-Input NAND Gate General Description The HC00 is an advanced high-speed CMOS 2-Input NAND Gate fabricated with silicon gate CMOS technology. It achieves the high-speed operation similar to equivalent
Obsolete Product(s) - Obsolete Product(s)
3 TO 8 LINE DECODER HIGH SPEED: t PD = 15ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
CD54/74HC367, CD54/74HCT367, CD54/74HC368, CD74HCT368
CD/HC, CD/HCT, CD/HC, CDHCT Data sheet acquired from Harris Semiconductor SCHSD November - Revised October 00 High-Speed CMOS Logic Hex Buffer/Line Driver, Three-State Non-Inverting and Inverting [ /Title
CD54/74HC32, CD54/74HCT32
Data sheet acquired from Harris Semiconductor SCHS7A September 997 - Revised May 000 CD/7HC, CD/7HCT High Speed CMOS Logic Quad -Input OR Gate [ /Title (CD HCT, CD7 HC, CD7 HCT ) /Subject High Features
MM54HC175 MM74HC175 Quad D-Type Flip-Flop With Clear
MM54HC175 MM74HC175 Quad D-Type Flip-Flop With Clear General Description This high speed D-TYPE FLIP-FLOP with complementary outputs utilizes advanced silicon-gate CMOS technology to achieve the high noise
HCC/HCF4042B QUAD CLOCKED D LATCH
QUAD CLOCKED D LATCH CLOCK POLARITY CONTROL Q AND Q OUTPUTS COMMON CLOCK LOW POWER TTL COMPATIBLE STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED TO 20 FOR HCC DEICE 5, 10,
DATA SHEET. HEF4031B MSI 64-stage static shift register. For a complete data sheet, please also download: INTEGRATED CIRCUITS
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF,
Obsolete Product(s) - Obsolete Product(s)
BCD TO DECIMAL DECODER HIGH SPEED : t PD = 14ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC =4µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
MM74HC259 8-Bit Addressable Latch/3-to-8 Line Decoder
MM74HC259 8-Bit Addressable Latch/3-to-8 Line Decoder General Description The MM74HC259 device utilizes advanced silicon-gate CMOS technology to implement an 8-bit addressable latch, designed for general
MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
February 1990 Revised May 1999 MM74HCT573 MM74HCT574 Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT573 octal D-type latches and MM74HCT574 octal D-type flip-flop advanced
MM74C14 Hex Schmitt Trigger
MM74C14 Hex Schmitt Trigger General Description The MM74C14 Hex Schmitt Trigger is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. The