MC14093B. Quad 2-Input NAND" Schmitt Trigger

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Bernard Nelson
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MC493B Quad 2-Input NND" Shmitt Trigger The MC493B Shmitt trigger is onstruted with MOS Phannel and Nhannel enhanement mode devies in a single monolithi struture.

1 MC493B Quad 2-Input NND" Shmitt Trigger The MC493B Shmitt trigger is onstruted with MOS Phannel and Nhannel enhanement mode devies in a single monolithi struture. These devies find primary use where low power dissipation and/or high noise immunity is desired. The MC493B may be used in plae of the MC4B quad 2input NND gate for enhaned noise immunity or to square up slowly hanging waveforms. Features Supply Voltage Range = 3. to 8 Capable of Driving Two LowPower TTL Loads or One LowPower Shottky TTL Load Over the Rated Temperature Range Triple Diode Protetion on ll Inputs PinforPin Compatible with CD493 Can be Used to Replae MC4B Independent ShmittTrigger at eah Input NLV Prefix for utomotive and Other ppliations Requiring Unique Site and Control Change Requirements; ECQ Qualified and PPP Capable These Devies are PbFree and are RoHS Compliant MXIMUM RTINGS (Voltages Referened to ) Symbol Parameter Value Unit DC Supply Voltage Range.5 to +8. V V in, V out Input or Output Voltage Range (DC or Transient).5 to +.5 V I in, I out P D Input or Output Current (DC or Transient) per Pin Power Dissipation, per Pakage (Note ) ± m 5 mw T mbient Temperature Range 55 to +25 C T stg Storage Temperature Range 65 to + C T L Lead Temperature (8Seond Soldering) 26 C Stresses exeeding those listed in the Maximum Ratings table may damage the devie. If any of these limits are exeeded, devie funtionality should not be assumed, damage may our and reliability may be affeted.. Temperature Derating: D/DW Pakages:. mw/ C From 65 C To 25 C This devie ontains protetion iruitry to guard against damage due to high stati voltages or eletri fields. However, preautions must be taken to avoid appliations of any voltage higher than maximum rated voltages to this highimpedane iruit. For proper operation, V in and V out should be onstrained to the range (V in or V out ). Unused inputs must always be tied to an appropriate logi voltage level (e.g., either or ). Unused outputs must be left open. SOIC4 D SUFFIX CSE 5 4 IN IN 2 OUT OUT B IN B IN 2 B 493BG WLYWW SOIC4 MRKING DIGRMS 4 WL, L YY, Y WW, W G or SOEIJ4 F SUFFIX CSE 965 PIN SSIGNMENT B LYW TSSOP4 4 MC493B LYWG SOEIJ4 = ssembly Loation = Wafer Lot = Year = Work Week = PbFree Pakage TSSOP4 DT SUFFIX CSE 948G (Note: Mirodot may be in either loation) ORDERING INFORMTION See detailed ordering and shipping information in the pakage dimensions setion on page 2 of this data sheet IN 2 D IN D OUT D OUT C IN 2 C IN C Semiondutor Components Industries, LLC, 24 ugust, 24 Rev. Publiation Order Number: MC493B/D

2 MC493B LOGIC DIGRM = PIN 4 = PIN EQUIVLENT CIRCUIT SCHEMTIC (/4 OF CIRCUIT SHOWN) ORDERING INFORMTION MC493BDG NLV493BDG* MC493BDR2G NLV493BDR2G* MC493BDTR2G Devie Pakage Shipping SOIC4 (PbFree) SOIC4 (PbFree) SOIC4 (PbFree) SOIC4 (PbFree) TSSOP4 (PbFree) 55 Units / Rail 55 Units / Rail 25 Units / Tape & Reel 25 Units / Tape & Reel 25 Units / Tape & Reel NLV493BDTR2G* TSSOP4 (PbFree) 25 Units / Tape & Reel MC493BFELG SOEIJ4 (PbFree) 2 Units / Tape & Reel For information on tape and reel speifiations, inluding part orientation and tape sizes, please refer to our Tape and Reel Pakaging Speifiations Brohure, BRD8/D. *NLV Prefix for utomotive and Other ppliations Requiring Unique Site and Control Change Requirements; ECQ Qualified and PPP Capable. 2

3 MC493B ELECTRICL CHRCTERISTICS (Voltages Referened to ) Charateristi Output Voltage V in = or V in = or Level Level Output Drive Current (V OH = 2.5 ) Soure (V OH = 4.6 ) (V OH = 9.5 ) (V OH = 3.5 ) (V OL =.4 ) Sink (V OL =.5 ) (V OL =.5 ) Symbol V OL 5. V OH 5. I OH I OL C 25 C 25 C Min Max Min Typ (Note 2) Max Min Max Input Current I in ±. ±. ±. ±. d Input Capaitane (V in = ) Quiesent Current (Per Pakage) Total Supply Current (Notes 3 & 4) (Dynami plus Quiesent, Per Pakage) (C L = 5 pf on all outputs, all buffers swithing) C in 5..5 pf I DD 5. I T 5. Hysteresis Voltage V H 5. Threshold Voltage PositiveGoing NegativeGoing V T+ 5. V T I T = (.2 /khz) f + I DD I T = (2.4 /khz) f + I DD I T = (3.6 /khz) f + I DD Produt parametri performane is indiated in the Eletrial Charateristis for the listed test onditions, unless otherwise noted. Produt performane may not be indiated by the Eletrial Charateristis if operated under different onditions. 2. Data labelled Typ is not to be used for design purposes but is intended as an indiation of the IC s potential performane. 3. The formulas given are for the typial harateristis only at 25 C. 4. To alulate total supply urrent at loads other than 5 pf: I T (C L ) = I T (5 pf) + (C L 5) Vfk where: I T is in (per pakage), C L in pf, V = ( ) in volts, f in khz is input frequeny, and k = Unit md md d d 3

4 MC493B SWITCHING CHRCTERISTICS (C L = 5 pf, T = 25 C) Charateristi Symbol Output Rise Time t TLH 5. Output Fall Time t THL 5. Propagation Delay Time t PLH, t PHL 5. Min Typ (Note 5) Max Unit 5. Data labeled Typ is not to be used for design purposes but is intended as an indiation of the IC s potential performane ns ns ns 2 ns 2 ns PULSE GENERTOR INPUT 4 VSS C L OUTPUT INPUT t PHL OUTPUT 9% 5% % 9% 5% % t PLH V OH V OL t THL t TLH Figure. Swithing Time Test Ciruit and Waveforms V H V H V in V in V out V out (a) Shmitt Triggers will square up (a) inputs with slow rise and fall times. (b) Shmitt trigger offers maximum (b) noise immunity in gate appliations. Figure 2. Typial Shmitt Trigger ppliations 4

5 MC493B 4 I OH V out V GS 4 I OL V out ll unused inputs onneted to ground. V GS ll unused inputs onneted to ground. IOH, DRIN CURRENT (md) a T = - 55 C b T = + 25 C b T = + 25 C V GS = a a V DS, DRIN VOLTGE () Figure 3. Typial Output Soure Charateristis Test Ciruit b a b b - I OL, DRIN CURRENT (md) a b b a V GS = a 2. b V DS, DRIN VOLTGE () Figure 4. Typial Output Sink Charateristis Test Ciruit a T = - 55 C b T = + 25 C T = + 25 C Vout, OUTPUT VOLTGE () VDD V T- V T+ V H V in, INPUT VOLTGE () Figure 5. Typial Transfer Charateristis 5

6 MC493B PCKGE DIMENSIONS SOIC4 NB CSE 53 ISSUE K H M B M e D 3X b B E.25 M C S B S C SETING PLNE L DETIL h X 45 M 3 DETIL NOTES:. DIMENSIONING ND TOLERNCING PER SME Y4.5M, CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE PROTRUSION SHLL BE.3 TOTL IN EXCESS OF T MXIMUM MTERIL CONDITION. 4. DIMENSIONS D ND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MXIMUM MOLD PROTRUSION. PER SIDE. MILLIMETERS INCHES DIM MIN MX MIN MX b D E e.2 BSC BSC H h L M SOLDERING FOOTPRINT* 6.5 4X.8.2 PITCH 4X.58 DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiondutor Soldering and Mounting Tehniques Referene Manual, SOLDERRM/D. 6

7 MC493B PCKGE DIMENSIONS TSSOP4 CSE 948G ISSUE B. (.6) T. (.6) T L. (.4) T SETING PLNE U U S 2X L/2 PIN IDENT. S D C 4 4X K REF. (.4) M T U S V S N 8.25 (.) M B U V G H N J J F DETIL E K K ÇÇÇ ÉÉÉ SECTION NN DETIL E W NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION DOES NOT INCLUDE MOLD FLSH, PROTRUSIONS OR GTE BURRS. MOLD FLSH OR GTE BURRS SHLL NOT EXCEED. (.6) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLED FLSH OR PROTRUSION. INTERLED FLSH OR PROTRUSION SHLL NOT EXCEED.25 (.) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE.8 (.3) TOTL IN EXCESS OF THE K DIMENSION T MXIMUM MTERIL CONDITION. 6. TERMINL NUMBERS RE SHOWN FOR REFERENCE ONLY.. DIMENSION ND B RE TO BE DETERMINED T DTUM PLNE W. MILLIMETERS INCHES DIM MIN MX MIN MX B C.2.4 D..2.6 F G.65 BSC.26 BSC H J J K K L 6.4 BSC.252 BSC M 8 8 SOLDERING FOOTPRINT*.6.65 PITCH 4X.36 4X.26 DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiondutor Soldering and Mounting Tehniques Referene Manual, SOLDERRM/D.

8 MC493B PCKGE DIMENSIONS SOEIJ4 CSE 965 ISSUE B L E 4 8 Q E H E M L Z DETIL P D VIEW P e b.3 (.5) M. (.4) NOTES:. DIMENSIONING ND TOLERNCING PER NSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D ND E DO NOT INCLUDE MOLD FLSH OR PROTRUSIONS ND RE MESURED T THE PRTING LINE. MOLD FLSH OR PROTRUSIONS SHLL NOT EXCEED. (.6) PER SIDE. 4. TERMINL NUMBERS RE SHOWN FOR REFERENCE ONLY. 5. THE LED WIDTH DIMENSION (b) DOES NOT INCLUDE DMBR PROTRUSION. LLOWBLE DMBR PROTRUSION SHLL BE.8 (.3) TOTL IN EXCESS OF THE LED WIDTH DIMENSION T MXIMUM MTERIL CONDITION. DMBR CNNOT BE LOCTED ON THE LOWER RDIUS OR THE FOOT. MINIMUM SPCE BETWEEN PROTRUSIONS ND DJCENT LED TO BE.46 (.8). MILLIMETERS INCHES DIM MIN MX MIN MX b D E e.2 BSC BSC H E L L E M Q Z ON Semiondutor and the are registered trademarks of Semiondutor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other ountries. SCILLC owns the rights to a number of patents, trademarks, opyrights, trade serets, and other intelletual property. listing of SCILLC s produt/patent overage may be aessed at SCILLC reserves the right to make hanges without further notie to any produts herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its produts for any partiular purpose, nor does SCILLC assume any liability arising out of the appliation or use of any produt or iruit, and speifially dislaims any and all liability, inluding without limitation speial, onsequential or inidental damages. Typial parameters whih may be provided in SCILLC data sheets and/or speifiations an and do vary in different appliations and atual performane may vary over time. ll operating parameters, inluding Typials must be validated for eah ustomer appliation by ustomer s tehnial experts. SCILLC does not onvey any liense under its patent rights nor the rights of others. SCILLC produts are not designed, intended, or authorized for use as omponents in systems intended for surgial implant into the body, or other appliations intended to support or sustain life, or for any other appliation in whih the failure of the SCILLC produt ould reate a situation where personal injury or death may our. Should Buyer purhase or use SCILLC produts for any suh unintended or unauthorized appliation, Buyer shall indemnify and hold SCILLC and its offiers, employees, subsidiaries, affiliates, and distributors harmless against all laims, osts, damages, and expenses, and reasonable attorney fees arising out of, diretly or indiretly, any laim of personal injury or death assoiated with suh unintended or unauthorized use, even if suh laim alleges that SCILLC was negligent regarding the design or manufature of the part. SCILLC is an Equal Opportunity/ffirmative tion Employer. This literature is subjet to all appliable opyright laws and is not for resale in any manner. PUBLICTION ORDERING INFORMTION LITERTURE FULFILLMENT: Literature Distribution Center for ON Semiondutor P.O. Box 563, Denver, Colorado 82 US Phone: or Toll Free US/Canada Fax: or Toll Free US/Canada orderlit@onsemi.om N. merian Tehnial Support: Toll Free US/Canada Europe, Middle East and fria Tehnial Support: Phone: Japan Customer Fous Center Phone: ON Semiondutor Website: Order Literature: For additional information, please ontat your loal Sales Representative MC493B/D

MC14093B. Quad 2 Input NAND" Schmitt Trigger

MC14093B. Quad 2 Input NAND Schmitt Trigger MC4093B Quad 2Input NAND" Shmitt Trigger The MC4093B Shmitt trigger is onstruted with MOS Phannel and Nhannel enhanement mode devies in a single monolithi struture. These devies find primary use where