INTEGRATED CIRCUITS. For a complete data sheet, please also download:

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1 INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS ogic Package Outlines 74C/CT253 File under Integrated Circuits, IC06 December 1990

2 74C/CT253 FEATURES Non-inverting data path 3-state outputs for bus interface and multiplex expansion Common select inputs Separate output enable inputs Output capability: bus driver I CC category: MSI GENERA DESCRIPTION The 74C/CT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TT (STT). They are specified in compliance with JEDEC standard no. 7A. The 74C/CT253 have two identical 4-input multiplexers with 3-state outputs which select two bits from four sources selected by common data select inputs (S 0,S 1 ). When the individual output enable (1OE, 2OE) inputs of the 4-input multiplexers are IG, the outputs are forced to the high impedance OFF-state. The 253 is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels applied to S 0 and S 1. The logic equations for the outputs are: 1Y=1OE(1l 0.S 1.S 0 +1I 1.S 1.S 0 +1I 2.S 1.S 0 +1I 3.S 1.S 0 ) 2Y=2OE(2l 0.S 1.S 0 +2I 1.S 1.S 0 +2I 2.S 1.S 0 +2I 3.S 1.S 0 ) APPICATIONS Data selectors Data multiplexers QUICK REFERENCE DATA GND = 0 V; T amb = 25 C; t r = t f = 6 ns TYPICA SYMBO PARAMETER CONDITIONS C CT UNIT t P / t P propagation delay C = 15 pf; V CC = 5 V 1I n, 2I n to ny; ns S n to ny ns C I input capacitance pf C PD power dissipation capacitance per multiplexer notes 1 and pf Notes 1. C PD is used to determine the dynamic power dissipation (P D in µw): P D = C PD V 2 CC f i + (C V 2 CC f o ) where: f i = input frequency in Mz f o = output frequency in Mz (C V 2 CC f o ) = sum of outputs C = output load capacitance in pf V CC = supply voltage in V 2. For C the condition is V I = GND to V CC For CT the condition is V I = GND to V CC 1.5 V ORDERING INFORMATION See 74C/CT/CU/CMOS ogic Package Information. December

3 74C/CT253 PIN DESCRIPTION PIN NO. SYMBO NAME AND FUNCTION 1, 15 1OE, 2OE output enable inputs (active OW) 14, 2 S 0,S 1 common data select inputs 7, 9 1Y, 2Y 3-state multiplexer outputs 8 GND ground (0 V) 6, 5, 4, 3 1I 0 to 1I 3 data inputs from source 1 10, 11, 12, 13 2I 0 to 2I 3 data inputs from source 2 16 V CC positive supply voltage Fig.1 Pin configuration. Fig.2 ogic symbol. Fig.3 IEC logic symbol. December

4 December Philips Semiconductors 74C/CT253 FUNCTION TABE NOTES 1. = IG voltage level = OW voltage level = don t care Z = high impedance OFF-state SEECT INPUTS DATA INPUTS OUTPUT ENABE OUTPUT S 0 S 1 ni 0 ni 1 ni 2 ni 3 noe ny Z Fig.4 Functional diagram. Fig.5 ogic diagram.

5 74C/CT253 DC CARACTERISTICS FOR 74C For the DC characteristics see 74C/CT/CU/CMOS ogic Family Specifications. Output capability: bus driver I CC category: MSI AC CARACTERISTICS FOR 74C GND = 0 V; t r = t f = 6 ns; C = 50 pf SYMBO t P / t P t P / t P t PZ / t PZ t PZ / t PZ PARAMETER propagation delay 1I n to ny; 2I n to ny propagation delay S n to ny 3-state output enable time 3-state output disable time T amb ( C) 74C to to +125 min. typ. max. min. max. min. max t T / t T output transition time UNIT TEST CONDITIONS V CC (V) WAVEFORMS Fig.7 Fig.7 December

6 74C/CT253 DC CARACTERISTICS FOR 74CT For the DC characteristics see 74C/CT/CU/CMOS ogic Family Specifications. Output capability: bus driver I CC category: MSI Note to CT types The value of additional quiescent supply current ( I CC ) for a unit load of 1 is given in the family specifications. To determine I CC per input, multiply this value by the unit load coefficient shown in the table below. INPUT 1I n 2I n noe S 0 S 1 UNIT OAD COEFFICIENT AC CARACTERISTICS FOR 74CT GND = 0 V; t r = t f = 6 ns; C = 50 pf SYMBO t P / t P PARAMETER propagation delay 1I n to ny; 2I n to ny T amb ( C) 74CT to to +125 min. typ. max. min. max. min. max. UNIT TEST CONDITIONS V CC (V) ns t P / t P propagation delay ns S n to ny t PZ / t PZ 3-state output enable time ns Fig.7 t PZ / t PZ 3-state output disable time ns Fig.7 t T / t T output transition time ns WAVEFORMS December

7 74C/CT253 AC WAVEFORMS (1) C : V M = 50%; V I = GND to V CC. CT: V M = 1.3 V; V I = GND to 3 V. Waveforms showing the input (1I n,2i n ) to output (1Y, 2Y) propagation delays and the output transition times. (1) C : V M = 50%; V I = GND to V CC. CT: V M = 1.3 V; V I = GND to 3 V. Fig.7 Waveforms showing the 3-state enable and disable times. PACKAGE OUTINES See 74C/CT/CU/CMOS ogic Package Outlines. December

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS