INTEGRATED CIRCUITS. For a complete data sheet, please also download:

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1 INTEGRATED CIRCUITS DATA SHEET F a complete data sheet, please also download: The IC6 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC6 74HC/HCT/HCU/HCMOS Logic Package Infmation The IC6 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT433 File under Integrated Circuits, IC6 December 199

2 74HC/HCT433 FEATURES Wide analog input voltage range: ± V Low ON resistance: 8 (typ.) at = V 7 (typ.) at = 6. V 6 (typ.) at = 9. V Logic level translation: to enable V logic to communicate with ± V analog signals Typical break befe make built in Address latches provided Output capability: non-standard I CC categy: MSI GENERAL DESCRIPTION The 74HC/HCT433 are high-speed Si-gate CMOS devices. They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT433 are triple 2-channel analog multiplexers/demultiplexers with two common enable inputs (E 1 and E 2 ) and a latch enable input (LE). Each multiplexer has two independent inputs/outputs (ny and ny 1 ), a common input/output (nz) and select inputs (S 1 to S 3 ). Each multiplexer/demultiplexer contains two bidirectional analog switches, each with one side connected to an independent input/output (ny and ny 1 ) and the other side connected to a common input/output (nz). With E 1 LOW and E 2 HIGH, one of the two switches is selected (low impedance ON-state) by S 1 to S 3. The data at the select inputs may be latched by using the active LOW latch enable input (LE). When LE is HIGH, the latch is transparent. When either of the two enable inputs, E 1 (active LOW) and E 2 (active HIGH), is inactive, all analog switches are turned off. and GND are the supply voltage pins f the digital control inputs (S 1 to S 3, LE, E 1 and E 2 ). The to GND ranges are 2. to 1. V f HC and to. V f HCT. The analog inputs/outputs (ny and ny 1, and nz) can swing between as a positive limit and as a negative limit. may not exceed 1. V. F operation as a digital multiplexer/demultiplexer, is connected to GND (typically ground). QUICK REFERENCE DATA = GND = V; T amb = 2 C; t r = t f = 6 ns TYPICAL SYMBOL PARAMETER CONDITIONS HC HCT UNIT t PZH / t PZL turn ON time E 1,E 2 S n to V os C L = pf; R L =1 k; ns t PHZ / t PLZ turn OFF time E 1,E 2 S n to V os = V 2 22 ns C I input capacitance pf C PD power dissipation capacitance per switch notes 1 and pf C S max. switch capacitance independent (Y) pf common (Z) 8 8 pf Notes 1. C PD is used to determine the dynamic power dissipation (P D in µw): P D = C PD V 2 CC f i + {(C L +C S ) V 2 CC f o } where: f i = input frequency in MHz C L = output load capacitance in pf f o = output frequency in MHz C S = max. switch capacitance in pf {(C L C S ) V 2 CC f o } = sum of outputs = supply voltage in V 2. F HC the condition is V I = GND to F HCT the condition is V I = GND to 1. V ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS Logic Package Infmation. December 199 2

3 74HC/HCT433 PIN DESCRIPTION PIN NO. SYMBOL NAME AND FUNCTION 2, 1 2Y,2Y 1 independent inputs/outputs 3Z common input/output 6, 4 3Y,3Y 1 independent inputs/outputs 3, 14 n.c. not connected 7 E 1 enable input (active LOW) 8 E 2 enable input (active HIGH) 9 negative supply voltage 1 GND ground ( V) 11 LE latch enable input (active LOW) 1, 13, 12 S 1 to S 3 select inputs 16, 17 1Y,1Y 1 independent inputs/outputs 18 1Z common input/output 19 2Z common input/output 2 positive supply voltage Fig.1 Pin configuration. Fig.2 Logic symbol. Fig.3 IEC logic symbol. December 199 3

4 74HC/HCT433 FUNCTION TABLE INPUTS E 1 E 2 LE S n H L L L H L H H H H H L L H none none CHANNEL ON ny nz ny 1 nz (1) (2) Notes 1. Last selected channel ON. 2. Selected channels latched. H = HIGH voltage level L = LOW voltage level = don t care = HIGH-to-LOW LE transition APPLICATIONS Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating Fig.4 Functional diagram. Fig. Schematic diagram (one switch). December 199 4

5 74HC/HCT433 RATINGS Limiting values in accdance with the Absolute Maximum System (IEC 134) Voltages are referenced to = GND (ground = V) SYMBOL PARAMETER MIN. MA. UNIT CONDITIONS DC supply voltage V ±I IK DC digital input diode current 2 ma f V I <. V V I > +. V ±I SK DC switch diode current 2 ma f V S <. V V S > +. V ±I S DC switch current 2 ma f. V < V S < +. V ±I EE DC current 2 ma ±I CC ; DC GND current ma ±I GND T stg stage temperature range 6 +1 C P tot power dissipation per package f temperature range: 4 to +12 C 74HC/HCT plastic DIL 7 mw above +7 C: derate linearly with 12 mw/k plastic mini-pack (SO) mw above +7 C: derate linearly with 8 mw/k P S power dissipation per switch 1 mw Note to ratings 1. To avoid drawing current out of terminals nz, when switch current flows in terminals ny n, the voltage drop across the bidirectional switch must not exceed.4 V. If the switch current flows into terminals nz, no current will flow out of terminals ny n. In this case there is no limit f the voltage drop across the switch, but the voltages at ny n and nz may not exceed. RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER 74HC 74HCT min. typ. max. min. typ. max. UNIT CONDITIONS DC supply voltage GND V see Figs 6 and 7 DC supply voltage V see Figs 6 and 7 V I DC input voltage range GND GND V V S DC switch voltage range V T amb operating ambient temperature range C see DC and AC T amb operating ambient temperature range C CHARACTER- ISTICS t r,t f input rise and fall times 1 = 2. V 6. V 6. ns CC = V 4 = 6. V 2 = 1. V December 199

6 74HC/HCT433 1 handbook, halfpage - GND 8 MBA334 6 operating area Fig.6 Guaranteed operating area as a function of the supply voltages f 74HC433. Fig.7 Guaranteed operating area as a function of the supply voltages f 74HCT433. DC CHARACTERISTICS FOR 74HC/HCT F 74HC: GND = 2.,, 6. and 9. V F 74HCT: GND = and. V; = 2.,, 6. and 9. V SYMBOL R ON R ON PARAMETER ON resistance (peak) ON resistance (rail) T amb ( C) 74HC/HCT +2 4 to +8 4 to +12 min. typ. max. min. max. min. max R ON ON resistance R ON maximum ON resistance between any two channels UNIT TEST CONDITIONS I S (µa) V is to to V I V IN V IH V IH V IH Notes to DC characteristics 1. At supply voltages ( ) approaching 2. V the analog switch ON-resistance becomes extremely non-linear. There it is recommended that these devices be used to transmit digital signals only, when using these supply voltages. 2. F test circuit measuring R ON see Fig.8. December 199 6

7 74HC/HCT433 DC CHARACTERISTICS FOR 74HC Voltages are referenced to GND (ground = V) T amb ( C) TEST CONDITIONS SYMBOL PARAMETER 74HC +2 4 to +8 4 to +12 min. typ. max. min. max. min. max. UNIT V I OTHER V IH HIGH level input voltage V LOW level input voltage V ±I I input leakage current µa GND ±I S analog switch OFF-state current per channel µa 1. V IH V S = (see Fig.1) ±I S analog switch OFF-state current all channels µa 1. V IH V S = (see Fig.1) ±I S analog switch ON-state current µa 1. V IH V S = (see Fig.11) I CC quiescent supply current µa GND V is = ;V os = December 199 7

8 74HC/HCT433 AC CHARACTERISTICS FOR 74HC GND = V; t r =t f = 6 ns; C L = pf SYMBOL t PHL / t PLH t PZH / t PZL t PZH / t PZL t PZH / t PZL t PHZ / t PLZ t PHZ / t PLZ PARAMETER propagation delay 14 V is to V os 4 4 turn ON time 61 E 1 ;E 2 to V os turn ON time LE to V os turn ON time 61 S n to V os turn OFF time 66 E 1 ;E 2 to V os turn OFF time S n to V os ; LE to V os t su set-up time S n to LE t h hold time S n to LE t W LE minimum pulse width HIGH T amb ( C) 74HC +2 4 to +8 4 to +12 min. typ. max. min. max. min. max UNIT ns ns ns ns ns ns ns ns ns TEST CONDITIONS OTHER R L = ; C L = pf (see Fig.18) C L = pf C L = pf C L = pf C L = pf C L = pf C L = pf (see Fig.2) C L = pf (see Fig.2) C L = pf (see Fig.2) December 199 8

9 74HC/HCT433 DC CHARACTERISTICS FOR 74HCT Voltages are referenced to GND (ground = V) T amb ( C) TEST CONDITIONS SYMBOL PARAMETER 74HCT +2 4 to +8 4 to +12 min. typ. max. min. max. min. max. UNIT V I OTHER V IH HIGH level input voltage LOW level input voltage ±I I input leakage current ±I S analog switch OFF-state current per channel ±I S analog switch OFF-state current all channels ±I S analog switch ON-state current I CC I CC quiescent supply current additional quiescent supply current per input pin f unit load coefficient is 1 (note 1) V to V to µa. GND µa 1. V IH µa 1. V IH µa 1. V IH µa µa to.. GND 2.1 V V S = Fig.1 V S = Fig.1 V S = Fig.11 V is = ; V os = other inputs at GND Note to HCT types 1. The value of additional quiescent supply current ( I CC ) f a unit load of 1 is given here. To determine I CC per input, multiply this value by the unit load coefficient shown in the table below. INPUT E 1,E 2 S n LE UNIT LOAD COEFFICIENT.. 1. December 199 9

10 74HC/HCT433 AC CHARACTERISTICS FOR 74HCT GND = V; t r =t f = 6 ns; C L = pf SYMBOL t PHL / t PLH t PZH / t PZL t PZH / t PZL t PZH / t PZL t PZH / t PZL t PHZ / t PLZ t PHZ / t PLZ t PHZ / t PLZ t PHZ / t PLZ t su t h t W PARAMETER propagation delay V is to V os 4 turn ON time 26 E 1 to V os 22 turn ON time 22 E 2 to V os 18 turn ON time 21 LE to V os 17 turn ON time 2 S n to V os 19 turn OFF time 23 E 1 to V os 19 turn OFF time 27 E 2 to V os 23 turn OFF time 19 LE to V os 19 turn OFF time 22 S n to V os 22 set-up time S n to LE hold time S n to LE LE minimum pulse width HIGH T amb ( C) 74HCT +2 4 to +8 4 to +12 min. typ. max. min. max. min. max UNIT ns ns ns ns ns ns ns ns ns ns ns ns TEST CONDITIONS OTHER R L = ; C L = pf (see Fig.18) C L = pf C L = pf C L = pf C L = pf C L = pf C L = pf C L = pf C L = pf C L = pf (see Fig.2) C L = pf (see Fig.2) C L = pf (see Fig.2) December 199 1

11 74HC/HCT433 Fig.8 Test circuit f measuring R ON. Fig.9 Typical R ON as a function of input voltage V is f V is = to. Fig.1 Test circuit f measuring OFF-state current. Fig.11 Test circuit f measuring ON-state current. December

12 74HC/HCT433 ADDITIONAL AC CHARACTERISTICS FOR 74HC/HCT Recommended conditions and typical values GND = V; T amb =2 C SYMBOL PARAMETER typ. UNIT V is(p-p) CONDITIONS V (pp) f max C S sine-wave disttion f = 1 khz sine-wave disttion f = 1 khz switch OFF signal feed-through crosstalk between any two switches/ multiplexers crosstalk voltage between control and any switch (peak-to-peak value) minimum frequency response (3dB) maximum switch capacitance independent (Y) common (Z) % % % % db db db db mv mv MHz MHz pf pf note 1 note 1 note 2 R L = 1 k; C L = pf (see Fig.14) R L = 1 k; C L = pf (see Fig.14) R L = 6 ; C L = pf f = 1 MHz (see Figs 12 and 1) R L = 6 ; C L = pf; f = 1 MHz (see Fig.16) R L = 6 ; C L = pf; f = 1 MHz (E 1,E 2 S n, square-wave between and GND, t r =t f = 6 ns) (see Fig.17) R L =;C L = 1 pf (see Figs 13 and 14) Notes to the AC characteristics 1. Adjust input voltage V is to dbm level ( dbm = 1 mw into 6 ). 2. Adjust input voltage V is to dbm level at V os f 1 MHz ( dbm = 1 mw into ). General note V is is the input voltage at an ny n nz terminal, whichever is assigned as an input. V os is the output voltage at an ny n nz terminal, whichever is assigned as an output. Test conditions: = V; GND = V; = V; R L =;R source =1 k. Fig.12 Typical switch OFF signal feed-through as a function of frequency. December

74HC/HCT433 Test conditions: = V; GND = V; = V; R L =;R source =1 k. Fig.13 Typical frequency response. Fig.14 Test circuit f measuring sine-wave disttion and minimum frequency response. Fig.1 Test circuit f measuring switch OFF signal feed-through.

13 74HC/HCT433 Test conditions: = V; GND = V; = V; R L =;R source =1 k. Fig.13 Typical frequency response. Fig.14 Test circuit f measuring sine-wave disttion and minimum frequency response. Fig.1 Test circuit f measuring switch OFF signal feed-through. (a) = channel ON condition (b) channel OFF condition. Fig.16 Test circuits f measuring crosstalk between any two switches/multiplexers. The crosstalk is defined as follows (oscilloscope output): Fig.17 Test circuit f measuring crosstalk between control and any switch. December

14 74HC/HCT433 AC WAVEFORMS (1) HC : V M = %; V I = GND to. HCT : V M = 1.3 V; V I = GND to 3 V. Fig.18 Wavefms showing the input (V is )to output (V os ) propagation delays. Fig.19 Wavefms showing the turn-on and turn-off times. (1) HC : V M = %; V I = GND to. HCT : V M = 1.3 V; V I = GND to 3 V. Fig.2 Wavefms showing the set-up and hold times from S n inputs to LE input, and minimum pulse width of LE. December

15 74HC/HCT433 TEST CIRCUIT AND WAVEFORMS Conditions TEST SWITCH V is t PZH t PZL t PHZ t PLZ others open pulse FAMILY AMPLITUDE V M f max ; PULSE WIDTH OTHER t r ;t f 74HC % < 2 ns 6 ns 74HCT 3. V 1.3 V < 2 ns 6 ns C L = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS f values). R T = termination resistance should be equal to the output impedance Z O of the pulse generat. t r = t f = 6 ns; when measuring f max, there is no constraint on t r, t f with % duty fact. Fig.21 Test circuit f measuring AC perfmance. Conditions TEST SWITCH V is t PZH t PZL t PHZ t PLZ others open pulse FAMILY AMPLITUDE V M f max ; PULSE WIDTH OTHER t r ;t f 74HC % < 2 ns 6 ns 74HCT 3. V 1.3 V < 2 ns 6 ns C L = load capacitance including jig and probe capacitance (see AC CHARACTERISTICS f values). R T = termination resistance should be equal to the output impedance Z O of the pulse generat. t r = t f = 6 ns; when measuring f max, there is no constraint on t r, t f with % duty fact. Fig.22 Input pulse definitions. December 199 1

16 74HC/HCT433 PACKAGE OUTLINES See 74HC/HCT/HCU/HCMOS Logic Package Outlines. December

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SHEET F a complete data sheet, please also download: The IC6 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC6 74HC/HCT/HCU/HCMOS Logic Package Infmation The IC6 74HC/HCT/HCU/HCMOS