74HC4051; 74HCT channel analog multiplexer/demultiplexer
|
|
- Rosemary Cross
- 5 years ago
- Views:
Transcription
1 Product data sheet 1. General description 2. Features 3. Applications The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance with JEDEC standard no. 7A. The is an with three digital select inputs (S0 to S2), an active-low enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common input/output (Z). With E LOW, one of the eight switches is selected (low impedance ON-state) by S0 to S2. With E HIGH, all switches are in the high-impedance OFF-state, independent of S0 to S2. V CC and GND are the supply voltage pins for the digital control inputs (S0 to S2, and E). The V CC to GND ranges are 2.0 V to 10.0 V for 74HC4051 and 4.5 V to 5.5 V for 74HCT4051. The analog inputs/outputs (Y0 to Y7, and Z) can swing between V CC as a positive limit and V EE as a negative limit. V CC V EE may not exceed 10.0 V. For operation as a digital multiplexer/demultiplexer, V EE is connected to GND (typically ground). Wide analog input voltage range: ±5 V Low ON-state resistance: 80 Ω (typical) at V CC V EE = 4.5 V 70 Ω (typical) at V CC V EE = 6.0 V 60 Ω (typical) at V CC V EE = 9.0 V Logic level translation: To enable 5 V logic to communicate with ±5 V analog signals Typical break before make built in Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating
2 4. Quick reference data Table 1: Quick reference data V EE = GND = 0 V; T amb = 25 C; t r = t f = 6 ns. Type 74HC4051 t PZH, t PZL turn-on time C L =15pF; R L =1kΩ; V CC =5V E to V os ns Sn to V os ns t PHZ, t PLZ turn-off time C L =15pF; R L =1kΩ; V CC =5V E to V os ns Sn to V os ns C i input capacitance pf C PD power dissipation capacitance [1] [2] pf (per switch) C S switch capacitance independent input/output Yn pf common input/output Z pf Type 74HCT4051 t PZH, t PZL turn-on time C L =15pF; R L =1kΩ; V CC =5V E to V os ns Sn to V os ns t PHZ, t PLZ turn-off time C L =15pF; R L =1kΩ; V CC =5V E to V os ns Sn to V os ns C i input capacitance pf C PD power dissipation capacitance [1] [3] pf (per switch) C S switch capacitance independent input/output Yn pf common input/output Z pf [1] C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V CC 2 f i + {(C L +C S ) V CC 2 f o } where: f i = input frequency in MHz; f o = output frequency in MHz; {(C L +C S ) V CC 2 f o } = sum of outputs; C L = output load capacitance in pf; C S = switch capacitance in pf; V CC = supply voltage in V. [2] For 74HC4051 the condition is V I = GND to V CC. [3] For 74HCT4051 the condition is V I = GND to V CC 1.5 V. Product data sheet 2 of 32
3 5. Ordering information Table 2: Type number Ordering information Package Temperature range Name Description Version Type 74HC HC4051N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT HC4051D 40 C to +125 C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm 74HC4051DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; SOT338-1 body width 5.3 mm 74HC4051PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm 74HC4051BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body mm SOT763-1 Type 74HCT HCT4051N 40 C to +125 C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT HCT4051D 40 C to +125 C SO16 plastic small outline package; 16 leads; SOT109-1 body width 3.9 mm 74HCT4051DB 40 C to +125 C SSOP16 plastic shrink small outline package; 16 leads; SOT338-1 body width 5.3 mm 74HCT4051PW 40 C to +125 C TSSOP16 plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm 74HCT4051BQ 40 C to +125 C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body mm SOT763-1 Product data sheet 3 of 32
4 8. Functional description 9. Limiting values 8.1 Function table Table 4: Function table [1] Input Channel ON E S2 S1 S0 L L L L Y0 to Z L L L H Y1 to Z L L H L Y2 to Z L L H H Y3 to Z L H L L Y4 to Z L H L H Y5 to Z L H H L Y6 to Z L H H H Y7 to Z H X X X - [1] H = HIGH voltage level; L = LOW voltage level; X = don t care. Table 5: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V EE = GND (ground =0V). Symbol Parameter Conditions Min Max Unit V CC supply voltage [1] V I IK input clamping current V I < 0.5 V or - ±20 ma V I >V CC V I SK switch clamping current V S < 0.5 V or - ±20 ma V S >V CC V I S switch current V S = 0.5 V to (V CC V) - ±25 ma I EE negative supply current - ±20 ma I CC quiescent supply current - 50 ma I GND ground supply current - 50 ma T stg storage temperature C P tot total power dissipation T amb = 40 C to +125 C DIP16 package [2] mw SO16, (T)SSOP16, and DHVQFN16 package [3] mw P S power dissipation per switch mw [1] To avoid drawing V CC current out of terminal Z, when switch current flows in terminals Yn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no V CC current will flow out of terminals Yn. In this case there is no limit for the voltage drop across the switch, but the voltages at Yn and Z may not exceed V CC or V EE. [2] For DIP16 packages, above 70 C, P tot derates linearly with 12 mw/k. Product data sheet 7 of 32
5 [3] For SO16, (T)SSOP16, and DHVQFN16 packages, above 70 C, P tot derates linearly with 8 mw/k. 10. Recommended operating conditions Table 6: Recommended operating conditions Type 74HC4051 V CC supply voltage difference see Figure 7 V CC GND V V CC V EE V V I input voltage GND - V CC V V S switch voltage V EE - V CC V T amb ambient temperature C t r, t f input rise and fall times V CC = 2.0 V ns V CC = 4.5 V ns V CC = 6.0 V ns V CC = 10.0 V ns Type 74HCT4051 V CC supply voltage difference see Figure 7 V CC GND V V CC V EE V V I input voltage GND - V CC V V S switch voltage V EE - V CC V T amb ambient temperature C t r, t f input rise and fall times V CC = 2.0 V ns V CC = 4.5 V ns V CC = 6.0 V ns V CC = 10.0 V ns Product data sheet 8 of 32
6 10 V CC GND (V) 8 001aad V CC GND (V) 8 001aad546 6 operating area 6 operating area V CC V EE (V) V CC V EE (V) a. Type 74HC4051 b. Type 74HCT4051 Fig 7. Guaranteed operating area as a function of the supply voltages 11. Static characteristics Table 7: R ON resistance per switch for types 74HC4051 and 74HCT4051 V I = V IH or V IL ; for test circuit see Figure 8. For 74HC4051: V CC GND or V CC V EE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4051: V CC GND = 4.5 V and 5.5 V; V CC V EE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. T amb = 25 C R ON(peak) R ON(rail) ON-state resistance (peak) ON-state resistance (rail) V is = V CC to V EE V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω V is = V EE V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω V is = V CC V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω Product data sheet 9 of 32
7 Table 7: R ON resistance per switch for types 74HC4051 and 74HCT4051 continued V I = V IH or V IL ; for test circuit see Figure 8. For 74HC4051: V CC GND or V CC V EE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. For 74HCT4051: V CC GND = 4.5 V and 5.5 V; V CC V EE = 2.0 V, 4.5 V, 6.0 V and 9.0 V. R ON(max) maximum ON-state V is = V CC to V EE resistance variation V CC = 2.0 V; V EE = 0 V [1] Ω between any two channels V CC = 4.5 V; V EE = 0 V Ω V CC = 6.0 V; V EE = 0 V Ω V CC = 4.5 V; V EE = 4.5 V Ω T amb = 40 C to +85 C R ON(peak) ON-state resistance V is = V CC to V EE (peak) V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω R ON(rail) ON-state resistance V is = V EE (rail) V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω T amb = 40 C to +125 C R ON(peak) ON-state resistance (peak) R ON(rail) ON-state resistance (rail) V is = V CC V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω V is = V CC to V EE V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω V is = V EE V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω V is = V CC V CC = 2.0 V; V EE = 0 V; I S = 100 µa [1] Ω V CC = 4.5 V; V EE = 0 V; I S = 1000 µa Ω V CC = 6.0 V; V EE = 0 V; I S = 1000 µa Ω V CC = 4.5 V; V EE = 4.5 V; I S = 1000 µa Ω Product data sheet 10 of 32
8 Table 9: Static characteristics type 74HCT4051 Voltages are referenced to GND (ground = 0 V). T amb = 25 C V IH HIGH-level input voltage V CC = 4.5 V to 5.5 V V V IL LOW-level input voltage V CC = 4.5 V to 5.5 V V I LI input leakage current V CC = 5.5 V; V EE = 0 V; V I = V CC or GND µa I S(OFF) switch OFF-state current V CC = 10.0 V; V I = V IH or V IL ; V EE =0V; V S = V CC V EE ; see Figure 10 I S(ON) switch ON-state current V CC = 10.0 V; V I = V IH or V IL ; V EE =0V; V S = V CC V EE ; see Figure 11 per channel - - ±0.1 µa all channels - - ±0.4 µa I CC quiescent supply current V I =V CC or GND; V is =V EE or V CC ;V os =V CC or V EE - - ±0.4 µa V EE = 0 V; V CC = 5.5 V µa V EE = 5.0 V; V CC = 5.0 V µa I CC additional quiescent supply current per input pin V CC = 4.5 V to 5.5 V; V EE = 0 V; V I =V CC 2.1 V; other inputs at V CC or GND Sn input µa E input µa C i input capacitance pf T amb = 40 C to +85 C V IH HIGH-level input voltage V CC = 4.5 V to 5.5 V V V IL LOW-level input voltage V CC = 4.5 V to 5.5 V V I LI input leakage current V CC = 5.5 V; V EE = 0 V; V I = V CC or GND - - ±1.0 µa I S(OFF) switch OFF-state current V CC = 10.0 V; V I = V IH or V IL ; V EE =0V; V S = V CC V EE ; see Figure 10 per channel - - ±1.0 µa all channels - - ±4.0 µa I S(ON) switch ON-state current V CC = 10.0 V; V I = V IH or V IL ; V EE =0V; - - ±4.0 µa V S = V CC V EE ; see Figure 11 I CC quiescent supply current V I =V CC or GND; V is =V EE or V CC ;V os =V CC or V EE V EE = 0 V; V CC = 5.5 V µa V EE = 5.0 V; V CC = 5.0 V µa I CC additional quiescent supply current per input pin V CC = 4.5 V to 5.5 V; V EE = 0 V; V I =V CC 2.1 V; other inputs at V CC or GND Sn input µa E input µa T amb = 40 C to +125 C V IH HIGH-level input voltage V CC = 4.5 V to 5.5 V V V IL LOW-level input voltage V CC = 4.5 V to 5.5 V V I LI input leakage current V CC = 5.5 V; V EE = 0 V; V I = V CC or GND - - ±1.0 µa Product data sheet 14 of 32
9 Table 9: Static characteristics type 74HCT4051 continued Voltages are referenced to GND (ground = 0 V). I S(OFF) switch OFF-state current V CC = 10.0 V; V I = V IH or V IL ; V EE =0V; V S = V CC V EE ; see Figure 10 I S(ON) switch ON-state current V CC = 10.0 V; V I = V IH or V IL ; V EE =0V; V S = V CC V EE ; see Figure Dynamic characteristics per channel - - ±1.0 µa all channels - - ±4.0 µa I CC quiescent supply current V I =V CC or GND; V is =V EE or V CC ;V os =V CC or V EE I CC - - ±4.0 µa V EE = 0 V; V CC = 5.5 V µa V EE = 5.0 V; V CC = 5.0 V µa additional quiescent supply V CC = 4.5 V to 5.5 V; V EE = 0 V; current per input pin V I =V CC 2.1 V; other inputs at V CC or GND Sn input µa E input µa delay V is to V os R L = Ω; see Figure 12 Table 10: Dynamic characteristics type 74HC4051 GND = 0 V; t r =t f = 6 ns; C L = 50 pf unless specified otherwise; for test circuit see Figure 14. T amb =25 C t PHL, propagation t PLH V CC = 2.0 V; V EE = 0 V ns V CC = 4.5 V; V EE = 0 V ns V CC = 6.0 V; V EE = 0 V ns V CC = 4.5 V; V EE = 4.5 V ns t PZH, turn-on time R L = 1 kω; see Figure 13 t PZL E to V os V CC = 2.0 V; V EE = 0 V ns V CC = 4.5 V; V EE = 0 V ns V CC = 5.0 V; V EE = 0 V; C L = 15 pf ns V CC = 6.0 V; V EE = 0 V ns V CC = 4.5 V; V EE = 4.5 V ns Sn to V os V CC = 2.0 V; V EE = 0 V ns V CC = 4.5 V; V EE = 0 V ns V CC = 5.0 V; V EE = 0 V; C L = 15 pf ns V CC = 6.0 V; V EE = 0 V ns V CC = 4.5 V; V EE = 4.5 V ns Product data sheet 15 of 32
10 Table 11: Dynamic characteristics type 74HCT4051 GND = 0 V; t r =t f = 6 ns; C L = 50 pf and V CC = 4.5 V unless specified otherwise; for test circuit see Figure 14. T amb =25 C t PHL, t PLH propagation delay R L = Ω; see Figure 12 V is to V os V EE = 0 V ns V EE = 4.5 V ns t PZH, turn-on time R L = 1 kω; see Figure 13 t PZL E to V os V EE = 0 V ns V EE = 0 V; V CC = 5.0 V; C L = 15 pf ns V EE = 4.5 V ns Sn to V os V EE = 0 V ns V EE = 0 V; V CC = 5.0 V; C L = 15 pf ns V EE = 4.5 V ns t PHZ, turn-off time R L = 1 kω; see Figure 13 t PLZ E to V os V EE = 0 V ns V EE = 0 V; V CC = 5.0 V; C L = 15 pf ns V EE = 4.5 V ns Sn to V os V EE = 0 V ns V EE = 0 V; V CC = 5.0 V; C L = 15 pf ns V EE = 4.5 V ns C PD power dissipation capacitance (per switch) [1] [2] pf T amb = 40 C to +85 C t PHL, t PLH propagation delay R L = Ω; see Figure 12 V is to V os V EE = 0 V ns V EE = 4.5 V ns t PZH, turn-on time R L = 1 kω; see Figure 13 t PZL E to V os V EE = 0 V ns V EE = 4.5 V ns Sn to V os V EE = 0 V ns V EE = 4.5 V ns t PHZ, turn-off time R L = 1 kω; see Figure 13 t PLZ E to V os V EE = 0 V ns V EE = 4.5 V ns Sn to V os V EE = 0 V ns V EE = 4.5 V ns T amb = 40 C to +125 C t PHL, t PLH propagation delay R L = Ω; see Figure 12 V is to V os V EE = 0 V ns V EE = 4.5 V ns Product data sheet 18 of 32
11 Table 11: Dynamic characteristics type 74HCT4051 continued GND = 0 V; t r =t f = 6 ns; C L = 50 pf and V CC = 4.5 V unless specified otherwise; for test circuit see Figure 14. t PZH, turn-on time R L = 1 kω; see Figure 13 t PZL E to V os V EE = 0 V ns [1] C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V CC 2 f i + {(C L +C S ) V CC 2 f o } where: f i = input frequency in MHz; f o = output frequency in MHz; {(C L +C S ) V CC 2 f o } = sum of outputs; C L = output load capacitance in pf; C S = switch capacitance in pf; V CC = supply voltage in V. [2] For 74HCT4051 the condition is V I = GND to V CC 1.5 V. 13. Waveforms V EE = 4.5 V ns Sn to V os V EE = 0 V ns V EE = 4.5 V ns t PHZ, turn-off time R L = 1 kω; see Figure 13 t PLZ E to V os V EE = 0 V ns V EE = 4.5 V ns Sn to V os V EE = 0 V ns V EE = 4.5 V ns V is input 50 % t PLH t PHL V os output 50 % 001aad555 Fig 12. Input (V is ) to output (V os ) propagation delays Product data sheet 19 of 32
12 14. Additional dynamic characteristics Table 14: Additional dynamic characteristics Recommended conditions and typical values; GND =0V; T amb =25 C. d sin sine-wave distortion R L =10kΩ; C L = 50 pf; see Figure 15 f i = 1 khz V CC = 2.25 V; V EE = 2.25 V; V is(p-p) = 4.0 V % V CC = 4.5 V; V EE = 4.5 V; V is(p-p) = 8.0 V % f i =10kHz V CC = 2.25 V; V EE = 2.25 V; V is(p-p) = 4.0 V % V CC = 4.5 V; V EE = 4.5 V; V is(p-p) = 8.0 V % α (ft)off switch OFF-state signal R L = 600 Ω; C L = 50 pf; see Figure 16 [1] feed-through suppression V CC = 2.25 V; V EE = 2.25 V db V CC = 4.5 V; V EE = 4.5 V db V ct(p-p) crosstalk voltage (peak-to-peak value) R L = 600 Ω; C L = 50 pf; f i = 1 MHz; E or Sn square-wave between V CC and GND; t r =t f = 6 ns; see Figure 17 between E or Sn and V CC = 4.5 V; V EE = 0 V mv Yn or Z V CC = 4.5 V; V EE = 4.5 V mv f h(-3db) 3 db high frequency R L =50Ω; C L = 10 pf; see Figure 18 [2] V CC = 2.25 V; V EE = 2.25 V MHz V CC = 4.5 V; V EE = 4.5 V MHz C S switch capacitance independent pf input/output Yn common input/output Z pf [1] Adjust input voltage V is to 0 dbm level (0 dbm = 1 mw into 600 Ω). [2] Adjust input voltage V is to 0 dbm level at V os for 1 MHz (0 dbm = 1 mw into 50 Ω). V is 10 µf Yn/Z Z/Yn V os RL CL db channel ON V EE 001aad552 Fig 15. Test circuit for measuring sine-wave distortion Product data sheet 22 of 32
13 SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y H E v M A Z 16 9 Q A 2 A 1 (A ) 3 A pin 1 index θ L p 1 8 L e b p w M detail X mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max A 1 A 2 A 3 b p c D (1) E (1) e H (1) E L L p Q v w y Z Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included θ o 8 o OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION SOT E07 MS-012 Fig 20. Package outline SOT109-1 (SO16) Product data sheet 26 of 32
74HC4053; 74HCT4053. Triple 2-channel analog multiplexer/demultiplexer
Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4053B. It is specified in compliance with JEDEC standard no. 7A. The is triple
More information74HC4067; 74HCT channel analog multiplexer/demultiplexer
Product data sheet 1. General description 2. Features 3. Applications The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4067B. The device is specified in compliance with JEDEC standard
More information74HC257; 74HCT257. Quad 2-input multiplexer; 3-state
Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has four identical 2-input multiplexers with
More information74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:
Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has octal D-type transparent latches featuring separate
More information74HC573; 74HCT573. Octal D-type transparent latch; 3-state. The 74HC573; 74HCT573 is functionally identical to:
Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The has octal D-type transparent latches featuring separate
More information74HC238; 74HCT to-8 line decoder/demultiplexer
Product data sheet 1. General description 2. Features 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238 decoders
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET F a complete data sheet, please also download: The IC6 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC6 74HC/HCT/HCU/HCMOS Logic Package Infmation The IC6 74HC/HCT/HCU/HCMOS
More information74HC123; 74HCT123. Dual retriggerable monostable multivibrator with reset
Product data sheet 1. General description 2. Features The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard
More information74HC393; 74HCT393. Dual 4-bit binary ripple counter
Product data sheet 1. General description 2. Features 3. Quick reference data The 74HC393; HCT393 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET F a complete data sheet, please also download: The IC6 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC6 74HC/HCT/HCU/HCMOS Logic Package Infmation The IC6 74HC/HCT/HCU/HCMOS
More information74HC4052; 74HCT4052. Dual 4-channel analog multiplexer/demultiplexer
Rev. 05 5 May 2008 Product data sheet 1. General description 2. Features 3. pplications The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance
More informationQUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns. TYPICAL SYMBOL PARAMETER CONDITIONS 74HC00 74HCT00 UNIT
Quad 2-input NND gate FETURES Complies with JEDEC standard no. -1 ESD protection: HBM EI/JESD22-114- exceeds 2000 V MM EI/JESD22-115- exceeds 200 V Specified from 40 to +5 C and 40 to +125 C. DESCRIPTION
More information74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting. Product data sheet
3-to-8 line decoder, demultiplexer with address latches; inverting Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky
More information74HC4051-Q100; 74HCT4051-Q100
Rev. 2 8 October 2012 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The device is specified in compliance
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET F a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Infmation The IC06 74HC/HCT/HCU/HCMOS
More informationQUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns. TYPICAL SYMBOL PARAMETER CONDITIONS 74HC00 74HCT00 UNIT
FETURES Complies with JEDEC standard no. 8-1 ESD protection: HBM EI/JESD22-114- exceeds 2000 V MM EI/JESD22-115- exceeds 200 V Specified from 40 to +85 C and 40 to +125 C. DESCRIPTION The 74HC00/74HCT00
More information74HC245; 74HCT245. Octal bus tranceiver; 3-state. The 74HC245; 74HCT245 is similar to the 74HC640; 74HCT640 but has true (non-inverting) outputs.
Rev. 03 31 January 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL).
More information74HC4052; 74HCT4052. Dual 4-channel analog multiplexer/demultiplexer
Rev. 8 11 May 2011 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance with JEDEC standard no.
More information74HC4052; 74HCT4052. Dual 4-channel analog multiplexer/demultiplexer
Rev. 9 13 December 2011 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4052B. The device is specified in compliance with JEDEC standard
More information74HC244; 74HCT244. Octal buffer/line driver; 3-state
Rev. 03 22 December 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
More information8-channel analog multiplexer/demultiplexer. For operation as a digital multiplexer/demultiplexer, V EE is connected to V SS (typically ground).
Rev. 04 12 January 2005 Product data sheet 1. General description 2. Features The is an with three address inputs (0 to 2), an active LOW enable input (E), eight independent inputs/outputs (Y0 to Y7) and
More information74HC4051; 74HCT channel analog multiplexer/demultiplexer
Rev. 9 26 September 2017 Product data sheet 1 General description 2 Features and benefits 3 pplications The is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer
More information74HC574; 74HCT574. Octal D-type flip-flop; positive edge-trigger; 3-state
Rev. 7 4 March 2016 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device
More information74HC4051; 74HCT channel analog multiplexer/demultiplexer
Rev. 8 5 February 2016 Product data sheet 1. General description The is a single-pole octal-throw analog switch (SP8T) suitable for use in analog or digital 8:1 multiplexer/demultiplexer applications.
More information74HC273; 74HCT273. Octal D-type flip-flop with reset; positive-edge trigger
Rev. 03 24 January 2006 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL).
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SEET F a complete data sheet, please also download: The IC6 74C/CT/CU/CMOS ogic Family Specifications The IC6 74C/CT/CU/CMOS ogic Package Infmation The IC6 74C/CT/CU/CMOS ogic
More information74HC4052; 74HCT4052. Dual 4-channel analog multiplexer/demultiplexer
Rev. 12 10 October 2017 Product data sheet 1 General description 2 Features and benefits 3 pplications The is a dual single-pole quad-throw analog switch (2x SP4T) suitable for use in analog or digital
More information74HC4066-Q100; 74HCT4066-Q100
74HC4066-Q100; 74HCT4066-Q100 Rev. 1 12 July 2012 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4066B-Q100. The device is specified
More information74HC238; 74HCT to-8 line decoder/demultiplexer
Rev. 03 16 July 2007 Product data sheet 1. General description 2. Features 74HC238 and 74HCT238 are high-speed Si-gate CMOS devices and are pin compatible with Low-Power Schottky TTL (LSTTL). The 74HC238/74HCT238
More information74HC154; 74HCT to-16 line decoder/demultiplexer
Rev. 06 2 February 2007 Product data sheet. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The
More information74HC4066; 74HCT4066. Quad single-pole single-throw analog switch
Rev. 7 2 pril 2013 Product data sheet 1. General description The is a quad single pole, single throw analog switch. Each switch features two input/output terminals (ny and nz) and an active HIGH enable
More information74HC393; 74HCT393. Dual 4-bit binary ripple counter
Rev. 03 6 September 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The 74HC393; HCT393 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky
More information74AHC86; 74AHCT86. Quad 2-input EXCLUSIVE-OR gate. The 74AHC86; 74AHCT86 provides a 2-input exclusive-or function.
Rev. 02 5 November 2007 Product data sheet. General description 2. Features 3. Ordering information The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They
More information74HC02; 74HCT02. The 74HC02; 74HCT02 provides a quad 2-input NOR function.
Rev. 03 September 200 Product data sheet. General description 2. Features 3. Ordering information The are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7. They are pin compatible
More information74HC General description. 2. Features. 3-to-8 line decoder, demultiplexer with address latches; inverting
3-to-8 line decoder, demultiplexer with address latches; inverting Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible
More information74AHC125; 74AHCT125. Quad buffer/line driver; 3-state
Rev. 04 January 2008 Product data sheet. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). They
More informationDATA SHEET. HEF4067B MSI 16-channel analogue multiplexer/demultiplexer. For a complete data sheet, please also download: INTEGRATED CIRCUITS
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF,
More informationINTEGRATED CIRCUITS DATA SHEET. 74HC04; 74HCT04 Hex inverter. Product specification Supersedes data of 1993 Sep Jul 23
INTEGRTED CIRCUITS DT SHEET Supersedes data of 993 Sep 0 2003 Jul 23 FETURES Complies with JEDEC standard no. 8- ESD protection: HBM EI/JESD22-4- exceeds 2000 V MM EI/JESD22-5- exceeds 200 V. Specified
More informationQuad bus transceiver; 3-state. The output enable inputs (OEA and OEB) can be used to isolate the buses.
Rev. 03 12 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The is specified in compliance
More information74AHC541; 74AHCT541. Octal buffer/line driver; 3-state. The 74AHC541; 74AHCT541 is a high-speed Si-gate CMOS device.
Rev. 03 12 November 2007 Product data sheet 1. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device. The are octal non-inverting buffer/line drivers with 3-state
More informationINTEGRATED CIRCUITS DATA SHEET. 74HC00; 74HCT00 Quad 2-input NAND gate. Product specification Supersedes data of 1997 Aug 26.
INTEGRTED CIRCUITS DT SHEET Quad 2-input NND gate Supersedes data of 1997 ug 26 2003 Jun 30 Quad 2-input NND gate FETURES Complies with JEDEC standard no. 8-1 ESD protection: HBM EI/JESD22-114- exceeds
More information8-bit binary counter with output register; 3-state
Rev. 01 30 March 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with Low power Schottky TTL (LSTTL). It
More information8-channel analog multiplexer/demultiplexer with injection-current effect control
8-channel analog multiplexer/demultiplexer with injection-current effect control Rev. 01 9 March 2007 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SEET F a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Infmation The IC06 74C/CT/CU/CMOS ogic
More information74HC594; 74HCT bit shift register with output register
Rev. 03 20 December 2006 Product data sheet 1. General description 2. Features 3. Applications The is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). The is
More information74AHC244; 74AHCT244. Octal buffer/line driver; 3-state. The 74AHC244; 74AHCT244 is a high-speed Si-gate CMOS device.
Rev. 05 20 December 2007 Product data sheet. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device. The has octal non-inverting buffer/line drivers with 3-state
More informationEN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.
EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at www.hest ore.hu. INTEGRTED CIRCUITS DT SHEET Supersedes data of 1990 Dec 01 2003 Jul 25 FETURES
More informationDual 3-channel analog multiplexer/demultiplexer with supplementary switches
with supplementary switches Rev. 03 16 December 2009 Product data sheet 1. General description 2. Features 3. Applications 4. Ordering information The is a dual 3-channel analog multiplexer/demultiplexer
More information74HC4017; 74HCT4017. Johnson decade counter with 10 decoded outputs
Rev. 03 8 January 2008 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with the HEF4017. The is a 5-stage Johnson decade counter with
More information74AHC02; 74AHCT02. The 74AHC02; 74AHCT02 provides a quad 2-input NOR function.
Rev. 04 2 May 2008 Product data sheet. General description 2. Features 3. Ordering information The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified
More informationUNISONIC TECHNOLOGIES CO., LTD
UNISONIC TECHNOLOGIES CO., LTD BILATERAL SWITCH DESCRIPTION The UTC U74HC1G66 is a high-speed Si-gate CMOS device that provides an analog switch. The switch has two input/output pins(y and Z) and an active
More informationIn data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.
Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic
More information74HC373; 74HCT General description. 2. Features. Octal D-type transparent latch; 3-state
Rev. 03 20 January 2006 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with
More information74VHC08; 74VHCT08. The 74VHC08; 74VHCT08 provide the quad 2-input AND function.
Rev. 0 30 June 2009 Product data sheet. General description 2. Features 3. Ordering information The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS ogic Family Specifications The IC06 74HC/HCT/HCU/HCMOS ogic Package Information The IC06 74HC/HCT/HCU/HCMOS
More informationThe 74HC21 provide the 4-input AND function.
Rev. 03 12 November 2004 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL).
More informationINTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRTED CIRCUITS DT SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS
More informationIn data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below.
Imptant notice Dear Customer, On 7 February 217 the fmer NP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, ogic and PowerMOS
More informationEN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.
EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at www.hest ore.hu. INTEGRTED CIRCUITS DT SHEET Supersedes data of 1997 ug 26 2003 Oct 30 FETURES
More information74HC General description. 2. Features. Octal D-type flip-flop; positive-edge trigger; 3-state; inverting
Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The is specified in compliance
More information8-channel analog multiplexer/demultiplexer
Rev. 6 17 March 2016 Product data sheet 1. General description The is an with three digital select inputs (S0 to S2), an active-low enable input (E), eight independent inputs/outputs (Y0 to Y7) and a common
More information74HC138; 74HCT to-8 line decoder/demultiplexer; inverting
Rev. 4 27 June 2012 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). The decoder accepts three binary weighted
More information8-channel analog multiplexer/demultiplexer
Rev. 04 10 ugust 2009 Product data sheet 1. General description 2. Features The is an with three digital select inputs (S0 to S2), an active-low enable input (), eight independent inputs/outputs (Y0 to
More informationINTEGRATED CIRCUITS. 74LV273 Octal D-type flip-flop with reset; positive-edge trigger. Product specification 1997 Apr 07 IC24 Data Handbook
INTEGRATED CIRCUITS Octal D-type flip-flop with reset; positive-edge trigger 1997 Apr 07 IC24 Data Handbook FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for Low Voltage applications: 1.0 to 3.6V
More information74HC373-Q100; 74HCT373-Q100
Rev. 1 10 August 2012 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard
More information74HC123; 74HCT123. Dual retriggerable monostable multivibrator with reset
Rev. 05 13 July 2009 Product data sheet 1. General description 2. Features The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance
More information74AHC1G66; 74AHCT1G66
Rev. 04 18 December 2008 Product data sheet 1. General description 2. Features 3. Ordering information 74AHC1G66 and 74AHCT1G66 are high-speed Si-gate CMOS devices. They are single-pole single-throw analog
More information74HC123; 74HCT123. Dual retriggerable monostable multivibrator with reset
Rev. 04 16 June 2006 Product data sheet 1. General description 2. Features The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance
More information74AHC14; 74AHCT14. Hex inverting Schmitt trigger
Rev. 05 4 May 2009 Product data sheet. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
More information74HC00; 74HCT00. The 74HC00; 74HCT00 provides a quad 2-input NAND function.
Quad 2-input NND gate Rev. 5 25 November 200 Product data sheet. General description 2. Features and benefits 3. Ordering information The are high-speed Si-gate CMOS devices that comply with JEDEC standard
More informationUNISONIC TECHNOLOGIES CO., LTD U74AHC1G66
UNISIC TECHNOLOGIES CO., LTD BILATERAL SWITCH DESCRIPTI The UTC is an analog switch which transmits signals from pin(y or Z) to pin (Z or Y) with an active HIGH enable input pin (E). When pin E is LOW,
More informationThe 74LV32 provides a quad 2-input OR function.
Rev. 03 9 November 2007 Product data sheet. General description 2. Features 3. Ordering information The is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC32 and 74HCT32.
More informationNTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs
NTE74HC173 Integrated Circuit TTL High Speed CMOS, 4 Bit D Type Flip Flop with 3 State Outputs Description: The NTE74HC173 is an high speed 3 State Quad D Type Flip Flop in a 16 Lead DIP type package that
More informationINTEGRATED CIRCUITS. 74LV688 8-bit magnitude comparator. Product specification Supersedes data of 1997 May 15 IC24 Data Handbook.
INTEGRATED CIRCUITS Supersedes data of 1997 May 15 IC24 Data Handbook 1998 Jun 23 FEATURES Wide operating voltage: 1.0 to 5.5V Optimized for low voltage applications: 1.0V to 3.6V Accepts TTL input levels
More information74HC138; 74HCT to-8 line decoder/demultiplexer; inverting
Rev. 6 28 December 2015 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive
More information74HC08; 74HCT General description. 2. Features and benefits. 3. Ordering information. Quad 2-input AND gate
Quad 2-input ND gate Rev. 4 6 September 2012 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a quad 2-input ND gate. Inputs include clamp diodes. This
More information74HC595; 74HCT General description. 2. Features and benefits. 3. Applications
8-bit serial-in, serial or parallel-out shift register with output latches; Rev. 6 12 December 2011 Product data sheet 1. General description The are high-speed Si-gate CMOS devices and are pin compatible
More informationThe 74LV08 provides a quad 2-input AND function.
Quad 2-input ND gate Rev. 03 6 pril 2009 Product data sheet. General description 2. Features 3. Ordering information The is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC0
More informationINTEGRATED CIRCUITS. 74LV00 Quad 2-input NAND gate. Product specification Supersedes data of 1998 Apr 13 IC24 Data Handbook.
INTEGRATED CIRCUITS Supersedes data of 1998 Apr 13 IC24 Data Handbook 1998 Apr 20 FEATURES Wide operating voltage: 1.0 to 5.5 V Optimized for low voltage applications: 1.0 to 3.6 V Accepts TTL input levels
More information74AHC541-Q100; 74AHCT541-Q100
74HC541-Q100; 74HCT541-Q100 Rev. 1 6 June 2013 Product data sheet 1. General description The is a high-speed Si-gate CMOS device. The are octal non-inverting buffer/line drivers with 3-state bus compatible
More information74HC1G125; 74HCT1G125
Rev. 05 23 December 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a high-speed, Si-gate CMOS device. The provides one non-inverting buffer/line driver with 3-state
More information74HC02; 74HCT02. The 74HC02; 74HCT02 provides a quad 2-input NOR function.
Rev. 4 4 September 202 Product data sheet. General description 2. Features and benefits 3. Ordering information The are high-speed Si-gate CMOS devices that comply with JEDEC standard no. 7. They are pin
More informationMM74HC151 8-Channel Digital Multiplexer
8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation
More information74ALVC bit dual supply translating transciever; 3-state. This device can be used as two 8-bit transceivers or one 16-bit transceiver.
16-bit dual supply translating transciever; 3-state Rev. 02 1 June 2004 Product data sheet 1. General description 2. Features The is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior
More informationOctal bus transceiver; 3-state
Rev. 02 7 January 2008 Product data sheet. General description 2. Features 3. Ordering information The is an octal transceiver featuring non-inverting 3-state bus compatible outputs in both send and receive
More informationDual 2-to-4 line decoder/demultiplexer
74LV9 Rev. 04 December 007 Product data sheet. General description. Features. Ordering information The 74LV9 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC9 and 74HCT9.
More information74HC04; 74HCT General description. 2. Features and benefits. 3. Ordering information. Hex inverter
Rev. 4 3 ugust 202 Product data sheet. General description 2. Features and benefits 3. Ordering information The is a hex inverter. The inputs include clamp diodes that enable the use of current limiting
More informationMM74HC251 8-Channel 3-STATE Multiplexer
8-Channel 3-STATE Multiplexer General Description The MM74HC251 8-channel digital multiplexer with 3- STATE outputs utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and
More information74LV General description. 2. Features. 8-bit addressable latch
Rev. 03 2 January 2008 Product data sheet. General description 2. Features The is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC259 and 74HCT259. The is a high-speed designed
More informationMM74HC157 Quad 2-Input Multiplexer
Quad 2-Input Multiplexer General Description The MM74HC157 high speed Quad 2-to-1 Line data selector/multiplexers utilizes advanced silicon-gate CMOS technology. It possesses the high noise immunity and
More information74LVC4066-Q100. The 74LVC4066-Q100 is a high-speed Si-gate CMOS device.
Rev. 1 7 August 2012 Product data sheet 1. General description The is a high-speed Si-gate CMOS device. The provides four single pole, single-throw analog switch functions. Each switch has two input/output
More informationINTEGRATED CIRCUITS. 74LVC138A 3-to-8 line decoder/demultiplexer; inverting. Product specification 1998 Apr 28
INTEGRATED CIRCUITS -to-8 line decoder/demultiplexer; inverting 998 Apr 8 FEATURES Wide supply voltage range of. to. V In accordance with JEDEC standard no. 8-A Inputs accept voltages up to. V CMOS lower
More information2-input AND gate with open-drain output. The 74AHC1G09 is a high-speed Si-gate CMOS device.
74HC1G09 Rev. 02 18 December 2007 Product data sheet 1. General description 2. Features 3. Ordering information The 74HC1G09 is a high-speed Si-gate CMOS device. The 74HC1G09 provides the 2-input ND function
More information74HC259; 74HCT259. The 74HC259; 74HCT259 has four modes of operation:
Rev. 5 7 ugust 202 Product data sheet. General description The are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC
More information8-bit serial-in/parallel-out shift register
Rev. 03 4 February 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The is a low-voltage, Si-gate CMOS device and is pin and function compatible with the 74HC164 and 74HCT164.
More informationINTEGRATED CIRCUITS DATA SHEET. FAMILY SPECIFICATIONS HCMOS family characteristics. File under Integrated Circuits, IC06
INTEGRTED CIRCUITS DT SHEET FMILY SPECIFICTIONS HCMOS family characteristics File under Integrated Circuits, IC06 March 1988 INTEGRTED CIRCUITS DT SHEET Package outline drawings File under Integrated Circuits,
More information74HC139; 74HCT139. Dual 2-to-4 line decoder/demultiplexer
Rev. 3 28 March 2014 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The decodes two binary weighted address inputs (n0, n1) to four mutually exclusive outputs
More information74HC126; 74HCT126. Quad buffer/line driver; 3-state
Rev. 3 22 September 2014 Product data sheet 1. General description 2. Features and benefits 3. Ordering information The is a quad buffer/line driver with 3-state outputs controlled by the output enable
More information74HC541; 74HCT541. Octal buffer/line driver; 3-state
Rev. 4 3 March 2016 Product data sheet 1. General description 2. Features and benefits The is an octal non-inverting buffer/line driver with 3-state outputs. The device features two output enables (OE1
More information74HC164; 74HCT bit serial-in, parallel-out shift register
Rev. 03 4 pril 2005 Product data sheet 1. General description 2. Features 3. Quick reference data The are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They
More information