INTEGRATED CIRCUITS. For a complete data sheet, please also download:

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1 INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS ogic Package Outlines 74C/CT139 Dual 2-to-4 line decoder/demultiplexer File under Integrated Circuits, IC06 September 1993

2 74C/CT139 FEATURES Demultiplexing capability Two independent 2-to-4 decoders Multifunction capability Active OW mutually exclusive outputs Output capability: standard I CC category: MSI GENERA DESCRIPTION The 74C/CT139 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TT (STT). It is specified in compliance with JEDEC standard no. 7A. The 74C/CT139 are high-speed, dual 2-to-4 line decoder/multiplexers. This device has two independent decoders, each accepting two binary weighted inputs (na 0 and na 1 ) and providing four mutually exclusive active OW outputs (ny 0 to ny3). Each decoder has an active OW enable input (ne). When ne is IG, every output is forced IG. The enable can be used as the data input for a 1-to-4 demultiplexer application. The 139 is identical to the EF4556 of the E4000B family. QUICK REFERENCE DATA GND = 0 V; T amb = 25 C; t r = t f = 6 ns TYPICA SYMBO PARAMETER CONDITIONS C CT UNIT t P / t P propagation delay C = 15 pf; V CC = 5 V na n to ny n ns ne 3 to ny n ns C I input capacitance pf C PD power dissipation capacitance per multiplexer notes 1 and pf Notes 1. C PD is used to determine the dynamic power dissipation (P D in µw): P D = C PD V 2 CC f i + (C V 2 CC f o ) where: f i = input frequency in Mz f o = output frequency in Mz (C V 2 CC f o ) = sum of outputs C = output load capacitance in pf V CC = supply voltage in V 2. For C the condition is V I = GND to V CC For CT the condition is V I = GND to V CC 1.5 V APPICATIONS Memory decoding or data-routing Code conversion ORDERING INFORMATION See 74C/CT/CU/CMOS ogic Package Information. September

3 74C/CT139 PIN DESCRIPTION PIN NO. SYMBO NAME AND FUNCTION 1, 15 1E, 2E enable inputs (active OW) 2, 3 1A 0, 1A 1 address inputs 4, 5, 6, 7 1Y 0 to 1Y 3 outputs (active OW) 8 GND ground (0 V) 12, 11, 10, 9 2Y 0 to 2Y 3 outputs (active OW) 14, 13 2A 0, 2A 1 address inputs 16 V CC positive supply voltage Fig.1 Pin configuration. Fig.2 ogic symbol. (a) Fig.3 IEC logic symbol. (b) September

4 74C/CT139 Fig.4 Functional diagram. FUNCTION TABE INPUTS OUTPUTS ne na 0 na 1 ny 0 ny 1 ny 2 ny 3 X X Notes 1. = IG voltage level = OW voltage level X = don t care Fig.5 ogic diagram (one decoder/demultiplexer). September

5 74C/CT139 DC CARACTERISTICS FOR 74C For the DC characteristics see 74C/CT/CU/CMOS ogic Family Specifications. Output capability: standard I CC category: MSI AC CARACTERISTICS FOR 74C GND = 0 V; t r = t f = 6 ns; C = 50 pf T amb ( C) TEST CONDITIONS SYMBO PARAMETER 74C to to +125 min. typ. max. min. max. min. max. UNIT V CC (V) WAVEFORMS t P / t P t P / t P t T / t T 39 propagation delay 14 na n to Y n propagation delay 12 ne to ny n 10 output transition time ns ns ns Fig.6 Fig.7 Figs 6 and 7 September

6 74C/CT139 DC CARACTERISTICS FOR CT For the DC characteristics see 74C/CT/CU/CMOS ogic Family Specifications. Output capability: standard I CC category: MSI Note to CT types The value of additional quiescent supply current ( I CC ) for a unit load of 1 is given in the family specifications. To determine I CC per input, multiply this value by the unit load coefficient shown in the table below. INPUT UNIT OAD COEFFICIENT 1A n 2A n ne AC CARACTERISTICS FOR 74CT GND = 0 V; t f = t f = 6 ns; C = 50 pf SYMBO t P / t P t P / t P t T / t T T amb ( C) TEST CONDITIONS 74CT PARAMETER UNIT V WAVEFORMS to to +125 CC (V) min. typ. max. min. max. min. max. propagation delay na n to Y n ns 4.5 Fig.6 propagation delay ne to ny n ns 4.5 Fig.7 output transition time ns 4.5 Figs 6 and 7 September

7 74C/CT139 AC WAVEFORMS (1) C : V M = 50%; V I = GND to V CC. CT: V M = 1.3 V; V I = GND to 3 V. Fig.6 Waveforms showing the address input (na n ) to output (ny n ) propagation delays and the output transition times. (1) C : V M = 50%; V I = GND to V CC. CT: V M = 1.3 V; V I = GND to 3 V. Fig.7 Waveforms showing the enable input (ne) to output (ny n ) propagation delays and the output transition times. PACKAGE OUTINES See 74C/CT/CU/CMOS ogic Package Outlines. September

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INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS