INTEGRATED CIRCUITS. For a complete data sheet, please also download:

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1 INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS ogic Family Specifications The IC06 74HC/HCT/HCU/HCMOS ogic Package Information The IC06 74HC/HCT/HCU/HCMOS ogic Package Outlines File under Integrated Circuits, IC06 December 1990

2 FEATURES Non-inverting outputs Output capability: bus driver I CC category: MSI GENERA DESCRIPTION The are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TT (STT). They are specified in compliance with JEDEC standard no. 7. The are hex non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (ny) are controlled by the output enable inputs (1OE, 2OE). A HIGH on noe causes the outputs to assume a high impedance OFF-state. The 367 is identical to the 368 but has non-inverting outputs. QUICK REFERENCE DATA GND = 0 V; T amb =25 C; t r =t f = 6 ns TYPICA SYMBO PARAMETER CONDITIONS HC HCT UNIT t PH / t PH propagation delay na to ny C = 15 pf; V CC =5V 8 11 ns C I input capacitance pf C PD power dissipation capacitance per buffer notes 1 and pf Notes 1. C PD is used to determine the dynamic power dissipation (P D in µw): P D =C PD V 2 CC f i + (C V 2 CC f o ) where: f i = input frequency in MHz f o = output frequency in MHz (C V 2 CC f o ) = sum of outputs C = output load capacitance in pf V CC = supply voltage in V 2. For HC the condition is V I = GND to V CC For HCT the condition is V I = GND to V CC 1.5 V ORDERING INFORMATION See 74HC/HCT/HCU/HCMOS ogic Package Information. December

3 PIN DESCRIPTION PIN NO. SYMBO NAME AND FUNCTION 1, 15 1OE, 2OE output enable inputs (active OW) 2, 4, 6, 10, 12, 14 1A to 6A data inputs 3, 5, 7, 9, 11, 13 1Y to 6Y data outputs 8 GND ground (0 V) 16 V CC positive supply voltage Fig.1 Pin configuration. Fig.2 ogic symbol. Fig.3 IEC logic symbol. December

4 FUNCTION TABE INPUTS Notes 1. H = HIGH voltage level = OW voltage level X = don t care Z = high impedance OFF-state OUTPUTS noe na ny H H X H Z Fig.4 Functional diagram. Fig.5 ogic diagram. December

5 DC CHARACTERISTICS FOR 74HC For the DC characteristics see 74HC/HCT/HCU/HCMOS ogic Family Specifications. Output capability: bus driver I CC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; t r =t f = 6 ns; C =50pF SYMBO t PH / t PH t PZH / t PZ t PHZ / t PZ PARAMETER propagation delay na to ny 3-state output enable time 3-state output disable time T amb ( C) 74HC to to +125 min. typ. max. min. max. min. max t TH / t TH output transition time UNIT TEST CONDITIONS V CC (V) WAVEFORMS Fig.6 Fig.7 Fig.7 Fig.6 December

6 DC CHARACTERISTICS FOR 74HCT For the DC characteristics see 74HC/HCT/HCU/HCMOS ogic Family Specifications. Output capability: bus driver I CC category: MSI Note to HCT types The value of additional quiescent supply current ( I CC ) for a unit load of 1 is given in the family specifications. To determine I CC per input, multiply this value by the unit load coefficient shown in the table below. INPUT 1OE 2OE na UNIT OAD COEFFICIENT AC CHARACTERISTICS FOR 74HCT GND = 0 V; t r =t f = 6 ns; C =50pF T amb ( C) TEST CONDITIONS 74HCT SYMBO PARAMETER UNIT V WAVEFORMS to to +125 CC (V) min. typ. max. min. max. min. max. t PH / t PH propagation delay ns Fig.6 na to ny t PZH / t PZ 3-state output enable time ns Fig.7 t PHZ / t PZ 3-state output disable time ns Fig.7 t TH / t TH output transition time ns Fig.6 December

7 AC WAVEFORMS (1) HC : V M = 50%; V I = GND to V CC. HCT : V M = 1.3 V; V I = GND to 3 V. Fig.6 Waveforms showing the input (na) to output (ny) propagation delays and the output transition times. (1) HC : V M = 50%; V I = GND to V CC. HCT : V M = 1.3 V; V I = GND to 3 V. Fig.7 Waveforms showing the 3-state enable and disable times. PACKAGE OUTINES See 74HC/HCT/HCU/HCMOS ogic Package Outlines. December

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

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