Lecture 8. Detectors for Ionizing Particles
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1 Lecture 8 Detectors for Ionizing Particles
2 Content Introduction Overview of detector systems Sources of radiation Radioactive decay Cosmic Radiation Accelerators Interaction of Radiation with Matter General principles Charged particles heavy charged particles electrons Neutral particles Photons Neutrons Neutrinos Definitions Detectors for Ionizing Particles Principles of ionizing detectors Gas detectors Principles Detector concepts Wiederholung V6
3 Semiconductor detectors Semiconductor basics Sensor concepts Different detector materials Readout electronics Scintillation detectors General characteristics Organic materials Inorganic materials Light output response Content Velocity Determination in Dielectric Media Cerenkov detectors Cerenkov radiation Cerenkov detectors Transition Radiation detectors Phenomenology of Transition Radiation Detection of Transition Radiation Complex Detector Systems Particle Identification with Combined Detector Information Tracking
4 Semiconductor Detectors
5 Semiconductor Detectors A semiconductor detector is a solid state ionization chamber Gas Semiconductor Z E(e/ion) creation ev ev specific density 0.17 (He) 0.9 (Ne) g l (Si) 5.3 (Ge) g cm -3 pairs per length 100 e/ions per cm 100 e/h per µm e mobility O(1000 cm 2 /Vs) cm 2 /Vs ion(hole) mobility 1 2 cm 2 /Vs cm 2 /Vs
6 pn - junction p n
7 pn junction as particle detector p + n - thin, highly doped p + (~10 19 cm -3 ) layer on lightly doped n - (~10 12 cm -3 ) substrate Space charge region N A de dx x p N D x 1 ( x) n neutrality cond. Maxwell Electric field!! E( x) en en A D ( x x ( x x p n ) ) for for x p x 0 x x n 0 Potential V bi e N 2 A x 2 p N D x 2 n
8 pn junction under reverse bias (V ext ) 1. V bi V bi + V ext 2. no thermal equilibrium => E F (n) E F (p) no bias Hole current Electron current p n forward bias Depletion region Depl. I p n reverse bias Depl. I
9 pn junction as particle detector Depletion zone grows from the junction into the lower doped bulk
10 Metal-semiconductor junction metal semiconductor note work function M depends on type of metal S depends on doping S = electron affinity = E vac E C is independent of doping Schottky Contact =potential barrier i.e e S < e m
11 VORLESUNG 8
12 Silicon Detector (principle sketch)
13 Single sided processing
14 Single sided processing C f - U=Q in / C f + +HV DC - Coupling
15 Single sided processing -HV R bias C f - U=Q in / C f + AC - Coupling
16 Realisation of AC coupling
17 Photolithography n - silicon wafer oxidation at ~1000 C photolithography on SiO 2 p + -doping by ion implantation curing at 600 C, 30 min addition of Al layer lithography on Al oxidised Si wafer coating with photoresist mask exposure of photoresist development edging removal of photoresist
18 Single sided processing
19 Biasing Polysilicon Biasing
20 FOXFET & Punch-Through Biasing V < V pt V V pt Punch Through Biasing V > V pt
21 Biasing of Pixel Detectors Jörn Große-Knetter
22 Double sided readout: insulation problems p + n n +
23 Double sided microstrip detector top side read-out strips bias strips bottom side p-type insulation
24 n-on-n segmentation p-on-n sensor n-on-n sensor Initial undepleted state undepleted After irradiation undepleted undepleted
25 Capacitive charge division
26 Capacitive charge division read Q collected Q incoming particle intermed. strip incoming particle
27 - distribution for position-interpolation simple expectation: = Q L /(Q R +Q L ) x = η*d not quite correct, use more complex function:
28 - distribution for position-interpolation ideally symmetric but: parasitic capacitances and r/o specifics intermediate strips intermediate structure in η Jörn Große-Knetter
29 Disturbing effects incoming particle ~300μm -electron reconstr. position effect of -electrons 100 kev -electron occurs in 300 µm Si with 6% probability; has range of 60 µm
30 Disturbing effects measured width of the charge distribution no B-field with B-field influence of Lorentz angle
31 Small pixel effect - II weighting potential for different pixel sizes first central neighbour
32 { Weighting field and signal formation moving charge moving charge signal observed here
33 Sideward Depletion 37
34 Silicon Drift Detectors ~ 10 µm resolution over 5 10 cm drift distances drift velocity must be predictable low trapping problem with radiation damage 38
35 Cylindrical Si-Drift Detector 39
36 40
37 41
38 MONOLITHIC DETECTORS
39 MOS (optical) CCD 43
40 s y m m e t r y a x i s 50 µm DEPleted Field Effect Transistor source top gate drain MIP clear bulk Potential distribution: ~1µm p+ + p n+ p+ n+ n n internal gate n - Backcontact Source internal Gate Drain p+ rear contact [TeSCA-Simulation] FET-Transistor integrated in every pixel (first amplification) Electrons are collected in internal gate and modulate the transistor-current Signal charge removed via clear contact 44
41 s y m m e t r y a x i s 50 µm DEPleted Field Effect Transistor source top gate drain +15 V 0V clear 0V bulk Potential distribution: p+ p n+ p+ n+ n n internal gate Backcontact internal Gate Drain n - Source p+ rear contact [TeSCA-Simulation] FET-Transistor integrated in every pixel (first amplification) Electrons are collected in internal gate and modulate the transistor-current Signal charge removed via clear contact 45
42 Minosa Active PixelS Signal created in low-doped epitaxial layer (typically ~10 μm) Charge sensing in n-well/p-epi junction Charge collection mainly through thermal diffusion (~100 ns), reflective boundaries at p-well and substrate Sensor and signal processing integrated in the same silicon wafer Standard commercial CMOS technology High granularity Fast readout, low noise, low power dissipation 46
43 SOI Pixel Detector Monolithic detector using Bonded wafer (SOI : Silicon-on-Insulator) of Hi-R and Low-R Si layers. No mechanical bump bondings -> High Density, Low material budget -> Low parasitic Capacitance, High Sensitivity Standard CMOS circuits can be built Thin active Si layer (~40 nm) -> No Latch Up, Small SEE Cross section. Based on Industrial standard technology 47 Seamless connection to Vertical Integration Yasuo Arai 47
44 OKI 0.2 mm FD-SOI Pixel Process Process SOI wafer Backside 0.2mm Low-Leakage Fully-Depleted SOI CMOS (OKI) 1 Poly, 4 (5) Metal layers, MIM Capacitor, DMOS option Core (I/O) Voltage = 1.8 (3.3) V Diameter: 200 mm, Top Si : Cz, ~18 -cm, p-type, ~40 nm thick Buried Oxide: 200 nm thick Handle wafer: Cz ~700 -cm (n-type), 650 mm thick Thinned to 260 mm and sputtered with Al (200 nm). An example of a SOI Pixel cross section Yasuo Arai 48
45 3D-Integration
46 3D-Integration R. Yarema
47 3D-Integration
48 3D-Integration
49 3D-Integration
50 3D-Sensors
51 3D-Sensors
52 Enver Alagoz
53 Size of Collider Si-Detectors 54 cm 57
54 ATLAS Silicon Tracker Micro Strip Detector Strips Pixel Detector Pixel 58
55 ATLAS silicon strip detector 60 m 2 of Si, ~4000 modules barrel during module mounting 59
56 Micro Strip Detector 60
57 ATLAS Si-Strip Detector 61
58 CMS silicon strip detector ~19000 modules 250m 2 of Si 62
59 ATLAS pixel module viewed from sensor side MCC sensor flex-hybrid FE-Chip FE-Chip pigtail viewed from chip side 16 IC, pixels
60 ATLAS pixel detector 1m close (5cm) to interaction point ~10 8 pixels (50x400 µm 2 ) ~1000 pixels hit every 25 ns ASIC Chip Development 64
61 ATLAS Pixel-Detector 65
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