an introduction to Semiconductor Devices

Transcription

1 an introduction to Semiconductor Devices Donald A. Neamen Chapter 6 Fundamentals of the Metal-Oxide-Semiconductor Field-Effect Transistor

2 Introduction: Chapter 6 1. MOSFET Structure 2. MOS Capacitor - Energy Band Diagram & Charge Distributions - Φ ms & V T - C-V Characteristics 3. MOSFET Operation The MOSFET is used extensively in digital circuit because of its relatively small size, thousands of devices can be fabricated in a single integrated circuit. The MOSFET is the core of IC design. MOS: Metal-SiO2-Si MIS: Metal-Insulator-Semiconductor (More General Technology)

3 1. MOSFET Structure

4 2. MOS Capacitor The heart of the MOSFET is the MOS capacitor. The metal may be aluminum, other type of metal or high-conductive polycrystalline silicon. t OX : thickness of oxide and ε OX : permittivity of oxide The physics of the MOS structure can be more easily explained with the aid of the simple parallel plate capacitor. With the metal negative voltage, negative charges exist on the top plate, positive charges exist on the bottom plate, and an electric field is induced between two plate.

5 The capacitor per unit area for this geometry is C d where is the permittivity of d is the distancebetween two plates. The magnitude of Q C V The magnitude of chargeper unit area is E V / d insulator and electric field is If the electric field is to penetrate into the semiconductor, the majority holes would experience a force toward the oxidesemiconductor interface: accumulation layer of holes.

6 The same MOS capacitor in which the polarity of the applied voltage is reversed is shown. If the opposite electric field penetrates the semiconductor, majority holes will experience a force away from the interface. As holes are pushed away from the interface, a negative space charge region is created because of the fixed ionized acceptor atoms.

7 2. MOS Capacitor: Energy Band Diagrams A larger negative charge implies a larger induced space charge region and more band bending. The intrinsic Fermi level at the surface is now below the Fermi level: thus, the conduction band is closer to the Fermi level. This result implies that the surface in the semiconductor is n type: inversion layer of electrons.

8 2. MOS Capacitor: Depletion Layer Thickness The potential fp is the difference between E fi and E f and is given by The potential is called the surfacepotential;it is the differece between E fi s measured in the bulk and E measured at thesurface. The spacechargewidth can be wrritten in a form similar to that of a one- sided pn junction. fi

9 For the case in which φ s =2φ fp, the Fermi level at the surface is as far above the intrinsic level. The electron concentration at the surface is the same as the hole concentration in the bulk: threshold inversion point. The applied gate voltage creating this condition is known as the threshold voltage. The maximum spacechargewidth x dt

10 Example 6.2 To calculate the maximum space charge width given a particular doping concentration. Consider 300K doped to N a =1E16cm -3.

11 2. MOS Capacitor: Work Function Differences (a) The energy levels in the metal, oxide, and silicon relative to vacuum level are depicted. (b) The energy band diagram of entire MOS structure with zero gate voltage applied is depicted. Φ m is a modified metal work function the potential required to inject an electron from the metal into the conduction band of the oxide. Χ is a modified electron affinity.

12 V ox0 m s0 V ox0 V ox0 + s0

13 The voltage V ox0 is the potential drop across the oxide for zero applied gate voltage and is not zero because of the difference between Φ m and Χ. Φ s0 is the surface potential. If we sum the energies from the Fermi level on the metal side to the Fermi level on the semiconductor side, The metal -semiconductor work function difference is

14 Example 6.3 To calculate the metal-semiconductor work function difference for a given MOS system and doping. For Al-SiO 2, Φ m =3.2V and for Si-SiO 2 junction Χ =3.25V. We may assume that E g =1.12eV. Let the p-type doping be N a =1E14cm -3.

15 Degenerately doped polysilicon deposited on the oxide is often used as the metal gate. (a) n + poly p silicon, and (b) p + poly p silicon. In the degenerately doped polysi, E f =E c for the n + case and E f =E v for the p + case. For the n + poly-si gate, the Φ ms can be written as

16 The energy band diagram of the MOS capacitor with a metal gate and the n-type semiconductor is shown for the case when a negative voltage is applied to the gate. the Φ ms can be written as

17 2. MOS Capacitor: Flat Band Voltage The flat band voltage is defined as the applied gate voltage such that there is no band bending in the semiconductor and, as a result, zero net space charge in this region. Because of the work function difference and possible trapped charge in the oxide, the voltage across the oxide for this case is not necessarily zero. We have been assuming that there is zero net charge density in the oxide material (Not Valid). A net fixed charge density, usually positive, may exist in the insulator. The positive charge has been identified with broken or dangling covalent bonds near the oxidesemiconductor interface.

18 We assume that an equivalent trapped charge per unit area, Q ss, is located in the oxide adjacent to the oxide-semiconductor interface.

19 If a gate voltage is applied, the potential drop across the oxide and the surface potential will change. There is zero net charge in the semiconductor and we can assume that an equivalent fixed surface charge density exists in the oxide. The charge density on the metal is Q m, and from the charge neutrality we have and C ox is the oxide capacitance per unit area. In the flat band condition,the surfacepotentialis or s 0. zero

20 Example 6.4 To calculate the flat band voltage for an MOS capacitor with a p-type semiconductor substrate. Consider an MOS structure with a p-type semiconductor doped to N a =1E16cm -3, t ox =500A and n + poly-si. Assume that Q ss =1E11 electronic charges per cm 2.

21 2. MOS Capacitor: Threshold Voltage The threshold voltage was defined as the applied gate voltage required to achieve the threshold inversion point. Φ s =2Φ fp for p- type semiconductor and Φ s =2Φ fn for n-type semiconductor. The charge distribution through the MOS device at the threshold inversion point for a p-type semiconductor is shown. The space charge width has reached its maximum value. Assume that there is an equivalent oxide charge Q ss and the positive charge on the metal gate at threshold is Q mt. If we neglect the inversion layer charge at the threshold inversion point,

22 The energy-band diagram of the MOS with an applied positive gate voltage is shown. An applied gate voltage will change the voltage across the oxide and the surface potential.

23 Example 6.5 To design the oxide thickness of an MOS system to yield a specified threshold voltage. Consider n+ poly and p Si doped to Na=3E16cm-3. Assume Q ss =1E11cm-2. Determine the oxide thickness that V TN =+0.65V.

24 A negative threshold voltage for p-type substrate implies a depletion mode device. A negative voltage must be applied to the gate in order to make the inversion layer charge equal to zero, whereas a positive gate voltage will induce a large inversion layer charge. There is a plot of V TN as a function of the doping concentration for various positive oxide values.

25 The threshold voltage for an n- type substrate can be derived; As the Q SS charge and N d increase, the threshold voltage becomes more negative, which means that it takes a larger applied gate voltage to create the inversion layer of holes.

26 2. MOS Capacitor: C-V Characteristics The MOS capacitor is the heart of the MOSFET. A great deal of information about the MOS device can be obtained from the C-V characteristics of the device. where dqis the magnitude of in chargeon oneplate as a function of in voltage dv C dq dv the differential change acrossthe capacitor. the differential change The capacitance is a small signal or ac parameter and is measured by superimposing a small ac voltage on an applied dc gate voltage. The capacitance, then, is measured as a function of the applied dc gate voltage. There are three operating conditions of interest in the MOS capacitor: accumulation, depletion and inversion.

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28 The differential changes in charge density occur at the edges of the oxide. The capacitance C per unit area of the MOS capacitor for this accumulation mode is just the oxide capacitance, or In the depletion mode, the oxide capacitance and the capacitance of the depletion region are in series. A small change in voltage across the capacitor will cause a change in the space charge width. The corresponding differential changes in charge densities are shown in figure. The total capacitance of the series combination is

29 We had defined the threshold inversion point to be the condition when the maximum depletion width is reached but there is zero inversion charge density. This condition yields a minimum capacitance C min, For the inversion condition, in the ideal case, a small incremental change across the capacitor will cause a differential change in the inversion layer charge density, and the space charge width does not change. If the inversion charge can respond to the change in the capacitor voltage, then the capacitance is again just the oxide capacitance,

30 Moderate inversion is the transition region between the point when only the space charge density changes with the gate voltage and when only the inversion charge density changes. The flat band condition occurs between the accumulation and depletion conditions. ox C FB ox svt tox ( ) en s a

31 Example 6.9 To calculate C ox, C min, and C FB for an MOS capacitor. Consider a p-type Si substrate at T=300K doped to N a =1E16cm -3. The oxide is SiO 2 with a thickness of 550A and the gate is Al.

32 The differential changes in the capacitor voltage causes a differential change in the inversion layer charge density. There are two sources of electrons that can change the charge density of the inversion layer; 1. diffusion of minority carrier electrons from the p-type sub, 2. thermal generation of e-h pairs within the space charge region. Both of these processes generate electrons at the particular rate. If the ac voltage across the capacitor changes rapidly, the change in the inversion layer charge will not be able to respond. At a high frequency, the differential change in charge occurs at the metal and in the space charge width in the semiconductor.